syzbot |
sign-in | mailing list | source | docs | 🏰 |
| ID | Workflow | Result | Correct | Bug | Created | Started | Finished | Revision | Error |
|---|---|---|---|---|---|---|---|---|---|
| ab5e7d34-2702-412d-acb5-e1018e3366d5 | assessment-kcsan | Benign: ✅ Confident: ✅ | ❓ | KCSAN: data-race in serial8250_do_startup / serial8250_handle_irq_locked | 2026/04/07 13:18 | 2026/04/07 13:18 | 2026/04/07 13:37 | 4440e7c2e964875f9e35dba6deda12c2195f19d3 |
| BugTitle | KCSAN: data-race in serial8250_do_startup / serial8250_handle_irq_locked |
| CrashLogID | 5763722871570432 |
| CrashReportID | 5621656023728128 |
| KernelCommit | bfe62a454542cfad3379f6ef5680b125f41e20f4 |
| KernelConfig |
Show (261023 bytes)# # Automatically generated file; DO NOT EDIT. # Linux/x86_64 syzkaller Kernel Configuration # CONFIG_CC_VERSION_TEXT="Debian clang version 21.1.8 (++20251221033036+2078da43e25a-1~exp1~20251221153213.50)" CONFIG_GCC_VERSION=0 CONFIG_CC_IS_CLANG=y CONFIG_CLANG_VERSION=210108 CONFIG_AS_IS_LLVM=y CONFIG_AS_VERSION=210108 CONFIG_LD_VERSION=0 CONFIG_LD_IS_LLD=y CONFIG_LLD_VERSION=210108 CONFIG_RUSTC_VERSION=109101 CONFIG_RUST_IS_AVAILABLE=y CONFIG_RUSTC_LLVM_VERSION=210102 CONFIG_CC_CAN_LINK=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_ASSUME=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_CC_HAS_COUNTED_BY=y CONFIG_CC_HAS_BROKEN_COUNTED_BY_REF=y CONFIG_CC_HAS_MULTIDIMENSIONAL_NONSTRING=y CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY=y CONFIG_RUSTC_HAS_SLICE_AS_FLATTENED=y CONFIG_RUSTC_HAS_COERCE_POINTEE=y CONFIG_RUSTC_HAS_SPAN_FILE=y CONFIG_RUSTC_HAS_UNNECESSARY_TRANSMUTES=y CONFIG_RUSTC_HAS_FILE_WITH_NUL=y CONFIG_RUSTC_HAS_FILE_AS_C_STR=y CONFIG_PAHOLE_VERSION=130 CONFIG_CONSTRUCTORS=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y # # General setup # CONFIG_INIT_ENV_ARG_LIMIT=32 # CONFIG_COMPILE_TEST is not set # CONFIG_WERROR is not set CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_BUILD_SALT="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y CONFIG_HAVE_KERNEL_ZSTD=y CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set # CONFIG_KERNEL_ZSTD is not set CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_SYSVIPC_COMPAT=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y # CONFIG_WATCH_QUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_AUDIT=y CONFIG_HAVE_ARCH_AUDITSYSCALL=y CONFIG_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_PENDING_IRQ=y CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y # CONFIG_GENERIC_IRQ_DEBUGFS is not set # end of IRQ subsystem CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST_IDLE=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_CONTEXT_TRACKING=y CONFIG_CONTEXT_TRACKING_IDLE=y # # Timers subsystem # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set CONFIG_NO_HZ_IDLE=y # CONFIG_NO_HZ_FULL is not set CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=125 # CONFIG_POSIX_AUX_CLOCKS is not set # end of Timers subsystem CONFIG_BPF=y CONFIG_HAVE_EBPF_JIT=y CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y # # BPF subsystem # CONFIG_BPF_SYSCALL=y CONFIG_BPF_JIT=y # CONFIG_BPF_JIT_ALWAYS_ON is not set CONFIG_BPF_JIT_DEFAULT_ON=y # CONFIG_BPF_UNPRIV_DEFAULT_OFF is not set # CONFIG_BPF_PRELOAD is not set # CONFIG_BPF_LSM is not set # end of BPF subsystem CONFIG_PREEMPT_BUILD=y CONFIG_ARCH_HAS_PREEMPT_LAZY=y CONFIG_PREEMPT=y # CONFIG_PREEMPT_LAZY is not set # CONFIG_PREEMPT_RT is not set CONFIG_PREEMPT_COUNT=y CONFIG_PREEMPTION=y CONFIG_PREEMPT_DYNAMIC=y # CONFIG_SCHED_CORE is not set # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set # CONFIG_IRQ_TIME_ACCOUNTING is not set CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y # CONFIG_PSI is not set # end of CPU/Task time and stats accounting CONFIG_CPU_ISOLATION=y # # RCU Subsystem # CONFIG_TREE_RCU=y CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y # end of RCU Subsystem # CONFIG_IKCONFIG is not set # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=18 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 # CONFIG_PRINTK_INDEX is not set CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # # Scheduler features # # CONFIG_UCLAMP_TASK is not set # CONFIG_SCHED_PROXY_EXEC is not set # end of Scheduler features CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GCC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y # CONFIG_NUMA_BALANCING is not set CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y CONFIG_MEMCG_V1=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y # CONFIG_CFS_BANDWIDTH is not set # CONFIG_RT_GROUP_SCHED is not set CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_RDMA=y # CONFIG_CGROUP_DMEM is not set CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_HUGETLB=y CONFIG_CPUSETS=y # CONFIG_CPUSETS_V1 is not set CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y # CONFIG_CGROUP_BPF is not set CONFIG_CGROUP_MISC=y CONFIG_CGROUP_DEBUG=y CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y CONFIG_UTS_NS=y CONFIG_TIME_NS=y CONFIG_IPC_NS=y CONFIG_USER_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y # CONFIG_CHECKPOINT_RESTORE is not set # CONFIG_SCHED_AUTOGROUP is not set CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_RD_GZIP=y CONFIG_RD_BZIP2=y CONFIG_RD_LZMA=y CONFIG_RD_XZ=y CONFIG_RD_LZO=y CONFIG_RD_LZ4=y CONFIG_RD_ZSTD=y # CONFIG_BOOT_CONFIG is not set CONFIG_CMDLINE_LOG_WRAP_IDEAL_LEN=1021 CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_LD_ORPHAN_WARN=y CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y # CONFIG_SYSFS_SYSCALL is not set CONFIG_HAVE_PCSPKR_PLATFORM=y CONFIG_EXPERT=y CONFIG_UID16=y CONFIG_MULTIUSER=y CONFIG_SGETMASK_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y # CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_FUTEX_PRIVATE_HASH=y CONFIG_FUTEX_MPOL=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y # CONFIG_IO_URING_MOCK_FILE is not set CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y CONFIG_KCMP=y CONFIG_RSEQ=y # CONFIG_RSEQ_SLICE_EXTENSION is not set # CONFIG_RSEQ_STATS is not set # CONFIG_RSEQ_DEBUG_DEFAULT_ENABLE is not set CONFIG_CACHESTAT_SYSCALL=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set CONFIG_KALLSYMS_ALL=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS=y CONFIG_HAVE_PERF_EVENTS=y # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y # CONFIG_DEBUG_PERF_USE_VMALLOC is not set # end of Kernel Performance Events And Counters CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y # CONFIG_RUST is not set CONFIG_TRACEPOINTS=y # # Kexec and crash features # CONFIG_CRASH_RESERVE=y CONFIG_VMCORE_INFO=y CONFIG_KEXEC_CORE=y CONFIG_KEXEC=y # CONFIG_KEXEC_FILE is not set # CONFIG_KEXEC_JUMP is not set CONFIG_CRASH_DUMP=y CONFIG_CRASH_HOTPLUG=y CONFIG_CRASH_MAX_MEMORY_RANGES=8192 # end of Kexec and crash features # # Live Update and Kexec HandOver # # CONFIG_KEXEC_HANDOVER is not set # end of Live Update and Kexec HandOver # end of General setup CONFIG_64BIT=y CONFIG_X86_64=y CONFIG_X86=y CONFIG_INSTRUCTION_DECODER=y CONFIG_OUTPUT_FORMAT="elf64-x86-64" CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_MMU=y CONFIG_ARCH_MMAP_RND_BITS_MIN=28 CONFIG_ARCH_MMAP_RND_BITS_MAX=32 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_AUDIT_ARCH=y CONFIG_HAVE_INTEL_TXT=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_PGTABLE_LEVELS=5 # # Processor type and features # CONFIG_SMP=y CONFIG_X86_X2APIC=y CONFIG_X86_MPPARSE=y # CONFIG_X86_CPU_RESCTRL is not set # CONFIG_X86_FRED is not set CONFIG_X86_EXTENDED_PLATFORM=y # CONFIG_X86_NUMACHIP is not set # CONFIG_X86_VSMP is not set # CONFIG_X86_INTEL_MID is not set # CONFIG_X86_GOLDFISH is not set # CONFIG_X86_INTEL_LPSS is not set # CONFIG_X86_AMD_PLATFORM_DEVICE is not set CONFIG_IOSF_MBI=y # CONFIG_IOSF_MBI_DEBUG is not set CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y CONFIG_SCHED_OMIT_FRAME_POINTER=y CONFIG_HYPERVISOR_GUEST=y CONFIG_PARAVIRT=y CONFIG_PARAVIRT_SPINLOCKS=y CONFIG_X86_HV_CALLBACK_VECTOR=y # CONFIG_XEN is not set CONFIG_KVM_GUEST=y CONFIG_ARCH_CPUIDLE_HALTPOLL=y CONFIG_PVH=y # CONFIG_PARAVIRT_TIME_ACCOUNTING is not set CONFIG_PARAVIRT_CLOCK=y # CONFIG_JAILHOUSE_GUEST is not set # CONFIG_ACRN_GUEST is not set # CONFIG_BHYVE_GUEST is not set CONFIG_CC_HAS_MARCH_NATIVE=y # CONFIG_X86_NATIVE_CPU is not set CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_TSC=y CONFIG_X86_HAVE_PAE=y CONFIG_X86_CX8=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 CONFIG_X86_DEBUGCTLMSR=y CONFIG_IA32_FEAT_CTL=y CONFIG_X86_VMX_FEATURE_NAMES=y CONFIG_PROCESSOR_SELECT=y CONFIG_BROADCAST_TLB_FLUSH=y CONFIG_CPU_SUP_INTEL=y CONFIG_CPU_SUP_AMD=y # CONFIG_CPU_SUP_HYGON is not set # CONFIG_CPU_SUP_CENTAUR is not set # CONFIG_CPU_SUP_ZHAOXIN is not set CONFIG_HPET_TIMER=y CONFIG_HPET_EMULATE_RTC=y CONFIG_DMI=y # CONFIG_GART_IOMMU is not set # CONFIG_MAXSMP is not set CONFIG_NR_CPUS_RANGE_BEGIN=2 CONFIG_NR_CPUS_RANGE_END=512 CONFIG_NR_CPUS_DEFAULT=64 CONFIG_NR_CPUS=8 CONFIG_SCHED_MC_PRIO=y CONFIG_X86_LOCAL_APIC=y CONFIG_ACPI_MADT_WAKEUP=y CONFIG_X86_IO_APIC=y CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y CONFIG_X86_MCE=y # CONFIG_X86_MCELOG_LEGACY is not set CONFIG_X86_MCE_INTEL=y CONFIG_X86_MCE_AMD=y CONFIG_X86_MCE_THRESHOLD=y # CONFIG_X86_MCE_INJECT is not set # # Performance monitoring # CONFIG_PERF_EVENTS_INTEL_UNCORE=y CONFIG_PERF_EVENTS_INTEL_RAPL=y CONFIG_PERF_EVENTS_INTEL_CSTATE=y # CONFIG_PERF_EVENTS_AMD_POWER is not set CONFIG_PERF_EVENTS_AMD_UNCORE=y # CONFIG_PERF_EVENTS_AMD_BRS is not set # end of Performance monitoring CONFIG_X86_16BIT=y CONFIG_X86_ESPFIX64=y CONFIG_X86_VSYSCALL_EMULATION=y CONFIG_X86_IOPL_IOPERM=y CONFIG_MICROCODE=y # CONFIG_MICROCODE_LATE_LOADING is not set # CONFIG_MICROCODE_DBG is not set CONFIG_X86_MSR=y CONFIG_X86_CPUID=y CONFIG_X86_DIRECT_GBPAGES=y # CONFIG_X86_CPA_STATISTICS is not set CONFIG_NUMA=y CONFIG_AMD_NUMA=y CONFIG_X86_64_ACPI_NUMA=y CONFIG_NODES_SHIFT=6 CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 # CONFIG_X86_PMEM_LEGACY is not set CONFIG_X86_CHECK_BIOS_CORRUPTION=y CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y CONFIG_MTRR=y # CONFIG_MTRR_SANITIZER is not set CONFIG_X86_PAT=y CONFIG_X86_UMIP=y CONFIG_CC_HAS_IBT=y CONFIG_X86_CET=y CONFIG_X86_KERNEL_IBT=y CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y CONFIG_ARCH_PKEY_BITS=4 # CONFIG_X86_INTEL_TSX_MODE_OFF is not set CONFIG_X86_INTEL_TSX_MODE_ON=y # CONFIG_X86_INTEL_TSX_MODE_AUTO is not set # CONFIG_X86_SGX is not set # CONFIG_X86_USER_SHADOW_STACK is not set # CONFIG_EFI is not set CONFIG_HZ_100=y # CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set # CONFIG_HZ_1000 is not set CONFIG_HZ=100 CONFIG_SCHED_HRTICK=y CONFIG_ARCH_SUPPORTS_KEXEC=y CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y CONFIG_ARCH_SUPPORTS_KEXEC_PURGATORY=y CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_SIG_FORCE=y CONFIG_ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_JUMP=y CONFIG_ARCH_SUPPORTS_KEXEC_HANDOVER=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y CONFIG_ARCH_DEFAULT_CRASH_DUMP=y CONFIG_ARCH_SUPPORTS_CRASH_HOTPLUG=y CONFIG_ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION=y CONFIG_PHYSICAL_START=0x1000000 # CONFIG_RELOCATABLE is not set CONFIG_PHYSICAL_ALIGN=0x200000 CONFIG_HOTPLUG_CPU=y # CONFIG_COMPAT_VDSO is not set CONFIG_LEGACY_VSYSCALL_XONLY=y # CONFIG_LEGACY_VSYSCALL_NONE is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="earlyprintk=serial net.ifnames=0 sysctl.kernel.hung_task_all_cpu_backtrace=1 ima_policy=tcb nf-conntrack-ftp.ports=20000 nf-conntrack-tftp.ports=20000 nf-conntrack-sip.ports=20000 nf-conntrack-irc.ports=20000 nf-conntrack-sane.ports=20000 binder.debug_mask=0 rcupdate.rcu_expedited=1 rcupdate.rcu_cpu_stall_cputime=1 no_hash_pointers page_owner=on sysctl.vm.nr_hugepages=4 sysctl.vm.nr_overcommit_hugepages=4 secretmem.enable=1 sysctl.max_rcu_stall_to_panic=1 msr.allow_writes=off coredump_filter=0xffff root=/dev/sda console=ttyS0 vsyscall=native numa=fake=2 kvm-intel.nested=1 spec_store_bypass_disable=prctl nopcid vivid.n_devs=64 vivid.multiplanar=1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2,1,2 netrom.nr_ndevs=32 rose.rose_ndevs=32 smp.csd_lock_timeout=100000 watchdog_thresh=55 workqueue.watchdog_thresh=140 sysctl.net.core.netdev_unregister_timeout_secs=140 dummy_hcd.num=32 max_loop=32 nbds_max=32" # CONFIG_CMDLINE_OVERRIDE is not set CONFIG_MODIFY_LDT_SYSCALL=y # CONFIG_STRICT_SIGALTSTACK_SIZE is not set CONFIG_HAVE_LIVEPATCH=y CONFIG_HAVE_KLP_BUILD=y CONFIG_X86_BUS_LOCK_DETECT=y # end of Processor type and features CONFIG_CC_HAS_SLS=y CONFIG_CC_HAS_RETURN_THUNK=y CONFIG_CC_HAS_ENTRY_PADDING=y CONFIG_CC_HAS_KCFI_ARITY=y CONFIG_FUNCTION_PADDING_CFI=11 CONFIG_FUNCTION_PADDING_BYTES=16 CONFIG_CALL_PADDING=y CONFIG_HAVE_CALL_THUNKS=y CONFIG_CALL_THUNKS=y CONFIG_PREFIX_SYMBOLS=y CONFIG_CPU_MITIGATIONS=y CONFIG_MITIGATION_PAGE_TABLE_ISOLATION=y CONFIG_MITIGATION_RETPOLINE=y CONFIG_MITIGATION_RETHUNK=y CONFIG_MITIGATION_UNRET_ENTRY=y CONFIG_MITIGATION_CALL_DEPTH_TRACKING=y # CONFIG_CALL_THUNKS_DEBUG is not set CONFIG_MITIGATION_IBPB_ENTRY=y CONFIG_MITIGATION_IBRS_ENTRY=y CONFIG_MITIGATION_SRSO=y # CONFIG_MITIGATION_SLS is not set CONFIG_MITIGATION_GDS=y CONFIG_MITIGATION_RFDS=y CONFIG_MITIGATION_SPECTRE_BHI=y CONFIG_MITIGATION_MDS=y CONFIG_MITIGATION_TAA=y CONFIG_MITIGATION_MMIO_STALE_DATA=y CONFIG_MITIGATION_L1TF=y CONFIG_MITIGATION_RETBLEED=y CONFIG_MITIGATION_SPECTRE_V1=y CONFIG_MITIGATION_SPECTRE_V2=y CONFIG_MITIGATION_SRBDS=y CONFIG_MITIGATION_SSB=y CONFIG_MITIGATION_ITS=y CONFIG_MITIGATION_TSA=y CONFIG_ARCH_HAS_ADD_PAGES=y # # Power management and ACPI options # CONFIG_ARCH_HIBERNATION_HEADER=y CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y # CONFIG_SUSPEND_SKIP_SYNC is not set CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_HIBERNATION_SNAPSHOT_DEV=y CONFIG_HIBERNATION_COMP_LZO=y CONFIG_HIBERNATION_DEF_COMP="lzo" CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set # CONFIG_PM_USERSPACE_AUTOSLEEP is not set # CONFIG_PM_WAKELOCKS is not set # CONFIG_PM_QOS_CPU_SYSTEM_WAKEUP is not set CONFIG_PM=y CONFIG_PM_DEBUG=y # CONFIG_PM_ADVANCED_DEBUG is not set # CONFIG_PM_TEST_SUSPEND is not set CONFIG_PM_SLEEP_DEBUG=y CONFIG_PM_TRACE=y CONFIG_PM_TRACE_RTC=y CONFIG_PM_CLK=y # CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set # CONFIG_ENERGY_MODEL is not set CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ACPI=y CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y CONFIG_ACPI_THERMAL_LIB=y # CONFIG_ACPI_DEBUGGER is not set CONFIG_ACPI_SPCR_TABLE=y # CONFIG_ACPI_FPDT is not set CONFIG_ACPI_LPIT=y CONFIG_ACPI_SLEEP=y CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y CONFIG_ACPI_EC=y # CONFIG_ACPI_EC_DEBUGFS is not set CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=y # CONFIG_ACPI_TAD is not set CONFIG_ACPI_DOCK=y CONFIG_ACPI_CPU_FREQ_PSS=y CONFIG_ACPI_PROCESSOR_CSTATE=y CONFIG_ACPI_PROCESSOR_IDLE=y CONFIG_ACPI_CPPC_LIB=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y # CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set CONFIG_ACPI_THERMAL=y CONFIG_ACPI_PLATFORM_PROFILE=y CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_DEBUG=y # CONFIG_ACPI_PCI_SLOT is not set CONFIG_ACPI_CONTAINER=y CONFIG_ACPI_HOTPLUG_IOAPIC=y # CONFIG_ACPI_SBS is not set # CONFIG_ACPI_HED is not set # CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set CONFIG_ACPI_NHLT=y # CONFIG_ACPI_NFIT is not set CONFIG_ACPI_NUMA=y # CONFIG_ACPI_HMAT is not set CONFIG_HAVE_ACPI_APEI=y CONFIG_HAVE_ACPI_APEI_NMI=y # CONFIG_ACPI_APEI is not set # CONFIG_ACPI_DPTF is not set # CONFIG_ACPI_EXTLOG is not set # CONFIG_ACPI_CONFIGFS is not set # CONFIG_ACPI_PFRUT is not set CONFIG_ACPI_PCC=y # CONFIG_ACPI_FFH is not set CONFIG_ACPI_MRRM=y CONFIG_PMIC_OPREGION=y CONFIG_BXT_WC_PMIC_OPREGION=y # CONFIG_CHT_WC_PMIC_OPREGION is not set CONFIG_X86_PM_TIMER=y # # CPU Frequency scaling # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_ATTR_SET=y CONFIG_CPU_FREQ_GOV_COMMON=y # CONFIG_CPU_FREQ_STAT is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y # CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # # CPU frequency scaling drivers # # CONFIG_CPUFREQ_DT is not set # CONFIG_CPUFREQ_DT_PLATDEV is not set CONFIG_X86_INTEL_PSTATE=y # CONFIG_X86_PCC_CPUFREQ is not set CONFIG_X86_AMD_PSTATE=y CONFIG_X86_AMD_PSTATE_DEFAULT_MODE=3 # CONFIG_X86_AMD_PSTATE_UT is not set CONFIG_X86_ACPI_CPUFREQ=y CONFIG_X86_ACPI_CPUFREQ_CPB=y # CONFIG_X86_POWERNOW_K8 is not set # CONFIG_X86_AMD_FREQ_SENSITIVITY is not set # CONFIG_X86_SPEEDSTEP_CENTRINO is not set # CONFIG_X86_P4_CLOCKMOD is not set # # shared options # CONFIG_CPUFREQ_ARCH_CUR_FREQ=y # end of CPU Frequency scaling # # CPU Idle # CONFIG_CPU_IDLE=y # CONFIG_CPU_IDLE_GOV_LADDER is not set CONFIG_CPU_IDLE_GOV_MENU=y # CONFIG_CPU_IDLE_GOV_TEO is not set CONFIG_CPU_IDLE_GOV_HALTPOLL=y CONFIG_HALTPOLL_CPUIDLE=y # end of CPU Idle CONFIG_INTEL_IDLE=y # end of Power management and ACPI options # # Bus options (PCI etc.) # CONFIG_PCI_DIRECT=y CONFIG_PCI_MMCONFIG=y CONFIG_MMCONF_FAM10H=y # CONFIG_ISA_BUS is not set CONFIG_ISA_DMA_API=y CONFIG_AMD_NB=y CONFIG_AMD_NODE=y # end of Bus options (PCI etc.) # # Binary Emulations # CONFIG_IA32_EMULATION=y # CONFIG_IA32_EMULATION_DEFAULT_DISABLED is not set CONFIG_COMPAT_32=y CONFIG_COMPAT=y CONFIG_COMPAT_FOR_U64_ALIGNMENT=y # end of Binary Emulations CONFIG_VIRTUALIZATION=y # CONFIG_KVM is not set CONFIG_X86_REQUIRED_FEATURE_ALWAYS=y CONFIG_X86_REQUIRED_FEATURE_NOPL=y CONFIG_X86_REQUIRED_FEATURE_CX8=y CONFIG_X86_REQUIRED_FEATURE_CMOV=y CONFIG_X86_REQUIRED_FEATURE_SYSFAST32=y CONFIG_X86_REQUIRED_FEATURE_CPUID=y CONFIG_X86_REQUIRED_FEATURE_FPU=y CONFIG_X86_REQUIRED_FEATURE_PAE=y CONFIG_X86_REQUIRED_FEATURE_PSE=y CONFIG_X86_REQUIRED_FEATURE_PGE=y CONFIG_X86_REQUIRED_FEATURE_MSR=y CONFIG_X86_REQUIRED_FEATURE_FXSR=y CONFIG_X86_REQUIRED_FEATURE_XMM=y CONFIG_X86_REQUIRED_FEATURE_XMM2=y CONFIG_X86_REQUIRED_FEATURE_LM=y CONFIG_X86_DISABLED_FEATURE_VME=y CONFIG_X86_DISABLED_FEATURE_K6_MTRR=y CONFIG_X86_DISABLED_FEATURE_CYRIX_ARR=y CONFIG_X86_DISABLED_FEATURE_CENTAUR_MCR=y CONFIG_X86_DISABLED_FEATURE_LAM=y CONFIG_X86_DISABLED_FEATURE_ENQCMD=y CONFIG_X86_DISABLED_FEATURE_SGX=y CONFIG_X86_DISABLED_FEATURE_XENPV=y CONFIG_X86_DISABLED_FEATURE_TDX_GUEST=y CONFIG_X86_DISABLED_FEATURE_USER_SHSTK=y CONFIG_X86_DISABLED_FEATURE_FRED=y CONFIG_X86_DISABLED_FEATURE_SEV_SNP=y CONFIG_AS_WRUSS=y CONFIG_ARCH_CONFIGURES_CPU_MITIGATIONS=y # # General architecture-dependent options # CONFIG_HOTPLUG_SMT=y CONFIG_ARCH_SUPPORTS_SCHED_SMT=y CONFIG_ARCH_SUPPORTS_SCHED_CLUSTER=y CONFIG_ARCH_SUPPORTS_SCHED_MC=y CONFIG_SCHED_SMT=y CONFIG_SCHED_CLUSTER=y CONFIG_SCHED_MC=y CONFIG_HOTPLUG_CORE_SYNC=y CONFIG_HOTPLUG_CORE_SYNC_DEAD=y CONFIG_HOTPLUG_CORE_SYNC_FULL=y CONFIG_HOTPLUG_SPLIT_STARTUP=y CONFIG_HOTPLUG_PARALLEL=y CONFIG_GENERIC_IRQ_ENTRY=y CONFIG_GENERIC_SYSCALL=y CONFIG_GENERIC_ENTRY=y # CONFIG_KPROBES is not set CONFIG_JUMP_LABEL=y # CONFIG_STATIC_KEYS_SELFTEST is not set # CONFIG_STATIC_CALL_SELFTEST is not set CONFIG_UPROBES=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_KPROBES_ON_FTRACE=y CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y CONFIG_ARCH_HAS_CPU_FINALIZE_INIT=y CONFIG_ARCH_HAS_CPU_PASID=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y CONFIG_HAVE_USER_RETURN_NOTIFIER=y CONFIG_HAVE_PERF_EVENTS_NMI=y CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y CONFIG_UNWIND_USER=y CONFIG_HAVE_UNWIND_USER_FP=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y CONFIG_MMU_GATHER_TABLE_FREE=y CONFIG_MMU_GATHER_RCU_TABLE_FREE=y CONFIG_MMU_GATHER_MERGE_VMAS=y CONFIG_ARCH_WANT_IRQS_OFF_ACTIVATE_MM=y CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_ARCH_HAVE_EXTRA_ELF_NOTES=y CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y # CONFIG_SECCOMP_CACHE_DEBUG is not set CONFIG_HAVE_ARCH_KSTACK_ERASE=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y CONFIG_HAS_LTO_CLANG=y CONFIG_LTO_NONE=y # CONFIG_LTO_CLANG_FULL is not set # CONFIG_LTO_CLANG_THIN is not set CONFIG_ARCH_SUPPORTS_AUTOFDO_CLANG=y CONFIG_AUTOFDO_CLANG=y CONFIG_ARCH_SUPPORTS_PROPELLER_CLANG=y CONFIG_PROPELLER_CLANG=y CONFIG_ARCH_SUPPORTS_CFI=y # CONFIG_CFI is not set CONFIG_HAVE_CFI_ICALL_NORMALIZE_INTEGERS=y CONFIG_HAVE_CFI_ICALL_NORMALIZE_INTEGERS_RUSTC=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_CONTEXT_TRACKING_USER_OFFSTACK=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_PV_STEAL_CLOCK_GEN=y CONFIG_HAVE_MOVE_PUD=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y CONFIG_HAVE_ARCH_HUGE_VMAP=y CONFIG_HAVE_ARCH_HUGE_VMALLOC=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y CONFIG_ARCH_HAS_EXECMEM_ROX=y CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=28 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES=y CONFIG_HAVE_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SHIFT=12 CONFIG_HAVE_OBJTOOL=y CONFIG_HAVE_JUMP_LABEL_HACK=y CONFIG_HAVE_NOINSTR_HACK=y CONFIG_HAVE_NOINSTR_VALIDATION=y CONFIG_HAVE_UACCESS_VALIDATION=y CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_RELIABLE_STACKTRACE=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y CONFIG_RANDOMIZE_KSTACK_OFFSET=y # CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT is not set CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_STRICT_MODULE_RWX=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_MEM_ENCRYPT=y CONFIG_HAVE_STATIC_CALL=y CONFIG_HAVE_STATIC_CALL_INLINE=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_CALL=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAS_ELFCORE_COMPAT=y CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y CONFIG_DYNAMIC_SIGFRAME=y CONFIG_ARCH_HAS_HW_PTE_YOUNG=y CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y CONFIG_HAVE_GENERIC_TIF_BITS=y # # GCOV-based kernel profiling # # CONFIG_GCOV_KERNEL is not set CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling CONFIG_HAVE_GCC_PLUGINS=y CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT_16B=y CONFIG_FUNCTION_ALIGNMENT=16 CONFIG_CC_HAS_SANE_FUNCTION_ALIGNMENT=y CONFIG_ARCH_HAS_CPU_ATTACK_VECTORS=y # end of General architecture-dependent options CONFIG_RT_MUTEXES=y CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set CONFIG_MODVERSIONS=y # CONFIG_GENKSYMS is not set CONFIG_GENDWARFKSYMS=y CONFIG_ASM_MODVERSIONS=y # CONFIG_EXTENDED_MODVERSIONS is not set # CONFIG_BASIC_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set # CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y CONFIG_BLOCK_LEGACY_AUTOLOAD=y CONFIG_BLK_RQ_ALLOC_TIME=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_DEV_BSGLIB=y # CONFIG_BLK_DEV_INTEGRITY is not set # CONFIG_BLK_DEV_WRITE_MOUNTED is not set # CONFIG_BLK_DEV_ZONED is not set # CONFIG_BLK_DEV_THROTTLING is not set # CONFIG_BLK_WBT is not set CONFIG_BLK_CGROUP_IOLATENCY=y CONFIG_BLK_CGROUP_IOCOST=y CONFIG_BLK_CGROUP_IOPRIO=y CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set # CONFIG_BLK_INLINE_ENCRYPTION is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y CONFIG_EFI_PARTITION=y # end of Partition Types CONFIG_BLK_PM=y CONFIG_BLOCK_HOLDER_DEPRECATED=y CONFIG_BLK_MQ_STACKING=y # # IO Schedulers # CONFIG_MQ_IOSCHED_DEADLINE=y CONFIG_MQ_IOSCHED_KYBER=y # CONFIG_IOSCHED_BFQ is not set # end of IO Schedulers CONFIG_PADATA=y CONFIG_ASN1=y CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_QUEUED_RWLOCKS=y CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y CONFIG_FREEZER=y # # Executable file formats # CONFIG_BINFMT_ELF=y CONFIG_COMPAT_BINFMT_ELF=y CONFIG_ELFCORE=y CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y CONFIG_BINFMT_SCRIPT=y CONFIG_BINFMT_MISC=y CONFIG_COREDUMP=y # end of Executable file formats # # Memory Management options # CONFIG_SWAP=y # CONFIG_ZSWAP is not set # # Slab allocator options # CONFIG_SLUB=y CONFIG_KVFREE_RCU_BATCHED=y # CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set # CONFIG_SLAB_BUCKETS is not set # CONFIG_SLUB_STATS is not set # CONFIG_RANDOM_KMALLOC_CACHES is not set # end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_SPARSEMEM_VMEMMAP_PREINIT=y CONFIG_ARCH_WANT_OPTIMIZE_DAX_VMEMMAP=y CONFIG_ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP=y CONFIG_ARCH_WANT_HUGETLB_VMEMMAP_PREINIT=y CONFIG_HAVE_GUP_FAST=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y CONFIG_SPLIT_PTE_PTLOCKS=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y CONFIG_SPLIT_PMD_PTLOCKS=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 # CONFIG_PAGE_REPORTING is not set CONFIG_MIGRATION=y CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y CONFIG_PCP_BATCH_SCALE_MAX=5 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_MMU_NOTIFIER=y # CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y # CONFIG_MEMORY_FAILURE is not set CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANTS_THP_SWAP=y # CONFIG_TRANSPARENT_HUGEPAGE is not set CONFIG_PAGE_MAPCOUNT=y CONFIG_PGTABLE_HAS_HUGE_LEAVES=y CONFIG_HAVE_GIGANTIC_FOLIOS=y CONFIG_ASYNC_KERNEL_PGTABLE_FREE=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y # CONFIG_CMA is not set CONFIG_PAGE_BLOCK_MAX_ORDER=10 CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set # CONFIG_IDLE_PAGE_TRACKING is not set CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_ZONE_DMA_SET=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_HMM_MIRROR=y CONFIG_VMAP_PFN=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_ARCH_HAS_PKEYS=y CONFIG_ARCH_USES_PG_ARCH_2=y CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set # CONFIG_DMAPOOL_TEST is not set CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_MEMFD_CREATE=y CONFIG_SECRETMEM=y # CONFIG_ANON_VMA_NAME is not set # CONFIG_USERFAULTFD is not set CONFIG_LRU_GEN=y CONFIG_LRU_GEN_ENABLED=y # CONFIG_LRU_GEN_STATS is not set CONFIG_LRU_GEN_WALKS_MMU=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y CONFIG_IOMMU_MM_DATA=y CONFIG_EXECMEM=y CONFIG_NUMA_MEMBLKS=y # CONFIG_NUMA_EMU is not set CONFIG_PT_RECLAIM=y # # Data Access Monitoring # # CONFIG_DAMON is not set # end of Data Access Monitoring # end of Memory Management options CONFIG_NET=y CONFIG_WANT_COMPAT_NETLINK_MESSAGES=y CONFIG_COMPAT_NETLINK_MESSAGES=y CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_XGRESS=y CONFIG_NET_REDIRECT=y CONFIG_SKB_DECRYPTED=y CONFIG_SKB_EXTENSIONS=y CONFIG_NET_DEVMEM=y CONFIG_NET_SHAPER=y CONFIG_NET_CRC32C=y # # Networking options # CONFIG_PACKET=y CONFIG_PACKET_DIAG=y CONFIG_INET_PSP=y CONFIG_UNIX=y CONFIG_AF_UNIX_OOB=y CONFIG_UNIX_DIAG=y CONFIG_TLS=y CONFIG_TLS_DEVICE=y CONFIG_TLS_TOE=y CONFIG_XFRM=y CONFIG_XFRM_OFFLOAD=y CONFIG_XFRM_ALGO=y CONFIG_XFRM_USER=y CONFIG_XFRM_USER_COMPAT=y CONFIG_XFRM_INTERFACE=y CONFIG_XFRM_SUB_POLICY=y CONFIG_XFRM_MIGRATE=y CONFIG_XFRM_STATISTICS=y CONFIG_XFRM_AH=y CONFIG_XFRM_ESP=y CONFIG_XFRM_IPCOMP=y CONFIG_NET_KEY=y CONFIG_NET_KEY_MIGRATE=y # CONFIG_XFRM_IPTFS is not set CONFIG_XFRM_ESPINTCP=y CONFIG_SMC=y CONFIG_SMC_DIAG=y # CONFIG_SMC_HS_CTRL_BPF is not set CONFIG_DIBS=y CONFIG_DIBS_LO=y CONFIG_XDP_SOCKETS=y CONFIG_XDP_SOCKETS_DIAG=y CONFIG_NET_HANDSHAKE=y CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y CONFIG_IP_FIB_TRIE_STATS=y CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_ROUTE_CLASSID=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_RARP=y CONFIG_NET_IPIP=y CONFIG_NET_IPGRE_DEMUX=y CONFIG_NET_IP_TUNNEL=y CONFIG_NET_IPGRE=y CONFIG_NET_IPGRE_BROADCAST=y CONFIG_IP_MROUTE_COMMON=y CONFIG_IP_MROUTE=y CONFIG_IP_MROUTE_MULTIPLE_TABLES=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y CONFIG_SYN_COOKIES=y CONFIG_NET_IPVTI=y CONFIG_NET_UDP_TUNNEL=y CONFIG_NET_FOU=y CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_INET_AH=y CONFIG_INET_ESP=y CONFIG_INET_ESP_OFFLOAD=y CONFIG_INET_ESPINTCP=y CONFIG_INET_IPCOMP=y CONFIG_INET_TABLE_PERTURB_ORDER=16 CONFIG_INET_XFRM_TUNNEL=y CONFIG_INET_TUNNEL=y CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y CONFIG_INET_UDP_DIAG=y CONFIG_INET_RAW_DIAG=y CONFIG_INET_DIAG_DESTROY=y CONFIG_TCP_CONG_ADVANCED=y CONFIG_TCP_CONG_BIC=y CONFIG_TCP_CONG_CUBIC=y CONFIG_TCP_CONG_WESTWOOD=y CONFIG_TCP_CONG_HTCP=y CONFIG_TCP_CONG_HSTCP=y CONFIG_TCP_CONG_HYBLA=y CONFIG_TCP_CONG_VEGAS=y CONFIG_TCP_CONG_NV=y CONFIG_TCP_CONG_SCALABLE=y CONFIG_TCP_CONG_LP=y CONFIG_TCP_CONG_VENO=y CONFIG_TCP_CONG_YEAH=y CONFIG_TCP_CONG_ILLINOIS=y CONFIG_TCP_CONG_DCTCP=y CONFIG_TCP_CONG_CDG=y CONFIG_TCP_CONG_BBR=y # CONFIG_DEFAULT_BIC is not set CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_HTCP is not set # CONFIG_DEFAULT_HYBLA is not set # CONFIG_DEFAULT_VEGAS is not set # CONFIG_DEFAULT_VENO is not set # CONFIG_DEFAULT_WESTWOOD is not set # CONFIG_DEFAULT_DCTCP is not set # CONFIG_DEFAULT_CDG is not set # CONFIG_DEFAULT_BBR is not set # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_AO is not set CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTE_INFO=y CONFIG_IPV6_OPTIMISTIC_DAD=y CONFIG_INET6_AH=y CONFIG_INET6_ESP=y CONFIG_INET6_ESP_OFFLOAD=y CONFIG_INET6_ESPINTCP=y CONFIG_INET6_IPCOMP=y CONFIG_IPV6_MIP6=y CONFIG_IPV6_ILA=y CONFIG_INET6_XFRM_TUNNEL=y CONFIG_INET6_TUNNEL=y CONFIG_IPV6_VTI=y CONFIG_IPV6_SIT=y CONFIG_IPV6_SIT_6RD=y CONFIG_IPV6_NDISC_NODETYPE=y CONFIG_IPV6_TUNNEL=y CONFIG_IPV6_GRE=y CONFIG_IPV6_FOU=y CONFIG_IPV6_FOU_TUNNEL=y CONFIG_IPV6_MULTIPLE_TABLES=y CONFIG_IPV6_SUBTREES=y CONFIG_IPV6_MROUTE=y CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y CONFIG_IPV6_PIMSM_V2=y CONFIG_IPV6_SEG6_LWTUNNEL=y CONFIG_IPV6_SEG6_HMAC=y CONFIG_IPV6_SEG6_BPF=y CONFIG_IPV6_RPL_LWTUNNEL=y # CONFIG_IPV6_IOAM6_LWTUNNEL is not set CONFIG_NETLABEL=y CONFIG_MPTCP=y CONFIG_INET_MPTCP_DIAG=y CONFIG_MPTCP_IPV6=y CONFIG_NETWORK_SECMARK=y CONFIG_NET_PTP_CLASSIFY=y # CONFIG_NETWORK_PHY_TIMESTAMPING is not set CONFIG_NETFILTER=y CONFIG_NETFILTER_ADVANCED=y CONFIG_BRIDGE_NETFILTER=y # # Core Netfilter Configuration # CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_EGRESS=y CONFIG_NETFILTER_SKIP_EGRESS=y CONFIG_NETFILTER_NETLINK=y CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_FAMILY_ARP=y CONFIG_NETFILTER_BPF_LINK=y # CONFIG_NETFILTER_NETLINK_HOOK is not set CONFIG_NETFILTER_NETLINK_ACCT=y CONFIG_NETFILTER_NETLINK_QUEUE=y CONFIG_NETFILTER_NETLINK_LOG=y CONFIG_NETFILTER_NETLINK_OSF=y CONFIG_NF_CONNTRACK=y CONFIG_NF_LOG_SYSLOG=y CONFIG_NETFILTER_CONNCOUNT=y CONFIG_NF_CONNTRACK_MARK=y CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_ZONES=y # CONFIG_NF_CONNTRACK_PROCFS is not set CONFIG_NF_CONNTRACK_EVENTS=y CONFIG_NF_CONNTRACK_TIMEOUT=y CONFIG_NF_CONNTRACK_TIMESTAMP=y CONFIG_NF_CONNTRACK_LABELS=y CONFIG_NF_CONNTRACK_OVS=y CONFIG_NF_CT_PROTO_GRE=y CONFIG_NF_CT_PROTO_SCTP=y CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=y CONFIG_NF_CONNTRACK_FTP=y CONFIG_NF_CONNTRACK_H323=y CONFIG_NF_CONNTRACK_IRC=y CONFIG_NF_CONNTRACK_BROADCAST=y CONFIG_NF_CONNTRACK_NETBIOS_NS=y CONFIG_NF_CONNTRACK_SNMP=y CONFIG_NF_CONNTRACK_PPTP=y CONFIG_NF_CONNTRACK_SANE=y CONFIG_NF_CONNTRACK_SIP=y CONFIG_NF_CONNTRACK_TFTP=y CONFIG_NF_CT_NETLINK=y CONFIG_NF_CT_NETLINK_TIMEOUT=y CONFIG_NF_CT_NETLINK_HELPER=y CONFIG_NETFILTER_NETLINK_GLUE_CT=y CONFIG_NF_NAT=y CONFIG_NF_NAT_AMANDA=y CONFIG_NF_NAT_FTP=y CONFIG_NF_NAT_IRC=y CONFIG_NF_NAT_SIP=y CONFIG_NF_NAT_TFTP=y CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y CONFIG_NF_NAT_OVS=y CONFIG_NETFILTER_SYNPROXY=y CONFIG_NF_TABLES=y CONFIG_NF_TABLES_INET=y CONFIG_NF_TABLES_NETDEV=y CONFIG_NFT_NUMGEN=y CONFIG_NFT_CT=y CONFIG_NFT_EXTHDR_DCCP=y CONFIG_NFT_FLOW_OFFLOAD=y CONFIG_NFT_CONNLIMIT=y CONFIG_NFT_LOG=y CONFIG_NFT_LIMIT=y CONFIG_NFT_MASQ=y CONFIG_NFT_REDIR=y CONFIG_NFT_NAT=y CONFIG_NFT_TUNNEL=y CONFIG_NFT_QUEUE=y CONFIG_NFT_QUOTA=y CONFIG_NFT_REJECT=y CONFIG_NFT_REJECT_INET=y CONFIG_NFT_COMPAT=y CONFIG_NFT_HASH=y CONFIG_NFT_FIB=y CONFIG_NFT_FIB_INET=y CONFIG_NFT_XFRM=y CONFIG_NFT_SOCKET=y CONFIG_NFT_OSF=y CONFIG_NFT_TPROXY=y CONFIG_NFT_SYNPROXY=y CONFIG_NF_DUP_NETDEV=y CONFIG_NFT_DUP_NETDEV=y CONFIG_NFT_FWD_NETDEV=y CONFIG_NFT_FIB_NETDEV=y CONFIG_NFT_REJECT_NETDEV=y CONFIG_NF_FLOW_TABLE_INET=y CONFIG_NF_FLOW_TABLE=y # CONFIG_NF_FLOW_TABLE_PROCFS is not set CONFIG_NETFILTER_XTABLES=y CONFIG_NETFILTER_XTABLES_COMPAT=y CONFIG_NETFILTER_XTABLES_LEGACY=y # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=y CONFIG_NETFILTER_XT_CONNMARK=y CONFIG_NETFILTER_XT_SET=y # # Xtables targets # CONFIG_NETFILTER_XT_TARGET_AUDIT=y CONFIG_NETFILTER_XT_TARGET_CHECKSUM=y CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y CONFIG_NETFILTER_XT_TARGET_CONNMARK=y CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y CONFIG_NETFILTER_XT_TARGET_CT=y CONFIG_NETFILTER_XT_TARGET_DSCP=y CONFIG_NETFILTER_XT_TARGET_HL=y CONFIG_NETFILTER_XT_TARGET_HMARK=y CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y CONFIG_NETFILTER_XT_TARGET_LED=y CONFIG_NETFILTER_XT_TARGET_LOG=y CONFIG_NETFILTER_XT_TARGET_MARK=y CONFIG_NETFILTER_XT_NAT=y CONFIG_NETFILTER_XT_TARGET_NETMAP=y CONFIG_NETFILTER_XT_TARGET_NFLOG=y CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y CONFIG_NETFILTER_XT_TARGET_NOTRACK=y CONFIG_NETFILTER_XT_TARGET_RATEEST=y CONFIG_NETFILTER_XT_TARGET_REDIRECT=y CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y CONFIG_NETFILTER_XT_TARGET_TEE=y CONFIG_NETFILTER_XT_TARGET_TPROXY=y CONFIG_NETFILTER_XT_TARGET_TRACE=y CONFIG_NETFILTER_XT_TARGET_SECMARK=y CONFIG_NETFILTER_XT_TARGET_TCPMSS=y CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=y # # Xtables matches # CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y CONFIG_NETFILTER_XT_MATCH_BPF=y CONFIG_NETFILTER_XT_MATCH_CGROUP=y CONFIG_NETFILTER_XT_MATCH_CLUSTER=y CONFIG_NETFILTER_XT_MATCH_COMMENT=y CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y CONFIG_NETFILTER_XT_MATCH_CONNLABEL=y CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y CONFIG_NETFILTER_XT_MATCH_CONNMARK=y CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y CONFIG_NETFILTER_XT_MATCH_CPU=y CONFIG_NETFILTER_XT_MATCH_DCCP=y CONFIG_NETFILTER_XT_MATCH_DEVGROUP=y CONFIG_NETFILTER_XT_MATCH_DSCP=y CONFIG_NETFILTER_XT_MATCH_ECN=y CONFIG_NETFILTER_XT_MATCH_ESP=y CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y CONFIG_NETFILTER_XT_MATCH_HELPER=y CONFIG_NETFILTER_XT_MATCH_HL=y CONFIG_NETFILTER_XT_MATCH_IPCOMP=y CONFIG_NETFILTER_XT_MATCH_IPRANGE=y CONFIG_NETFILTER_XT_MATCH_IPVS=y CONFIG_NETFILTER_XT_MATCH_L2TP=y CONFIG_NETFILTER_XT_MATCH_LENGTH=y CONFIG_NETFILTER_XT_MATCH_LIMIT=y CONFIG_NETFILTER_XT_MATCH_MAC=y CONFIG_NETFILTER_XT_MATCH_MARK=y CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y CONFIG_NETFILTER_XT_MATCH_NFACCT=y CONFIG_NETFILTER_XT_MATCH_OSF=y CONFIG_NETFILTER_XT_MATCH_OWNER=y CONFIG_NETFILTER_XT_MATCH_POLICY=y CONFIG_NETFILTER_XT_MATCH_PHYSDEV=y CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y CONFIG_NETFILTER_XT_MATCH_QUOTA=y CONFIG_NETFILTER_XT_MATCH_RATEEST=y CONFIG_NETFILTER_XT_MATCH_REALM=y CONFIG_NETFILTER_XT_MATCH_RECENT=y CONFIG_NETFILTER_XT_MATCH_SCTP=y CONFIG_NETFILTER_XT_MATCH_SOCKET=y CONFIG_NETFILTER_XT_MATCH_STATE=y CONFIG_NETFILTER_XT_MATCH_STATISTIC=y CONFIG_NETFILTER_XT_MATCH_STRING=y CONFIG_NETFILTER_XT_MATCH_TCPMSS=y CONFIG_NETFILTER_XT_MATCH_TIME=y CONFIG_NETFILTER_XT_MATCH_U32=y # end of Core Netfilter Configuration CONFIG_IP_SET=y CONFIG_IP_SET_MAX=256 CONFIG_IP_SET_BITMAP_IP=y CONFIG_IP_SET_BITMAP_IPMAC=y CONFIG_IP_SET_BITMAP_PORT=y CONFIG_IP_SET_HASH_IP=y CONFIG_IP_SET_HASH_IPMARK=y CONFIG_IP_SET_HASH_IPPORT=y CONFIG_IP_SET_HASH_IPPORTIP=y CONFIG_IP_SET_HASH_IPPORTNET=y CONFIG_IP_SET_HASH_IPMAC=y CONFIG_IP_SET_HASH_MAC=y CONFIG_IP_SET_HASH_NETPORTNET=y CONFIG_IP_SET_HASH_NET=y CONFIG_IP_SET_HASH_NETNET=y CONFIG_IP_SET_HASH_NETPORT=y CONFIG_IP_SET_HASH_NETIFACE=y CONFIG_IP_SET_LIST_SET=y CONFIG_IP_VS=y CONFIG_IP_VS_IPV6=y # CONFIG_IP_VS_DEBUG is not set CONFIG_IP_VS_TAB_BITS=12 # # IPVS transport protocol load balancing support # CONFIG_IP_VS_PROTO_TCP=y CONFIG_IP_VS_PROTO_UDP=y CONFIG_IP_VS_PROTO_AH_ESP=y CONFIG_IP_VS_PROTO_ESP=y CONFIG_IP_VS_PROTO_AH=y CONFIG_IP_VS_PROTO_SCTP=y # # IPVS scheduler # CONFIG_IP_VS_RR=y CONFIG_IP_VS_WRR=y CONFIG_IP_VS_LC=y CONFIG_IP_VS_WLC=y CONFIG_IP_VS_FO=y CONFIG_IP_VS_OVF=y CONFIG_IP_VS_LBLC=y CONFIG_IP_VS_LBLCR=y CONFIG_IP_VS_DH=y CONFIG_IP_VS_SH=y CONFIG_IP_VS_MH=y CONFIG_IP_VS_SED=y CONFIG_IP_VS_NQ=y CONFIG_IP_VS_TWOS=y # # IPVS SH scheduler # CONFIG_IP_VS_SH_TAB_BITS=8 # # IPVS MH scheduler # CONFIG_IP_VS_MH_TAB_INDEX=12 # # IPVS application helper # CONFIG_IP_VS_FTP=y CONFIG_IP_VS_NFCT=y CONFIG_IP_VS_PE_SIP=y # # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=y CONFIG_IP_NF_IPTABLES_LEGACY=y CONFIG_NF_SOCKET_IPV4=y CONFIG_NF_TPROXY_IPV4=y CONFIG_NF_TABLES_IPV4=y CONFIG_NFT_REJECT_IPV4=y CONFIG_NFT_DUP_IPV4=y CONFIG_NFT_FIB_IPV4=y CONFIG_NF_TABLES_ARP=y CONFIG_NF_DUP_IPV4=y CONFIG_NF_LOG_ARP=y CONFIG_NF_LOG_IPV4=y CONFIG_NF_REJECT_IPV4=y CONFIG_NF_NAT_SNMP_BASIC=y CONFIG_NF_NAT_PPTP=y CONFIG_NF_NAT_H323=y CONFIG_IP_NF_IPTABLES=y CONFIG_IP_NF_MATCH_AH=y CONFIG_IP_NF_MATCH_ECN=y CONFIG_IP_NF_MATCH_RPFILTER=y CONFIG_IP_NF_MATCH_TTL=y CONFIG_IP_NF_FILTER=y CONFIG_IP_NF_TARGET_REJECT=y CONFIG_IP_NF_TARGET_SYNPROXY=y CONFIG_IP_NF_NAT=y CONFIG_IP_NF_TARGET_MASQUERADE=y CONFIG_IP_NF_TARGET_NETMAP=y CONFIG_IP_NF_TARGET_REDIRECT=y CONFIG_IP_NF_MANGLE=y CONFIG_IP_NF_TARGET_ECN=y CONFIG_IP_NF_TARGET_TTL=y CONFIG_IP_NF_RAW=y CONFIG_IP_NF_SECURITY=y CONFIG_IP_NF_ARPTABLES=y CONFIG_NFT_COMPAT_ARP=y CONFIG_IP_NF_ARPFILTER=y CONFIG_IP_NF_ARP_MANGLE=y # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # CONFIG_IP6_NF_IPTABLES_LEGACY=y CONFIG_NF_SOCKET_IPV6=y CONFIG_NF_TPROXY_IPV6=y CONFIG_NF_TABLES_IPV6=y CONFIG_NFT_REJECT_IPV6=y CONFIG_NFT_DUP_IPV6=y CONFIG_NFT_FIB_IPV6=y CONFIG_NF_DUP_IPV6=y CONFIG_NF_REJECT_IPV6=y CONFIG_NF_LOG_IPV6=y CONFIG_IP6_NF_IPTABLES=y CONFIG_IP6_NF_MATCH_AH=y CONFIG_IP6_NF_MATCH_EUI64=y CONFIG_IP6_NF_MATCH_FRAG=y CONFIG_IP6_NF_MATCH_OPTS=y CONFIG_IP6_NF_MATCH_HL=y CONFIG_IP6_NF_MATCH_IPV6HEADER=y CONFIG_IP6_NF_MATCH_MH=y CONFIG_IP6_NF_MATCH_RPFILTER=y CONFIG_IP6_NF_MATCH_RT=y CONFIG_IP6_NF_MATCH_SRH=y CONFIG_IP6_NF_TARGET_HL=y CONFIG_IP6_NF_FILTER=y CONFIG_IP6_NF_TARGET_REJECT=y CONFIG_IP6_NF_TARGET_SYNPROXY=y CONFIG_IP6_NF_MANGLE=y CONFIG_IP6_NF_RAW=y CONFIG_IP6_NF_SECURITY=y CONFIG_IP6_NF_NAT=y CONFIG_IP6_NF_TARGET_MASQUERADE=y CONFIG_IP6_NF_TARGET_NPT=y # end of IPv6: Netfilter Configuration CONFIG_NF_DEFRAG_IPV6=y CONFIG_NF_TABLES_BRIDGE=y CONFIG_NFT_BRIDGE_META=y CONFIG_NFT_BRIDGE_REJECT=y CONFIG_NF_CONNTRACK_BRIDGE=y CONFIG_BRIDGE_NF_EBTABLES_LEGACY=y CONFIG_BRIDGE_NF_EBTABLES=y CONFIG_BRIDGE_EBT_BROUTE=y CONFIG_BRIDGE_EBT_T_FILTER=y CONFIG_BRIDGE_EBT_T_NAT=y CONFIG_BRIDGE_EBT_802_3=y CONFIG_BRIDGE_EBT_AMONG=y CONFIG_BRIDGE_EBT_ARP=y CONFIG_BRIDGE_EBT_IP=y CONFIG_BRIDGE_EBT_IP6=y CONFIG_BRIDGE_EBT_LIMIT=y CONFIG_BRIDGE_EBT_MARK=y CONFIG_BRIDGE_EBT_PKTTYPE=y CONFIG_BRIDGE_EBT_STP=y CONFIG_BRIDGE_EBT_VLAN=y CONFIG_BRIDGE_EBT_ARPREPLY=y CONFIG_BRIDGE_EBT_DNAT=y CONFIG_BRIDGE_EBT_MARK_T=y CONFIG_BRIDGE_EBT_REDIRECT=y CONFIG_BRIDGE_EBT_SNAT=y CONFIG_BRIDGE_EBT_LOG=y CONFIG_BRIDGE_EBT_NFLOG=y CONFIG_IP_SCTP=y # CONFIG_SCTP_DBG_OBJCNT is not set CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA256=y # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set CONFIG_INET_SCTP_DIAG=y CONFIG_RDS=y CONFIG_RDS_RDMA=y CONFIG_RDS_TCP=y # CONFIG_RDS_DEBUG is not set CONFIG_TIPC=y CONFIG_TIPC_MEDIA_IB=y CONFIG_TIPC_MEDIA_UDP=y CONFIG_TIPC_CRYPTO=y CONFIG_TIPC_DIAG=y CONFIG_ATM=y CONFIG_ATM_CLIP=y # CONFIG_ATM_CLIP_NO_ICMP is not set CONFIG_ATM_LANE=y CONFIG_ATM_MPOA=y CONFIG_ATM_BR2684=y # CONFIG_ATM_BR2684_IPFILTER is not set CONFIG_L2TP=y # CONFIG_L2TP_DEBUGFS is not set CONFIG_L2TP_V3=y CONFIG_L2TP_IP=y CONFIG_L2TP_ETH=y CONFIG_STP=y CONFIG_GARP=y CONFIG_MRP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y CONFIG_BRIDGE_MRP=y CONFIG_BRIDGE_CFM=y CONFIG_NET_DSA=y # CONFIG_NET_DSA_TAG_NONE is not set # CONFIG_NET_DSA_TAG_AR9331 is not set CONFIG_NET_DSA_TAG_BRCM_COMMON=y CONFIG_NET_DSA_TAG_BRCM=y # CONFIG_NET_DSA_TAG_BRCM_LEGACY is not set # CONFIG_NET_DSA_TAG_BRCM_LEGACY_FCS is not set CONFIG_NET_DSA_TAG_BRCM_PREPEND=y # CONFIG_NET_DSA_TAG_HELLCREEK is not set # CONFIG_NET_DSA_TAG_GSWIP is not set # CONFIG_NET_DSA_TAG_DSA is not set # CONFIG_NET_DSA_TAG_EDSA is not set CONFIG_NET_DSA_TAG_MTK=y # CONFIG_NET_DSA_TAG_MXL_862XX is not set # CONFIG_NET_DSA_TAG_MXL_GSW1XX is not set # CONFIG_NET_DSA_TAG_KSZ is not set # CONFIG_NET_DSA_TAG_OCELOT is not set # CONFIG_NET_DSA_TAG_OCELOT_8021Q is not set CONFIG_NET_DSA_TAG_QCA=y CONFIG_NET_DSA_TAG_RTL4_A=y # CONFIG_NET_DSA_TAG_RTL8_4 is not set # CONFIG_NET_DSA_TAG_RZN1_A5PSW is not set # CONFIG_NET_DSA_TAG_LAN9303 is not set # CONFIG_NET_DSA_TAG_SJA1105 is not set # CONFIG_NET_DSA_TAG_TRAILER is not set # CONFIG_NET_DSA_TAG_VSC73XX_8021Q is not set # CONFIG_NET_DSA_TAG_XRS700X is not set # CONFIG_NET_DSA_TAG_YT921X is not set CONFIG_VLAN_8021Q=y CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y CONFIG_LLC=y CONFIG_LLC2=y # CONFIG_ATALK is not set CONFIG_X25=y CONFIG_LAPB=y CONFIG_PHONET=y CONFIG_6LOWPAN=y # CONFIG_6LOWPAN_DEBUGFS is not set CONFIG_6LOWPAN_NHC=y CONFIG_6LOWPAN_NHC_DEST=y CONFIG_6LOWPAN_NHC_FRAGMENT=y CONFIG_6LOWPAN_NHC_HOP=y CONFIG_6LOWPAN_NHC_IPV6=y CONFIG_6LOWPAN_NHC_MOBILITY=y CONFIG_6LOWPAN_NHC_ROUTING=y CONFIG_6LOWPAN_NHC_UDP=y CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=y CONFIG_6LOWPAN_GHC_UDP=y CONFIG_6LOWPAN_GHC_ICMPV6=y CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=y CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=y CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=y CONFIG_IEEE802154=y CONFIG_IEEE802154_NL802154_EXPERIMENTAL=y CONFIG_IEEE802154_SOCKET=y CONFIG_IEEE802154_6LOWPAN=y CONFIG_MAC802154=y CONFIG_NET_SCHED=y # # Queueing/Scheduling # CONFIG_NET_SCH_HTB=y CONFIG_NET_SCH_HFSC=y CONFIG_NET_SCH_PRIO=y CONFIG_NET_SCH_MULTIQ=y CONFIG_NET_SCH_RED=y CONFIG_NET_SCH_SFB=y CONFIG_NET_SCH_SFQ=y CONFIG_NET_SCH_TEQL=y CONFIG_NET_SCH_TBF=y CONFIG_NET_SCH_CBS=y CONFIG_NET_SCH_ETF=y CONFIG_NET_SCH_MQPRIO_LIB=y CONFIG_NET_SCH_TAPRIO=y CONFIG_NET_SCH_GRED=y CONFIG_NET_SCH_NETEM=y CONFIG_NET_SCH_DRR=y CONFIG_NET_SCH_MQPRIO=y CONFIG_NET_SCH_SKBPRIO=y CONFIG_NET_SCH_CHOKE=y CONFIG_NET_SCH_QFQ=y CONFIG_NET_SCH_CODEL=y CONFIG_NET_SCH_FQ_CODEL=y CONFIG_NET_SCH_CAKE=y CONFIG_NET_SCH_FQ=y CONFIG_NET_SCH_HHF=y CONFIG_NET_SCH_PIE=y CONFIG_NET_SCH_FQ_PIE=y CONFIG_NET_SCH_INGRESS=y CONFIG_NET_SCH_PLUG=y CONFIG_NET_SCH_ETS=y # CONFIG_NET_SCH_DUALPI2 is not set CONFIG_NET_SCH_DEFAULT=y # CONFIG_DEFAULT_FQ is not set CONFIG_DEFAULT_CODEL=y # CONFIG_DEFAULT_FQ_CODEL is not set # CONFIG_DEFAULT_FQ_PIE is not set # CONFIG_DEFAULT_SFQ is not set # CONFIG_DEFAULT_PFIFO_FAST is not set CONFIG_DEFAULT_NET_SCH="pfifo_fast" # # Classification # CONFIG_NET_CLS=y CONFIG_NET_CLS_BASIC=y CONFIG_NET_CLS_ROUTE4=y CONFIG_NET_CLS_FW=y CONFIG_NET_CLS_U32=y CONFIG_CLS_U32_PERF=y CONFIG_CLS_U32_MARK=y CONFIG_NET_CLS_FLOW=y CONFIG_NET_CLS_CGROUP=y CONFIG_NET_CLS_BPF=y CONFIG_NET_CLS_FLOWER=y CONFIG_NET_CLS_MATCHALL=y CONFIG_NET_EMATCH=y CONFIG_NET_EMATCH_STACK=32 CONFIG_NET_EMATCH_CMP=y CONFIG_NET_EMATCH_NBYTE=y CONFIG_NET_EMATCH_U32=y CONFIG_NET_EMATCH_META=y CONFIG_NET_EMATCH_TEXT=y CONFIG_NET_EMATCH_CANID=y CONFIG_NET_EMATCH_IPSET=y CONFIG_NET_EMATCH_IPT=y CONFIG_NET_CLS_ACT=y CONFIG_NET_ACT_POLICE=y CONFIG_NET_ACT_GACT=y CONFIG_GACT_PROB=y CONFIG_NET_ACT_MIRRED=y CONFIG_NET_ACT_SAMPLE=y CONFIG_NET_ACT_NAT=y CONFIG_NET_ACT_PEDIT=y CONFIG_NET_ACT_SIMP=y CONFIG_NET_ACT_SKBEDIT=y CONFIG_NET_ACT_CSUM=y CONFIG_NET_ACT_MPLS=y CONFIG_NET_ACT_VLAN=y CONFIG_NET_ACT_BPF=y CONFIG_NET_ACT_CONNMARK=y CONFIG_NET_ACT_CTINFO=y CONFIG_NET_ACT_SKBMOD=y CONFIG_NET_ACT_IFE=y CONFIG_NET_ACT_TUNNEL_KEY=y CONFIG_NET_ACT_CT=y CONFIG_NET_ACT_GATE=y CONFIG_NET_IFE_SKBMARK=y CONFIG_NET_IFE_SKBPRIO=y CONFIG_NET_IFE_SKBTCINDEX=y CONFIG_NET_TC_SKB_EXT=y CONFIG_NET_SCH_FIFO=y CONFIG_DCB=y CONFIG_DNS_RESOLVER=y CONFIG_BATMAN_ADV=y CONFIG_BATMAN_ADV_BATMAN_V=y CONFIG_BATMAN_ADV_BLA=y CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_MCAST=y # CONFIG_BATMAN_ADV_DEBUG is not set # CONFIG_BATMAN_ADV_TRACING is not set CONFIG_OPENVSWITCH=y CONFIG_OPENVSWITCH_GRE=y CONFIG_OPENVSWITCH_VXLAN=y CONFIG_OPENVSWITCH_GENEVE=y CONFIG_VSOCKETS=y CONFIG_VSOCKETS_DIAG=y CONFIG_VSOCKETS_LOOPBACK=y CONFIG_VIRTIO_VSOCKETS=y CONFIG_VIRTIO_VSOCKETS_COMMON=y CONFIG_NETLINK_DIAG=y CONFIG_MPLS=y CONFIG_NET_MPLS_GSO=y CONFIG_MPLS_ROUTING=y CONFIG_MPLS_IPTUNNEL=y CONFIG_NET_NSH=y CONFIG_HSR=y CONFIG_NET_SWITCHDEV=y CONFIG_NET_L3_MASTER_DEV=y CONFIG_QRTR=y CONFIG_QRTR_TUN=y CONFIG_NET_NCSI=y # CONFIG_NCSI_OEM_CMD_GET_MAC is not set # CONFIG_NCSI_OEM_CMD_KEEP_PHY is not set # CONFIG_PCPU_DEV_REFCNT is not set CONFIG_MAX_SKB_FRAGS=17 CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_SOCK_RX_QUEUE_MAPPING=y CONFIG_XPS=y CONFIG_CGROUP_NET_PRIO=y CONFIG_CGROUP_NET_CLASSID=y CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y CONFIG_NET_FLOW_LIMIT=y # # Network testing # # CONFIG_NET_PKTGEN is not set CONFIG_NET_DROP_MONITOR=y # end of Network testing # end of Networking options # CONFIG_HAMRADIO is not set CONFIG_CAN=y CONFIG_CAN_RAW=y CONFIG_CAN_BCM=y CONFIG_CAN_GW=y CONFIG_CAN_J1939=y CONFIG_CAN_ISOTP=y CONFIG_BT=y CONFIG_BT_BREDR=y # CONFIG_BT_RFCOMM is not set # CONFIG_BT_BNEP is not set CONFIG_BT_HIDP=y # CONFIG_BT_LE is not set # CONFIG_BT_LEDS is not set # CONFIG_BT_MSFTEXT is not set # CONFIG_BT_AOSPEXT is not set # CONFIG_BT_DEBUGFS is not set # CONFIG_BT_SELFTEST is not set # CONFIG_BT_FEATURE_DEBUG is not set # # Bluetooth device drivers # CONFIG_BT_INTEL=y CONFIG_BT_BCM=y CONFIG_BT_RTL=y CONFIG_BT_MTK=y CONFIG_BT_HCIBTUSB=y CONFIG_BT_HCIBTUSB_AUTOSUSPEND=y CONFIG_BT_HCIBTUSB_POLL_SYNC=y CONFIG_BT_HCIBTUSB_BCM=y CONFIG_BT_HCIBTUSB_MTK=y CONFIG_BT_HCIBTUSB_RTL=y # CONFIG_BT_HCIBTSDIO is not set CONFIG_BT_HCIUART=y CONFIG_BT_HCIUART_SERDEV=y CONFIG_BT_HCIUART_H4=y # CONFIG_BT_HCIUART_NOKIA is not set # CONFIG_BT_HCIUART_BCSP is not set # CONFIG_BT_HCIUART_ATH3K is not set # CONFIG_BT_HCIUART_LL is not set # CONFIG_BT_HCIUART_3WIRE is not set # CONFIG_BT_HCIUART_INTEL is not set # CONFIG_BT_HCIUART_RTL is not set # CONFIG_BT_HCIUART_QCA is not set # CONFIG_BT_HCIUART_AG6XX is not set # CONFIG_BT_HCIUART_MRVL is not set # CONFIG_BT_HCIUART_AML is not set CONFIG_BT_HCIBCM203X=y # CONFIG_BT_HCIBCM4377 is not set CONFIG_BT_HCIBPA10X=y CONFIG_BT_HCIBFUSB=y # CONFIG_BT_HCIDTL1 is not set # CONFIG_BT_HCIBT3C is not set # CONFIG_BT_HCIBLUECARD is not set # CONFIG_BT_HCIVHCI is not set CONFIG_BT_MRVL=y CONFIG_BT_MRVL_SDIO=y CONFIG_BT_ATH3K=y CONFIG_BT_MTKSDIO=y CONFIG_BT_MTKUART=y # CONFIG_BT_VIRTIO is not set # CONFIG_BT_NXPUART is not set # CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers CONFIG_AF_RXRPC=y CONFIG_AF_RXRPC_IPV6=y # CONFIG_AF_RXRPC_INJECT_LOSS is not set # CONFIG_AF_RXRPC_INJECT_RX_DELAY is not set # CONFIG_AF_RXRPC_DEBUG is not set CONFIG_RXKAD=y # CONFIG_RXGK is not set # CONFIG_RXPERF is not set CONFIG_AF_KCM=y CONFIG_STREAM_PARSER=y CONFIG_MCTP=y CONFIG_FIB_RULES=y CONFIG_WIRELESS=y CONFIG_CFG80211=y # CONFIG_NL80211_TESTMODE is not set # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set # CONFIG_CFG80211_CERTIFICATION_ONUS is not set CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y CONFIG_CFG80211_DEFAULT_PS=y CONFIG_CFG80211_DEBUGFS=y CONFIG_CFG80211_CRDA_SUPPORT=y # CONFIG_CFG80211_WEXT is not set CONFIG_MAC80211=y CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y CONFIG_MAC80211_DEBUGFS=y # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_RFKILL=y CONFIG_RFKILL_LEDS=y CONFIG_RFKILL_INPUT=y # CONFIG_RFKILL_GPIO is not set CONFIG_NET_9P=y CONFIG_NET_9P_FD=y CONFIG_NET_9P_VIRTIO=y # CONFIG_NET_9P_USBG is not set CONFIG_NET_9P_RDMA=y # CONFIG_NET_9P_DEBUG is not set CONFIG_CAIF=y CONFIG_CAIF_DEBUG=y CONFIG_CAIF_NETDEV=y CONFIG_CAIF_USB=y CONFIG_CEPH_LIB=y # CONFIG_CEPH_LIB_PRETTYDEBUG is not set CONFIG_CEPH_LIB_USE_DNS_RESOLVER=y CONFIG_NFC=y CONFIG_NFC_DIGITAL=y CONFIG_NFC_NCI=y # CONFIG_NFC_NCI_SPI is not set CONFIG_NFC_NCI_UART=y CONFIG_NFC_HCI=y CONFIG_NFC_SHDLC=y # # Near Field Communication (NFC) devices # # CONFIG_NFC_TRF7970A is not set # CONFIG_NFC_MEI_PHY is not set CONFIG_NFC_SIM=y CONFIG_NFC_PORT100=y CONFIG_NFC_VIRTUAL_NCI=y CONFIG_NFC_FDP=y # CONFIG_NFC_FDP_I2C is not set # CONFIG_NFC_PN544_I2C is not set CONFIG_NFC_PN533=y CONFIG_NFC_PN533_USB=y # CONFIG_NFC_PN533_I2C is not set # CONFIG_NFC_PN532_UART is not set # CONFIG_NFC_MICROREAD_I2C is not set CONFIG_NFC_MRVL=y CONFIG_NFC_MRVL_USB=y # CONFIG_NFC_MRVL_UART is not set # CONFIG_NFC_MRVL_I2C is not set # CONFIG_NFC_ST21NFCA_I2C is not set # CONFIG_NFC_ST_NCI_I2C is not set # CONFIG_NFC_ST_NCI_SPI is not set # CONFIG_NFC_NXP_NCI is not set # CONFIG_NFC_S3FWRN5_I2C is not set # CONFIG_NFC_S3FWRN82_UART is not set # CONFIG_NFC_ST95HF is not set # end of Near Field Communication (NFC) devices CONFIG_PSAMPLE=y CONFIG_NET_IFE=y CONFIG_LWTUNNEL=y CONFIG_LWTUNNEL_BPF=y CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y CONFIG_SOCK_VALIDATE_XMIT=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SOCK_MSG=y CONFIG_NET_DEVLINK=y CONFIG_PAGE_POOL=y # CONFIG_PAGE_POOL_STATS is not set CONFIG_FAILOVER=y CONFIG_ETHTOOL_NETLINK=y # # Device Drivers # CONFIG_HAVE_PCI=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCIEPORTBUS=y # CONFIG_HOTPLUG_PCI_PCIE is not set # CONFIG_PCIEAER is not set CONFIG_PCIEASPM=y CONFIG_PCIEASPM_DEFAULT=y # CONFIG_PCIEASPM_POWERSAVE is not set # CONFIG_PCIEASPM_POWER_SUPERSAVE is not set # CONFIG_PCIEASPM_PERFORMANCE is not set CONFIG_PCIE_PME=y # CONFIG_PCIE_PTM is not set CONFIG_PCI_MSI=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCI_STUB is not set CONFIG_PCI_ATS=y CONFIG_PCI_IDE=y CONFIG_PCI_TSM=y CONFIG_PCI_DOE=y CONFIG_PCI_ECAM=y CONFIG_PCI_LOCKLESS_CONFIG=y # CONFIG_PCI_IOV is not set # CONFIG_PCI_NPEM is not set CONFIG_PCI_PRI=y CONFIG_PCI_PASID=y # CONFIG_PCIE_TPH is not set CONFIG_PCI_LABEL=y # CONFIG_PCI_DYNAMIC_OF_NODES is not set # CONFIG_PCIE_BUS_TUNE_OFF is not set CONFIG_PCIE_BUS_DEFAULT=y # CONFIG_PCIE_BUS_SAFE is not set # CONFIG_PCIE_BUS_PERFORMANCE is not set # CONFIG_PCIE_BUS_PEER2PEER is not set CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=16 CONFIG_HOTPLUG_PCI=y # CONFIG_HOTPLUG_PCI_ACPI is not set # CONFIG_HOTPLUG_PCI_CPCI is not set # CONFIG_HOTPLUG_PCI_OCTEONEP is not set # CONFIG_HOTPLUG_PCI_SHPC is not set # # PCI controller drivers # CONFIG_PCI_HOST_COMMON=y # CONFIG_PCI_FTPCI100 is not set CONFIG_PCI_HOST_GENERIC=y # CONFIG_VMD is not set # CONFIG_PCIE_XILINX is not set # # Cadence-based PCIe controllers # # CONFIG_PCIE_CADENCE_PLAT_HOST is not set # end of Cadence-based PCIe controllers # # DesignWare-based PCIe controllers # # CONFIG_PCI_MESON is not set # CONFIG_PCIE_INTEL_GW is not set # CONFIG_PCIE_DW_PLAT_HOST is not set # end of DesignWare-based PCIe controllers # # Mobiveil-based PCIe controllers # # end of Mobiveil-based PCIe controllers # # PLDA-based PCIe controllers # # CONFIG_PCIE_MICROCHIP_HOST is not set # end of PLDA-based PCIe controllers # end of PCI controller drivers # # PCI Endpoint # # CONFIG_PCI_ENDPOINT is not set # end of PCI Endpoint # # PCI switch controller drivers # # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers # CONFIG_PCI_PWRCTRL_SLOT is not set # CONFIG_PCI_PWRCTRL_TC9563 is not set # CONFIG_CXL_BUS is not set CONFIG_PCCARD=y CONFIG_PCMCIA=y CONFIG_PCMCIA_LOAD_CIS=y CONFIG_CARDBUS=y # # PC-card bridges # CONFIG_YENTA=y CONFIG_YENTA_O2=y CONFIG_YENTA_RICOH=y CONFIG_YENTA_TI=y CONFIG_YENTA_ENE_TUNE=y CONFIG_YENTA_TOSHIBA=y # CONFIG_PD6729 is not set # CONFIG_I82092 is not set CONFIG_PCCARD_NONSTATIC=y # CONFIG_RAPIDIO is not set # CONFIG_PC104 is not set # # Generic Driver Options # CONFIG_AUXILIARY_BUS=y CONFIG_UEVENT_HELPER=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_DEVTMPFS_SAFE is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # # Firmware loader # CONFIG_FW_LOADER=y CONFIG_EXTRA_FIRMWARE="" # CONFIG_FW_LOADER_USER_HELPER is not set # CONFIG_FW_LOADER_COMPRESS is not set CONFIG_FW_CACHE=y # CONFIG_FW_UPLOAD is not set # end of Firmware loader CONFIG_WANT_DEV_COREDUMP=y CONFIG_ALLOW_DEV_COREDUMP=y CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DRIVER is not set CONFIG_DEBUG_DEVRES=y # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SPI=y CONFIG_REGMAP_MMIO=y CONFIG_REGMAP_IRQ=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_DMA_FENCE_TRACE is not set # CONFIG_FW_DEVLINK_SYNC_STATE_TIMEOUT is not set # end of Generic Driver Options # # Bus devices # # CONFIG_MOXTET is not set # CONFIG_MHI_BUS is not set # CONFIG_MHI_BUS_EP is not set # end of Bus devices CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # # Firmware Drivers # # # ARM System Control and Management Interface Protocol # # end of ARM System Control and Management Interface Protocol # CONFIG_EDD is not set CONFIG_FIRMWARE_MEMMAP=y CONFIG_DMIID=y # CONFIG_DMI_SYSFS is not set CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y # CONFIG_ISCSI_IBFT is not set # CONFIG_FW_CFG_SYSFS is not set # CONFIG_SYSFB_SIMPLEFB is not set # CONFIG_GOOGLE_FIRMWARE is not set # # Qualcomm firmware drivers # # end of Qualcomm firmware drivers # # Tegra firmware driver # # end of Tegra firmware driver # end of Firmware Drivers # CONFIG_FWCTL is not set CONFIG_GNSS=y # CONFIG_GNSS_MTK_SERIAL is not set # CONFIG_GNSS_SIRF_SERIAL is not set # CONFIG_GNSS_UBX_SERIAL is not set CONFIG_GNSS_USB=y # CONFIG_MTD is not set CONFIG_DTC=y CONFIG_OF=y # CONFIG_OF_UNITTEST is not set CONFIG_OF_FLATTREE=y CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_KOBJ=y CONFIG_OF_ADDRESS=y CONFIG_OF_IRQ=y CONFIG_OF_RESERVED_MEM=y # CONFIG_OF_OVERLAY is not set CONFIG_OF_NUMA=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_PARPORT=y # CONFIG_PARPORT_PC is not set # CONFIG_PARPORT_1284 is not set CONFIG_PARPORT_NOT_PC=y CONFIG_PNP=y CONFIG_PNP_DEBUG_MESSAGES=y # # Protocols # CONFIG_PNPACPI=y CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_NULL_BLK is not set # CONFIG_BLK_DEV_FD is not set CONFIG_CDROM=y # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set # CONFIG_ZRAM is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 # CONFIG_BLK_DEV_DRBD is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_ATA_OVER_ETH is not set CONFIG_VIRTIO_BLK=y # CONFIG_BLK_DEV_RBD is not set # CONFIG_BLK_DEV_UBLK is not set # CONFIG_BLK_DEV_RNBD_CLIENT is not set # # NVME Support # # CONFIG_BLK_DEV_NVME is not set # CONFIG_NVME_RDMA is not set # CONFIG_NVME_FC is not set # CONFIG_NVME_TCP is not set # CONFIG_NVME_TARGET is not set # end of NVME Support # # Misc devices # # CONFIG_AD525X_DPOT is not set # CONFIG_DUMMY_IRQ is not set # CONFIG_IBM_ASM is not set # CONFIG_PHANTOM is not set # CONFIG_RPMB is not set # CONFIG_TI_FPC202 is not set # CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set # CONFIG_HP_ILO is not set # CONFIG_APDS9802ALS is not set # CONFIG_ISL29003 is not set # CONFIG_ISL29020 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_SENSORS_BH1770 is not set # CONFIG_SENSORS_APDS990X is not set # CONFIG_HMC6352 is not set # CONFIG_DS1682 is not set # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set # CONFIG_DW_XDATA_PCIE is not set # CONFIG_PCI_ENDPOINT_TEST is not set # CONFIG_XILINX_SDFEC is not set CONFIG_MISC_RTSX=y # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set # CONFIG_NTSYNC is not set # CONFIG_VCPU_STALL_DETECTOR is not set # CONFIG_NSM is not set # CONFIG_C2PORT is not set # # EEPROM support # # CONFIG_EEPROM_AT24 is not set # CONFIG_EEPROM_AT25 is not set # CONFIG_EEPROM_MAX6875 is not set CONFIG_EEPROM_93CX6=y # CONFIG_EEPROM_93XX46 is not set # CONFIG_EEPROM_IDT_89HPESX is not set # CONFIG_EEPROM_EE1004 is not set # CONFIG_EEPROM_M24LR is not set # end of EEPROM support # CONFIG_CB710_CORE is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set CONFIG_INTEL_MEI=y CONFIG_INTEL_MEI_ME=y # CONFIG_INTEL_MEI_TXE is not set # CONFIG_INTEL_MEI_GSC is not set # CONFIG_INTEL_MEI_VSC_HW is not set # CONFIG_INTEL_MEI_HDCP is not set # CONFIG_INTEL_MEI_PXP is not set # CONFIG_INTEL_MEI_GSC_PROXY is not set # CONFIG_VMWARE_VMCI is not set # CONFIG_GENWQE is not set # CONFIG_BCM_VK is not set # CONFIG_MISC_ALCOR_PCI is not set # CONFIG_MISC_RTSX_PCI is not set CONFIG_MISC_RTSX_USB=y # CONFIG_UACCE is not set # CONFIG_PVPANIC is not set # CONFIG_GP_PCI1XXXX is not set # CONFIG_KEBA_CP500 is not set # CONFIG_MISC_RP1 is not set # end of Misc devices # # SCSI device support # CONFIG_SCSI_MOD=y # CONFIG_RAID_ATTRS is not set CONFIG_SCSI_COMMON=y CONFIG_SCSI=y CONFIG_SCSI_DMA=y CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set CONFIG_BLK_DEV_SR=y CONFIG_CHR_DEV_SG=y CONFIG_BLK_DEV_BSG=y # CONFIG_CHR_DEV_SCH is not set CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_SCAN_ASYNC is not set # # SCSI Transports # CONFIG_SCSI_SPI_ATTRS=y # CONFIG_SCSI_FC_ATTRS is not set CONFIG_SCSI_ISCSI_ATTRS=y # CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set CONFIG_SCSI_SRP_ATTRS=y # end of SCSI Transports CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_ISCSI_BOOT_SYSFS is not set # CONFIG_SCSI_CXGB3_ISCSI is not set # CONFIG_SCSI_CXGB4_ISCSI is not set # CONFIG_SCSI_BNX2_ISCSI is not set # CONFIG_BE2ISCSI is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_HPSA is not set # CONFIG_SCSI_3W_9XXX is not set # CONFIG_SCSI_3W_SAS is not set # CONFIG_SCSI_ACARD is not set # CONFIG_SCSI_AACRAID is not set # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC94XX is not set # CONFIG_SCSI_MVSAS is not set # CONFIG_SCSI_MVUMI is not set # CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_ARCMSR is not set # CONFIG_SCSI_ESAS2R is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_MPT3SAS is not set # CONFIG_SCSI_MPT2SAS is not set # CONFIG_SCSI_MPI3MR is not set # CONFIG_SCSI_SMARTPQI is not set # CONFIG_SCSI_HPTIOP is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_MYRB is not set # CONFIG_SCSI_MYRS is not set # CONFIG_VMWARE_PVSCSI is not set # CONFIG_SCSI_SNIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FDOMAIN_PCI is not set # CONFIG_SCSI_ISCI is not set # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_STEX is not set # CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_IPR is not set # CONFIG_SCSI_QLOGIC_1280 is not set # CONFIG_SCSI_QLA_ISCSI is not set # CONFIG_SCSI_DC395x is not set # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_WD719X is not set # CONFIG_SCSI_DEBUG is not set # CONFIG_SCSI_PMCRAID is not set # CONFIG_SCSI_PM8001 is not set CONFIG_SCSI_VIRTIO=y # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set # CONFIG_SCSI_DH is not set # end of SCSI device support CONFIG_ATA=y CONFIG_SATA_HOST=y CONFIG_PATA_TIMINGS=y CONFIG_ATA_VERBOSE_ERROR=y CONFIG_ATA_FORCE=y CONFIG_ATA_ACPI=y # CONFIG_SATA_ZPODD is not set CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # CONFIG_SATA_AHCI=y CONFIG_SATA_MOBILE_LPM_POLICY=3 # CONFIG_SATA_AHCI_PLATFORM is not set # CONFIG_AHCI_DWC is not set # CONFIG_AHCI_CEVA is not set # CONFIG_SATA_INIC162X is not set # CONFIG_SATA_ACARD_AHCI is not set # CONFIG_SATA_SIL24 is not set CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # # CONFIG_PDC_ADMA is not set # CONFIG_SATA_QSTOR is not set # CONFIG_SATA_SX4 is not set CONFIG_ATA_BMDMA=y # # SATA SFF controllers with BMDMA # CONFIG_ATA_PIIX=y # CONFIG_SATA_DWC is not set # CONFIG_SATA_MV is not set # CONFIG_SATA_NV is not set # CONFIG_SATA_PROMISE is not set # CONFIG_SATA_SIL is not set # CONFIG_SATA_SIS is not set # CONFIG_SATA_SVW is not set # CONFIG_SATA_ULI is not set # CONFIG_SATA_VIA is not set # CONFIG_SATA_VITESSE is not set # # PATA SFF controllers with BMDMA # # CONFIG_PATA_ALI is not set CONFIG_PATA_AMD=y # CONFIG_PATA_ARTOP is not set # CONFIG_PATA_ATIIXP is not set # CONFIG_PATA_ATP867X is not set # CONFIG_PATA_CMD64X is not set # CONFIG_PATA_CYPRESS is not set # CONFIG_PATA_EFAR is not set # CONFIG_PATA_HPT366 is not set # CONFIG_PATA_HPT37X is not set # CONFIG_PATA_HPT3X2N is not set # CONFIG_PATA_HPT3X3 is not set # CONFIG_PATA_IT8213 is not set # CONFIG_PATA_IT821X is not set # CONFIG_PATA_JMICRON is not set # CONFIG_PATA_MARVELL is not set # CONFIG_PATA_NETCELL is not set # CONFIG_PATA_NINJA32 is not set # CONFIG_PATA_NS87415 is not set CONFIG_PATA_OLDPIIX=y # CONFIG_PATA_OPTIDMA is not set # CONFIG_PATA_PDC2027X is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set # CONFIG_PATA_RDC is not set CONFIG_PATA_SCH=y # CONFIG_PATA_SERVERWORKS is not set # CONFIG_PATA_SIL680 is not set # CONFIG_PATA_SIS is not set # CONFIG_PATA_TOSHIBA is not set # CONFIG_PATA_TRIFLEX is not set # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set # # PIO-only SFF controllers # # CONFIG_PATA_CMD640_PCI is not set # CONFIG_PATA_MPIIX is not set # CONFIG_PATA_NS87410 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_PCMCIA is not set # CONFIG_PATA_OF_PLATFORM is not set # CONFIG_PATA_RZ1000 is not set # # Generic fallback / legacy drivers # # CONFIG_PATA_ACPI is not set # CONFIG_ATA_GENERIC is not set # CONFIG_PATA_LEGACY is not set CONFIG_MD=y CONFIG_BLK_DEV_MD=y CONFIG_MD_BITMAP=y # CONFIG_MD_LLBITMAP is not set CONFIG_MD_AUTODETECT=y CONFIG_MD_BITMAP_FILE=y # CONFIG_MD_LINEAR is not set # CONFIG_MD_RAID0 is not set # CONFIG_MD_RAID1 is not set # CONFIG_MD_RAID10 is not set # CONFIG_MD_RAID456 is not set # CONFIG_BCACHE is not set CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=y # CONFIG_DM_DEBUG is not set # CONFIG_DM_UNSTRIPED is not set # CONFIG_DM_CRYPT is not set # CONFIG_DM_SNAPSHOT is not set # CONFIG_DM_THIN_PROVISIONING is not set # CONFIG_DM_CACHE is not set # CONFIG_DM_WRITECACHE is not set # CONFIG_DM_EBS is not set # CONFIG_DM_ERA is not set # CONFIG_DM_CLONE is not set CONFIG_DM_MIRROR=y # CONFIG_DM_LOG_USERSPACE is not set # CONFIG_DM_RAID is not set CONFIG_DM_ZERO=y # CONFIG_DM_MULTIPATH is not set # CONFIG_DM_DELAY is not set # CONFIG_DM_DUST is not set # CONFIG_DM_INIT is not set # CONFIG_DM_UEVENT is not set # CONFIG_DM_FLAKEY is not set # CONFIG_DM_VERITY is not set # CONFIG_DM_SWITCH is not set # CONFIG_DM_LOG_WRITES is not set # CONFIG_DM_INTEGRITY is not set # CONFIG_DM_AUDIT is not set # CONFIG_DM_VDO is not set CONFIG_TARGET_CORE=y # CONFIG_TCM_IBLOCK is not set # CONFIG_TCM_FILEIO is not set # CONFIG_TCM_PSCSI is not set # CONFIG_LOOPBACK_TARGET is not set # CONFIG_ISCSI_TARGET is not set # CONFIG_REMOTE_TARGET is not set # CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # # CONFIG_FIREWIRE is not set # CONFIG_FIREWIRE_NOSY is not set # end of IEEE 1394 (FireWire) support CONFIG_MACINTOSH_DRIVERS=y CONFIG_MAC_EMUMOUSEBTN=y CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y CONFIG_BONDING=y CONFIG_DUMMY=y CONFIG_WIREGUARD=y # CONFIG_WIREGUARD_DEBUG is not set # CONFIG_OVPN is not set CONFIG_EQUALIZER=y CONFIG_NET_FC=y CONFIG_IFB=y CONFIG_NET_TEAM=y CONFIG_NET_TEAM_MODE_BROADCAST=y CONFIG_NET_TEAM_MODE_ROUNDROBIN=y CONFIG_NET_TEAM_MODE_RANDOM=y CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=y CONFIG_NET_TEAM_MODE_LOADBALANCE=y CONFIG_MACVLAN=y CONFIG_MACVTAP=y CONFIG_IPVLAN_L3S=y CONFIG_IPVLAN=y CONFIG_IPVTAP=y CONFIG_VXLAN=y CONFIG_GENEVE=y CONFIG_BAREUDP=y CONFIG_GTP=y # CONFIG_PFCP is not set # CONFIG_AMT is not set CONFIG_MACSEC=y CONFIG_NETCONSOLE=y # CONFIG_NETCONSOLE_DYNAMIC is not set # CONFIG_NETCONSOLE_EXTENDED_LOG is not set CONFIG_NETPOLL=y CONFIG_NET_POLL_CONTROLLER=y CONFIG_TUN=y CONFIG_TAP=y CONFIG_TUN_VNET_CROSS_LE=y CONFIG_VETH=y CONFIG_VIRTIO_NET=y CONFIG_NLMON=y # CONFIG_NETKIT is not set CONFIG_NET_VRF=y # CONFIG_ARCNET is not set CONFIG_ATM_DRIVERS=y # CONFIG_ATM_DUMMY is not set CONFIG_ATM_TCP=y # CONFIG_ATM_LANAI is not set # CONFIG_ATM_ENI is not set # CONFIG_ATM_NICSTAR is not set # CONFIG_ATM_IDT77252 is not set # CONFIG_ATM_IA is not set # CONFIG_ATM_FORE200E is not set # CONFIG_ATM_HE is not set # CONFIG_ATM_SOLOS is not set CONFIG_CAIF_DRIVERS=y CONFIG_CAIF_TTY=y CONFIG_CAIF_VIRTIO=y # # Distributed Switch Architecture drivers # # CONFIG_B53 is not set # CONFIG_NET_DSA_BCM_SF2 is not set # CONFIG_NET_DSA_LOOP is not set # CONFIG_NET_DSA_HIRSCHMANN_HELLCREEK is not set # CONFIG_NET_DSA_LANTIQ_GSWIP is not set # CONFIG_NET_DSA_MXL_GSW1XX is not set # CONFIG_NET_DSA_MT7530 is not set # CONFIG_NET_DSA_MV88E6060 is not set # CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON is not set # CONFIG_NET_DSA_MV88E6XXX is not set # CONFIG_NET_DSA_MXL862 is not set # CONFIG_NET_DSA_AR9331 is not set # CONFIG_NET_DSA_QCA8K is not set # CONFIG_NET_DSA_SJA1105 is not set # CONFIG_NET_DSA_XRS700X_I2C is not set # CONFIG_NET_DSA_XRS700X_MDIO is not set # CONFIG_NET_DSA_REALTEK is not set # CONFIG_NET_DSA_KS8995 is not set # CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set # CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set # CONFIG_NET_DSA_VITESSE_VSC73XX_SPI is not set # CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM is not set # CONFIG_NET_DSA_YT921X is not set # end of Distributed Switch Architecture drivers CONFIG_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set # CONFIG_NET_VENDOR_AGERE is not set # CONFIG_NET_VENDOR_ALACRITECH is not set CONFIG_NET_VENDOR_ALTEON=y # CONFIG_ACENIC is not set # CONFIG_ALTERA_TSE is not set CONFIG_NET_VENDOR_AMAZON=y # CONFIG_ENA_ETHERNET is not set # CONFIG_NET_VENDOR_AMD is not set # CONFIG_NET_VENDOR_AQUANTIA is not set # CONFIG_NET_VENDOR_ARC is not set CONFIG_NET_VENDOR_ASIX=y # CONFIG_SPI_AX88796C is not set # CONFIG_NET_VENDOR_ATHEROS is not set # CONFIG_CX_ECAT is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_CADENCE is not set # CONFIG_NET_VENDOR_CAVIUM is not set # CONFIG_NET_VENDOR_CHELSIO is not set CONFIG_NET_VENDOR_CISCO=y # CONFIG_ENIC is not set # CONFIG_NET_VENDOR_CORTINA is not set CONFIG_NET_VENDOR_DAVICOM=y # CONFIG_DM9051 is not set # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set CONFIG_NET_VENDOR_ENGLEDER=y # CONFIG_TSNEP is not set # CONFIG_NET_VENDOR_EZCHIP is not set # CONFIG_NET_VENDOR_FUJITSU is not set CONFIG_NET_VENDOR_FUNGIBLE=y # CONFIG_FUN_ETH is not set CONFIG_NET_VENDOR_GOOGLE=y CONFIG_GVE=y CONFIG_NET_VENDOR_HISILICON=y # CONFIG_HIBMCGE is not set # CONFIG_NET_VENDOR_HUAWEI is not set CONFIG_NET_VENDOR_I825XX=y CONFIG_NET_VENDOR_INTEL=y CONFIG_E100=y CONFIG_E1000=y CONFIG_E1000E=y CONFIG_E1000E_HWTS=y # CONFIG_IGB is not set # CONFIG_IGBVF is not set # CONFIG_IXGBE is not set # CONFIG_IXGBEVF is not set # CONFIG_I40E is not set # CONFIG_I40EVF is not set # CONFIG_ICE is not set # CONFIG_FM10K is not set # CONFIG_IGC is not set # CONFIG_IDPF is not set # CONFIG_JME is not set # CONFIG_NET_VENDOR_ADI is not set CONFIG_NET_VENDOR_LITEX=y # CONFIG_LITEX_LITEETH is not set # CONFIG_NET_VENDOR_MARVELL is not set CONFIG_NET_VENDOR_MELLANOX=y # CONFIG_MLX4_EN is not set CONFIG_MLX4_CORE=y # CONFIG_MLX4_DEBUG is not set # CONFIG_MLX4_CORE_GEN2 is not set # CONFIG_MLX5_CORE is not set # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set CONFIG_NET_VENDOR_META=y # CONFIG_FBNIC is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set CONFIG_NET_VENDOR_MICROSOFT=y CONFIG_NET_VENDOR_MUCSE=y # CONFIG_MGBE is not set # CONFIG_NET_VENDOR_MYRI is not set # CONFIG_FEALNX is not set # CONFIG_NET_VENDOR_NI is not set # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NETRONOME is not set # CONFIG_NET_VENDOR_NVIDIA is not set # CONFIG_NET_VENDOR_OKI is not set # CONFIG_ETHOC is not set # CONFIG_NET_VENDOR_PACKET_ENGINES is not set # CONFIG_NET_VENDOR_PENSANDO is not set # CONFIG_NET_VENDOR_QLOGIC is not set # CONFIG_NET_VENDOR_BROCADE is not set # CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_RDC is not set # CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_SAMSUNG is not set # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set # CONFIG_NET_VENDOR_SOLARFLARE is not set # CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SOCIONEXT is not set # CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_SUN is not set # CONFIG_NET_VENDOR_SYNOPSYS is not set # CONFIG_NET_VENDOR_TEHUTI is not set # CONFIG_NET_VENDOR_TI is not set CONFIG_NET_VENDOR_VERTEXCOM=y # CONFIG_MSE102X is not set # CONFIG_NET_VENDOR_VIA is not set CONFIG_NET_VENDOR_WANGXUN=y # CONFIG_NGBE is not set # CONFIG_TXGBE is not set # CONFIG_TXGBEVF is not set # CONFIG_NGBEVF is not set # CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_XILINX is not set # CONFIG_NET_VENDOR_XIRCOM is not set CONFIG_FDDI=y # CONFIG_DEFXX is not set # CONFIG_SKFP is not set CONFIG_MDIO_BUS=y CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y # CONFIG_LED_TRIGGER_PHY is not set CONFIG_PHYLIB_LEDS=y CONFIG_FIXED_PHY=y # CONFIG_SFP is not set # # MII PHY device drivers # # CONFIG_AS21XXX_PHY is not set # CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set # CONFIG_AQUANTIA_PHY is not set CONFIG_AX88796B_PHY=y # CONFIG_BROADCOM_PHY is not set # CONFIG_BCM54140_PHY is not set # CONFIG_BCM7XXX_PHY is not set # CONFIG_BCM84881_PHY is not set # CONFIG_BCM87XX_PHY is not set # CONFIG_CICADA_PHY is not set # CONFIG_CORTINA_PHY is not set # CONFIG_DAVICOM_PHY is not set # CONFIG_ICPLUS_PHY is not set # CONFIG_LXT_PHY is not set # CONFIG_INTEL_XWAY_PHY is not set # CONFIG_LSI_ET1011C_PHY is not set # CONFIG_MARVELL_PHY is not set # CONFIG_MARVELL_10G_PHY is not set # CONFIG_MARVELL_88Q2XXX_PHY is not set # CONFIG_MARVELL_88X2222_PHY is not set # CONFIG_MAXLINEAR_GPHY is not set # CONFIG_MAXLINEAR_86110_PHY is not set # CONFIG_MEDIATEK_GE_PHY is not set # CONFIG_MICREL_PHY is not set # CONFIG_MICROCHIP_T1S_PHY is not set CONFIG_MICROCHIP_PHY=y # CONFIG_MICROCHIP_T1_PHY is not set # CONFIG_MICROSEMI_PHY is not set # CONFIG_MOTORCOMM_PHY is not set # CONFIG_NATIONAL_PHY is not set # CONFIG_NXP_CBTX_PHY is not set # CONFIG_NXP_C45_TJA11XX_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set # CONFIG_AT803X_PHY is not set # CONFIG_QCA83XX_PHY is not set # CONFIG_QCA808X_PHY is not set # CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y # CONFIG_REALTEK_PHY_HWMON is not set # CONFIG_RENESAS_PHY is not set # CONFIG_ROCKCHIP_PHY is not set CONFIG_SMSC_PHY=y # CONFIG_STE10XP is not set # CONFIG_TERANETICS_PHY is not set # CONFIG_DP83822_PHY is not set # CONFIG_DP83TC811_PHY is not set # CONFIG_DP83848_PHY is not set # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set # CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_PSE_CONTROLLER is not set CONFIG_CAN_DEV=y CONFIG_CAN_VCAN=y CONFIG_CAN_VXCAN=y CONFIG_CAN_NETLINK=y CONFIG_CAN_CALC_BITTIMING=y CONFIG_CAN_RX_OFFLOAD=y # CONFIG_CAN_CAN327 is not set # CONFIG_CAN_DUMMY is not set # CONFIG_CAN_FLEXCAN is not set # CONFIG_CAN_GRCAN is not set # CONFIG_CAN_KVASER_PCIEFD is not set CONFIG_CAN_SLCAN=y # CONFIG_CAN_C_CAN is not set # CONFIG_CAN_CC770 is not set # CONFIG_CAN_CTUCANFD_PCI is not set # CONFIG_CAN_CTUCANFD_PLATFORM is not set # CONFIG_CAN_ESD_402_PCI is not set CONFIG_CAN_IFI_CANFD=y # CONFIG_CAN_M_CAN is not set # CONFIG_CAN_PEAK_PCIEFD is not set # CONFIG_CAN_SJA1000 is not set # CONFIG_CAN_SOFTING is not set # # CAN SPI interfaces # # CONFIG_CAN_HI311X is not set # CONFIG_CAN_MCP251X is not set # CONFIG_CAN_MCP251XFD is not set # end of CAN SPI interfaces # # CAN USB interfaces # CONFIG_CAN_8DEV_USB=y CONFIG_CAN_EMS_USB=y CONFIG_CAN_ESD_USB=y CONFIG_CAN_ETAS_ES58X=y CONFIG_CAN_F81604=y CONFIG_CAN_GS_USB=y CONFIG_CAN_KVASER_USB=y CONFIG_CAN_MCBA_USB=y CONFIG_CAN_PEAK_USB=y CONFIG_CAN_UCAN=y # end of CAN USB interfaces # CONFIG_CAN_DEBUG_DEVICES is not set # # MCTP Device Drivers # # CONFIG_MCTP_SERIAL is not set # CONFIG_MCTP_TRANSPORT_USB is not set # end of MCTP Device Drivers CONFIG_FWNODE_MDIO=y CONFIG_OF_MDIO=y CONFIG_ACPI_MDIO=y # CONFIG_MDIO_BITBANG is not set # CONFIG_MDIO_BCM_UNIMAC is not set # CONFIG_MDIO_HISI_FEMAC is not set CONFIG_MDIO_MVUSB=y # CONFIG_MDIO_MSCC_MIIM is not set # CONFIG_MDIO_OCTEON is not set # CONFIG_MDIO_IPQ4019 is not set # CONFIG_MDIO_IPQ8064 is not set # CONFIG_MDIO_THUNDER is not set # # MDIO Multiplexers # # CONFIG_MDIO_BUS_MUX_GPIO is not set # CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set # CONFIG_MDIO_BUS_MUX_MMIOREG is not set # # PCS device drivers # # CONFIG_PCS_XPCS is not set # end of PCS device drivers # CONFIG_PLIP is not set CONFIG_PPP=y CONFIG_PPP_BSDCOMP=y CONFIG_PPP_DEFLATE=y CONFIG_PPP_FILTER=y CONFIG_PPP_MPPE=y CONFIG_PPP_MULTILINK=y CONFIG_PPPOATM=y CONFIG_PPPOE=y CONFIG_PPPOE_HASH_BITS_1=y # CONFIG_PPPOE_HASH_BITS_2 is not set # CONFIG_PPPOE_HASH_BITS_4 is not set # CONFIG_PPPOE_HASH_BITS_8 is not set CONFIG_PPPOE_HASH_BITS=1 CONFIG_PPTP=y CONFIG_PPPOL2TP=y CONFIG_PPP_ASYNC=y CONFIG_PPP_SYNC_TTY=y CONFIG_SLIP=y CONFIG_SLHC=y CONFIG_SLIP_COMPRESSED=y CONFIG_SLIP_SMART=y CONFIG_SLIP_MODE_SLIP6=y CONFIG_USB_NET_DRIVERS=y CONFIG_USB_CATC=y CONFIG_USB_KAWETH=y CONFIG_USB_PEGASUS=y CONFIG_USB_RTL8150=y CONFIG_USB_RTL8152=y CONFIG_USB_LAN78XX=y CONFIG_USB_USBNET=y CONFIG_USB_NET_AX8817X=y CONFIG_USB_NET_AX88179_178A=y CONFIG_USB_NET_CDCETHER=y CONFIG_USB_NET_CDC_EEM=y CONFIG_USB_NET_CDC_NCM=y CONFIG_USB_NET_HUAWEI_CDC_NCM=y CONFIG_USB_NET_CDC_MBIM=y CONFIG_USB_NET_DM9601=y CONFIG_USB_NET_SR9700=y CONFIG_USB_NET_SR9800=y CONFIG_USB_NET_SMSC75XX=y CONFIG_USB_NET_SMSC95XX=y CONFIG_USB_NET_GL620A=y CONFIG_USB_NET_NET1080=y CONFIG_USB_NET_PLUSB=y CONFIG_USB_NET_MCS7830=y CONFIG_USB_NET_RNDIS_HOST=y CONFIG_USB_NET_CDC_SUBSET_ENABLE=y CONFIG_USB_NET_CDC_SUBSET=y CONFIG_USB_ALI_M5632=y CONFIG_USB_AN2720=y CONFIG_USB_BELKIN=y CONFIG_USB_ARMLINUX=y CONFIG_USB_EPSON2888=y CONFIG_USB_KC2190=y CONFIG_USB_NET_ZAURUS=y CONFIG_USB_NET_CX82310_ETH=y CONFIG_USB_NET_KALMIA=y CONFIG_USB_NET_QMI_WWAN=y CONFIG_USB_HSO=y CONFIG_USB_NET_INT51X1=y CONFIG_USB_CDC_PHONET=y CONFIG_USB_IPHETH=y CONFIG_USB_SIERRA_NET=y CONFIG_USB_VL600=y CONFIG_USB_NET_CH9200=y CONFIG_USB_NET_AQC111=y CONFIG_USB_RTL8153_ECM=y CONFIG_WLAN=y CONFIG_WLAN_VENDOR_ADMTEK=y # CONFIG_ADM8211 is not set CONFIG_ATH_COMMON=y CONFIG_WLAN_VENDOR_ATH=y # CONFIG_ATH_DEBUG is not set # CONFIG_ATH5K is not set # CONFIG_ATH5K_PCI is not set CONFIG_ATH9K_HW=y CONFIG_ATH9K_COMMON=y CONFIG_ATH9K_COMMON_DEBUG=y CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=y # CONFIG_ATH9K_PCI is not set # CONFIG_ATH9K_AHB is not set CONFIG_ATH9K_DEBUGFS=y # CONFIG_ATH9K_STATION_STATISTICS is not set # CONFIG_ATH9K_DYNACK is not set # CONFIG_ATH9K_WOW is not set # CONFIG_ATH9K_RFKILL is not set # CONFIG_ATH9K_CHANNEL_CONTEXT is not set # CONFIG_ATH9K_PCOEM is not set CONFIG_ATH9K_HTC=y CONFIG_ATH9K_HTC_DEBUGFS=y # CONFIG_ATH9K_HWRNG is not set CONFIG_ATH9K_COMMON_SPECTRAL=y CONFIG_CARL9170=y CONFIG_CARL9170_LEDS=y # CONFIG_CARL9170_DEBUGFS is not set CONFIG_CARL9170_WPC=y CONFIG_CARL9170_HWRNG=y CONFIG_ATH6KL=y # CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=y # CONFIG_ATH6KL_DEBUG is not set # CONFIG_ATH6KL_TRACING is not set CONFIG_AR5523=y # CONFIG_WIL6210 is not set CONFIG_ATH10K=y CONFIG_ATH10K_CE=y # CONFIG_ATH10K_PCI is not set # CONFIG_ATH10K_SDIO is not set CONFIG_ATH10K_USB=y # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set CONFIG_ATH10K_LEDS=y # CONFIG_ATH10K_TRACING is not set # CONFIG_WCN36XX is not set # CONFIG_ATH11K is not set # CONFIG_ATH12K is not set CONFIG_WLAN_VENDOR_ATMEL=y CONFIG_AT76C50X_USB=y CONFIG_WLAN_VENDOR_BROADCOM=y # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set CONFIG_BRCMUTIL=y # CONFIG_BRCMSMAC is not set CONFIG_BRCMFMAC=y CONFIG_BRCMFMAC_PROTO_BCDC=y # CONFIG_BRCMFMAC_SDIO is not set CONFIG_BRCMFMAC_USB=y # CONFIG_BRCMFMAC_PCIE is not set # CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_IPW2100 is not set # CONFIG_IPW2200 is not set # CONFIG_IWL4965 is not set # CONFIG_IWL3945 is not set # CONFIG_IWLWIFI is not set CONFIG_WLAN_VENDOR_INTERSIL=y CONFIG_P54_COMMON=y CONFIG_P54_USB=y # CONFIG_P54_PCI is not set # CONFIG_P54_SPI is not set CONFIG_P54_LEDS=y CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_LIBERTAS=y CONFIG_LIBERTAS_USB=y CONFIG_LIBERTAS_SDIO=y CONFIG_LIBERTAS_SPI=y # CONFIG_LIBERTAS_DEBUG is not set CONFIG_LIBERTAS_MESH=y CONFIG_LIBERTAS_THINFIRM=y # CONFIG_LIBERTAS_THINFIRM_DEBUG is not set CONFIG_LIBERTAS_THINFIRM_USB=y CONFIG_MWIFIEX=y # CONFIG_MWIFIEX_SDIO is not set # CONFIG_MWIFIEX_PCIE is not set CONFIG_MWIFIEX_USB=y # CONFIG_MWL8K is not set CONFIG_WLAN_VENDOR_MEDIATEK=y CONFIG_MT7601U=y CONFIG_MT76_CORE=y CONFIG_MT76_LEDS=y CONFIG_MT76_USB=y CONFIG_MT76x02_LIB=y CONFIG_MT76x02_USB=y CONFIG_MT76_CONNAC_LIB=y CONFIG_MT792x_LIB=y CONFIG_MT792x_USB=y CONFIG_MT76x0_COMMON=y CONFIG_MT76x0U=y # CONFIG_MT76x0E is not set CONFIG_MT76x2_COMMON=y # CONFIG_MT76x2E is not set CONFIG_MT76x2U=y # CONFIG_MT7603E is not set CONFIG_MT7615_COMMON=y # CONFIG_MT7615E is not set CONFIG_MT7663_USB_SDIO_COMMON=y CONFIG_MT7663U=y # CONFIG_MT7663S is not set # CONFIG_MT7915E is not set CONFIG_MT7921_COMMON=y # CONFIG_MT7921E is not set # CONFIG_MT7921S is not set CONFIG_MT7921U=y # CONFIG_MT7996E is not set CONFIG_MT7925_COMMON=y # CONFIG_MT7925E is not set CONFIG_MT7925U=y CONFIG_WLAN_VENDOR_MICROCHIP=y CONFIG_WILC1000=y CONFIG_WILC1000_SDIO=y # CONFIG_WILC1000_SPI is not set # CONFIG_WILC1000_HW_OOB_INTR is not set CONFIG_WLAN_VENDOR_PURELIFI=y CONFIG_PLFXLC=y CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=y # CONFIG_RT2400PCI is not set # CONFIG_RT2500PCI is not set # CONFIG_RT61PCI is not set # CONFIG_RT2800PCI is not set CONFIG_RT2500USB=y CONFIG_RT73USB=y CONFIG_RT2800USB=y CONFIG_RT2800USB_RT33XX=y CONFIG_RT2800USB_RT35XX=y CONFIG_RT2800USB_RT3573=y CONFIG_RT2800USB_RT53XX=y CONFIG_RT2800USB_RT55XX=y CONFIG_RT2800USB_UNKNOWN=y CONFIG_RT2800_LIB=y CONFIG_RT2X00_LIB_USB=y CONFIG_RT2X00_LIB=y CONFIG_RT2X00_LIB_FIRMWARE=y CONFIG_RT2X00_LIB_CRYPTO=y CONFIG_RT2X00_LIB_LEDS=y # CONFIG_RT2X00_LIB_DEBUGFS is not set # CONFIG_RT2X00_DEBUG is not set CONFIG_WLAN_VENDOR_REALTEK=y # CONFIG_RTL8180 is not set CONFIG_RTL8187=y CONFIG_RTL8187_LEDS=y CONFIG_RTL_CARDS=y CONFIG_RTL8192CE=y CONFIG_RTL8192SE=y CONFIG_RTL8192DE=y CONFIG_RTL8723AE=y CONFIG_RTL8723BE=y CONFIG_RTL8188EE=y CONFIG_RTL8192EE=y CONFIG_RTL8821AE=y CONFIG_RTL8192CU=y # CONFIG_RTL8192DU is not set CONFIG_RTLWIFI=y CONFIG_RTLWIFI_PCI=y CONFIG_RTLWIFI_USB=y # CONFIG_RTLWIFI_DEBUG is not set CONFIG_RTL8192C_COMMON=y CONFIG_RTL8192D_COMMON=y CONFIG_RTL8723_COMMON=y CONFIG_RTLBTCOEXIST=y CONFIG_RTL8XXXU=y CONFIG_RTL8XXXU_UNTESTED=y CONFIG_RTW88=y CONFIG_RTW88_CORE=y CONFIG_RTW88_USB=y CONFIG_RTW88_8822B=y CONFIG_RTW88_8822C=y CONFIG_RTW88_8723X=y CONFIG_RTW88_8723D=y CONFIG_RTW88_8821C=y # CONFIG_RTW88_8822BE is not set # CONFIG_RTW88_8822BS is not set CONFIG_RTW88_8822BU=y # CONFIG_RTW88_8822CE is not set # CONFIG_RTW88_8822CS is not set CONFIG_RTW88_8822CU=y # CONFIG_RTW88_8723DE is not set # CONFIG_RTW88_8723DS is not set # CONFIG_RTW88_8723CS is not set CONFIG_RTW88_8723DU=y # CONFIG_RTW88_8821CE is not set # CONFIG_RTW88_8821CS is not set CONFIG_RTW88_8821CU=y # CONFIG_RTW88_8821AU is not set # CONFIG_RTW88_8812AU is not set # CONFIG_RTW88_8814AE is not set # CONFIG_RTW88_8814AU is not set # CONFIG_RTW88_DEBUG is not set # CONFIG_RTW88_DEBUGFS is not set CONFIG_RTW88_LEDS=y CONFIG_RTW89=y # CONFIG_RTW89_8851BE is not set # CONFIG_RTW89_8851BU is not set # CONFIG_RTW89_8852AE is not set # CONFIG_RTW89_8852AU is not set # CONFIG_RTW89_8852BE is not set # CONFIG_RTW89_8852BU is not set # CONFIG_RTW89_8852BTE is not set # CONFIG_RTW89_8852CE is not set # CONFIG_RTW89_8852CU is not set # CONFIG_RTW89_8922AE is not set CONFIG_WLAN_VENDOR_RSI=y CONFIG_RSI_91X=y # CONFIG_RSI_DEBUGFS is not set # CONFIG_RSI_SDIO is not set CONFIG_RSI_USB=y # CONFIG_RSI_COEX is not set CONFIG_WLAN_VENDOR_SILABS=y # CONFIG_WFX is not set CONFIG_WLAN_VENDOR_ST=y # CONFIG_CW1200 is not set CONFIG_WLAN_VENDOR_TI=y # CONFIG_WL1251 is not set # CONFIG_WL12XX is not set # CONFIG_WL18XX is not set # CONFIG_WLCORE is not set CONFIG_WLAN_VENDOR_ZYDAS=y CONFIG_ZD1211RW=y # CONFIG_ZD1211RW_DEBUG is not set CONFIG_WLAN_VENDOR_QUANTENNA=y # CONFIG_QTNFMAC_PCIE is not set # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set CONFIG_WAN=y CONFIG_HDLC=y CONFIG_HDLC_RAW=y CONFIG_HDLC_RAW_ETH=y CONFIG_HDLC_CISCO=y CONFIG_HDLC_FR=y CONFIG_HDLC_PPP=y CONFIG_HDLC_X25=y # CONFIG_FRAMER is not set # CONFIG_PCI200SYN is not set # CONFIG_WANXL is not set # CONFIG_PC300TOO is not set # CONFIG_FARSYNC is not set CONFIG_LAPBETHER=y CONFIG_IEEE802154_DRIVERS=y # CONFIG_IEEE802154_FAKELB is not set # CONFIG_IEEE802154_AT86RF230 is not set # CONFIG_IEEE802154_MRF24J40 is not set # CONFIG_IEEE802154_CC2520 is not set CONFIG_IEEE802154_ATUSB=y # CONFIG_IEEE802154_ADF7242 is not set # CONFIG_IEEE802154_CA8210 is not set # CONFIG_IEEE802154_MCR20A is not set CONFIG_IEEE802154_HWSIM=y # # Wireless WAN # # CONFIG_WWAN is not set # end of Wireless WAN CONFIG_VMXNET3=y # CONFIG_FUJITSU_ES is not set CONFIG_USB4_NET=y CONFIG_NETDEVSIM=y CONFIG_NET_FAILOVER=y CONFIG_ISDN=y CONFIG_ISDN_CAPI=y CONFIG_MISDN=y CONFIG_MISDN_DSP=y CONFIG_MISDN_L1OIP=y # # mISDN hardware drivers # # CONFIG_MISDN_HFCPCI is not set # CONFIG_MISDN_HFCMULTI is not set CONFIG_MISDN_HFCUSB=y # CONFIG_MISDN_AVMFRITZ is not set # CONFIG_MISDN_SPEEDFAX is not set # CONFIG_MISDN_INFINEON is not set # CONFIG_MISDN_W6692 is not set # CONFIG_MISDN_NETJET is not set # # Input device support # CONFIG_INPUT=y CONFIG_INPUT_LEDS=y CONFIG_INPUT_FF_MEMLESS=y CONFIG_INPUT_SPARSEKMAP=y # CONFIG_INPUT_MATRIXKMAP is not set CONFIG_INPUT_VIVALDIFMAP=y # # Userland interfaces # # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=y # # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ADC is not set # CONFIG_KEYBOARD_ADP5588 is not set CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_QT1050 is not set # CONFIG_KEYBOARD_QT1070 is not set # CONFIG_KEYBOARD_QT2160 is not set # CONFIG_KEYBOARD_DLINK_DIR685 is not set # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_GPIO is not set # CONFIG_KEYBOARD_GPIO_POLLED is not set # CONFIG_KEYBOARD_TCA8418 is not set # CONFIG_KEYBOARD_MATRIX is not set # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_PINEPHONE is not set # CONFIG_KEYBOARD_SAMSUNG is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_OMAP4 is not set # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set # CONFIG_KEYBOARD_TWL4030 is not set # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_KEYBOARD_CROS_EC is not set # CONFIG_KEYBOARD_CAP11XX is not set # CONFIG_KEYBOARD_BCM is not set # CONFIG_KEYBOARD_CYPRESS_SF is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y CONFIG_MOUSE_PS2_ALPS=y CONFIG_MOUSE_PS2_BYD=y CONFIG_MOUSE_PS2_LOGIPS2PP=y CONFIG_MOUSE_PS2_SYNAPTICS=y CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y CONFIG_MOUSE_PS2_CYPRESS=y CONFIG_MOUSE_PS2_LIFEBOOK=y CONFIG_MOUSE_PS2_TRACKPOINT=y # CONFIG_MOUSE_PS2_ELANTECH is not set # CONFIG_MOUSE_PS2_SENTELIC is not set # CONFIG_MOUSE_PS2_TOUCHKIT is not set CONFIG_MOUSE_PS2_FOCALTECH=y # CONFIG_MOUSE_PS2_VMMOUSE is not set CONFIG_MOUSE_PS2_SMBUS=y # CONFIG_MOUSE_SERIAL is not set CONFIG_MOUSE_APPLETOUCH=y CONFIG_MOUSE_BCM5974=y # CONFIG_MOUSE_CYAPA is not set # CONFIG_MOUSE_ELAN_I2C is not set # CONFIG_MOUSE_VSXXXAA is not set # CONFIG_MOUSE_GPIO is not set # CONFIG_MOUSE_SYNAPTICS_I2C is not set CONFIG_MOUSE_SYNAPTICS_USB=y CONFIG_INPUT_JOYSTICK=y # CONFIG_JOYSTICK_ANALOG is not set # CONFIG_JOYSTICK_A3D is not set # CONFIG_JOYSTICK_ADC is not set # CONFIG_JOYSTICK_ADI is not set # CONFIG_JOYSTICK_COBRA is not set # CONFIG_JOYSTICK_GF2K is not set # CONFIG_JOYSTICK_GRIP is not set # CONFIG_JOYSTICK_GRIP_MP is not set # CONFIG_JOYSTICK_GUILLEMOT is not set # CONFIG_JOYSTICK_INTERACT is not set # CONFIG_JOYSTICK_SIDEWINDER is not set # CONFIG_JOYSTICK_TMDC is not set CONFIG_JOYSTICK_IFORCE=y CONFIG_JOYSTICK_IFORCE_USB=y # CONFIG_JOYSTICK_IFORCE_232 is not set # CONFIG_JOYSTICK_WARRIOR is not set # CONFIG_JOYSTICK_MAGELLAN is not set # CONFIG_JOYSTICK_SPACEORB is not set # CONFIG_JOYSTICK_SPACEBALL is not set # CONFIG_JOYSTICK_STINGER is not set # CONFIG_JOYSTICK_TWIDJOY is not set # CONFIG_JOYSTICK_ZHENHUA is not set # CONFIG_JOYSTICK_DB9 is not set # CONFIG_JOYSTICK_GAMECON is not set # CONFIG_JOYSTICK_TURBOGRAFX is not set # CONFIG_JOYSTICK_AS5011 is not set # CONFIG_JOYSTICK_JOYDUMP is not set CONFIG_JOYSTICK_XPAD=y CONFIG_JOYSTICK_XPAD_FF=y CONFIG_JOYSTICK_XPAD_LEDS=y # CONFIG_JOYSTICK_WALKERA0701 is not set # CONFIG_JOYSTICK_PSXPAD_SPI is not set CONFIG_JOYSTICK_PXRC=y # CONFIG_JOYSTICK_QWIIC is not set # CONFIG_JOYSTICK_FSIA6B is not set # CONFIG_JOYSTICK_SENSEHAT is not set # CONFIG_JOYSTICK_SEESAW is not set CONFIG_INPUT_TABLET=y CONFIG_TABLET_USB_ACECAD=y CONFIG_TABLET_USB_AIPTEK=y CONFIG_TABLET_USB_HANWANG=y CONFIG_TABLET_USB_KBTAB=y CONFIG_TABLET_USB_PEGASUS=y # CONFIG_TABLET_SERIAL_WACOM4 is not set CONFIG_INPUT_TOUCHSCREEN=y # CONFIG_TOUCHSCREEN_ADS7846 is not set # CONFIG_TOUCHSCREEN_AD7877 is not set # CONFIG_TOUCHSCREEN_AD7879 is not set # CONFIG_TOUCHSCREEN_ADC is not set # CONFIG_TOUCHSCREEN_AR1021_I2C is not set # CONFIG_TOUCHSCREEN_ATMEL_MXT is not set # CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set # CONFIG_TOUCHSCREEN_BU21013 is not set # CONFIG_TOUCHSCREEN_BU21029 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8318 is not set # CONFIG_TOUCHSCREEN_CHIPONE_ICN8505 is not set # CONFIG_TOUCHSCREEN_CY8CTMA140 is not set # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set # CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set # CONFIG_TOUCHSCREEN_CYTTSP5 is not set # CONFIG_TOUCHSCREEN_DYNAPRO is not set # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set # CONFIG_TOUCHSCREEN_EETI is not set # CONFIG_TOUCHSCREEN_EGALAX is not set # CONFIG_TOUCHSCREEN_EGALAX_SERIAL is not set # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GOODIX is not set # CONFIG_TOUCHSCREEN_GOODIX_BERLIN_I2C is not set # CONFIG_TOUCHSCREEN_GOODIX_BERLIN_SPI is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_HIMAX_HX852X is not set # CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set # CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set # CONFIG_TOUCHSCREEN_HYNITRON_CST816X is not set # CONFIG_TOUCHSCREEN_ILI210X is not set # CONFIG_TOUCHSCREEN_ILITEK is not set # CONFIG_TOUCHSCREEN_S6SY761 is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_EKTF2127 is not set # CONFIG_TOUCHSCREEN_ELAN is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set # CONFIG_TOUCHSCREEN_WACOM_I2C is not set # CONFIG_TOUCHSCREEN_MAX11801 is not set # CONFIG_TOUCHSCREEN_MMS114 is not set # CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set # CONFIG_TOUCHSCREEN_MSG2638 is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set # CONFIG_TOUCHSCREEN_NOVATEK_NVT_TS is not set # CONFIG_TOUCHSCREEN_IMAGIS is not set # CONFIG_TOUCHSCREEN_IMX6UL_TSC is not set # CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set # CONFIG_TOUCHSCREEN_PIXCIR is not set # CONFIG_TOUCHSCREEN_WDT87XX_I2C is not set CONFIG_TOUCHSCREEN_USB_COMPOSITE=y CONFIG_TOUCHSCREEN_USB_EGALAX=y CONFIG_TOUCHSCREEN_USB_PANJIT=y CONFIG_TOUCHSCREEN_USB_3M=y CONFIG_TOUCHSCREEN_USB_ITM=y CONFIG_TOUCHSCREEN_USB_ETURBO=y CONFIG_TOUCHSCREEN_USB_GUNZE=y CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y CONFIG_TOUCHSCREEN_USB_IRTOUCH=y CONFIG_TOUCHSCREEN_USB_IDEALTEK=y CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y CONFIG_TOUCHSCREEN_USB_GOTOP=y CONFIG_TOUCHSCREEN_USB_JASTEC=y CONFIG_TOUCHSCREEN_USB_ELO=y CONFIG_TOUCHSCREEN_USB_E2I=y CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y CONFIG_TOUCHSCREEN_USB_NEXIO=y CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_TOUCHSCREEN_TSC_SERIO is not set # CONFIG_TOUCHSCREEN_TSC2004 is not set # CONFIG_TOUCHSCREEN_TSC2005 is not set # CONFIG_TOUCHSCREEN_TSC2007 is not set # CONFIG_TOUCHSCREEN_RM_TS is not set # CONFIG_TOUCHSCREEN_SILEAD is not set # CONFIG_TOUCHSCREEN_SIS_I2C is not set # CONFIG_TOUCHSCREEN_ST1232 is not set # CONFIG_TOUCHSCREEN_STMFTS is not set CONFIG_TOUCHSCREEN_SUR40=y # CONFIG_TOUCHSCREEN_SURFACE3_SPI is not set # CONFIG_TOUCHSCREEN_SX8654 is not set # CONFIG_TOUCHSCREEN_TPS6507X is not set # CONFIG_TOUCHSCREEN_ZET6223 is not set # CONFIG_TOUCHSCREEN_ZFORCE is not set # CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set # CONFIG_TOUCHSCREEN_IQS5XX is not set # CONFIG_TOUCHSCREEN_IQS7211 is not set # CONFIG_TOUCHSCREEN_ZINITIX is not set # CONFIG_TOUCHSCREEN_HIMAX_HX83112B is not set CONFIG_INPUT_MISC=y # CONFIG_INPUT_AD714X is not set # CONFIG_INPUT_ATMEL_CAPTOUCH is not set # CONFIG_INPUT_AW86927 is not set # CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set # CONFIG_INPUT_PCSPKR is not set # CONFIG_INPUT_MMA8450 is not set # CONFIG_INPUT_APANEL is not set # CONFIG_INPUT_GPIO_BEEPER is not set # CONFIG_INPUT_GPIO_DECODER is not set # CONFIG_INPUT_GPIO_VIBRA is not set # CONFIG_INPUT_ATLAS_BTNS is not set CONFIG_INPUT_ATI_REMOTE2=y CONFIG_INPUT_KEYSPAN_REMOTE=y # CONFIG_INPUT_KXTJ9 is not set CONFIG_INPUT_POWERMATE=y CONFIG_INPUT_YEALINK=y CONFIG_INPUT_CM109=y # CONFIG_INPUT_REGULATOR_HAPTIC is not set # CONFIG_INPUT_RETU_PWRBUTTON is not set # CONFIG_INPUT_TWL4030_PWRBUTTON is not set # CONFIG_INPUT_TWL4030_VIBRA is not set # CONFIG_INPUT_UINPUT is not set # CONFIG_INPUT_PCF8574 is not set # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set # CONFIG_INPUT_DA7280_HAPTICS is not set # CONFIG_INPUT_ADXL34X is not set CONFIG_INPUT_IMS_PCU=y # CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_IQS626A is not set # CONFIG_INPUT_IQS7222 is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set # CONFIG_INPUT_DRV2665_HAPTICS is not set # CONFIG_INPUT_DRV2667_HAPTICS is not set CONFIG_RMI4_CORE=y # CONFIG_RMI4_I2C is not set # CONFIG_RMI4_SPI is not set # CONFIG_RMI4_SMB is not set CONFIG_RMI4_F03=y CONFIG_RMI4_F03_SERIO=y CONFIG_RMI4_2D_SENSOR=y CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y # CONFIG_RMI4_F1A is not set # CONFIG_RMI4_F21 is not set CONFIG_RMI4_F30=y # CONFIG_RMI4_F34 is not set CONFIG_RMI4_F3A=y # CONFIG_RMI4_F54 is not set # CONFIG_RMI4_F55 is not set # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PARKBD is not set # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_SERIO_PS2MULT is not set # CONFIG_SERIO_ARC_PS2 is not set # CONFIG_SERIO_APBPS2 is not set # CONFIG_SERIO_GPIO_PS2 is not set # CONFIG_USERIO is not set # CONFIG_GAMEPORT is not set # end of Hardware I/O ports # end of Input device support # # Character devices # CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y # CONFIG_VT_HW_CONSOLE_BINDING is not set CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set CONFIG_LEGACY_TIOCSTI=y CONFIG_LDISC_AUTOLOAD=y # # Serial drivers # CONFIG_SERIAL_EARLYCON=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_PNP=y # CONFIG_SERIAL_8250_16550A_VARIANTS is not set # CONFIG_SERIAL_8250_FINTEK is not set CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DMA=y CONFIG_SERIAL_8250_PCILIB=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_EXAR=y # CONFIG_SERIAL_8250_CS is not set CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_8250_DETECT_IRQ=y CONFIG_SERIAL_8250_RSA=y CONFIG_SERIAL_8250_MANY_PORTS=y # CONFIG_SERIAL_8250_PCI1XXXX is not set # CONFIG_SERIAL_8250_DW is not set # CONFIG_SERIAL_8250_RT288X is not set CONFIG_SERIAL_8250_LPSS=y CONFIG_SERIAL_8250_MID=y CONFIG_SERIAL_8250_PERICOM=y # CONFIG_SERIAL_8250_NI is not set # CONFIG_SERIAL_OF_PLATFORM is not set CONFIG_SERIAL_8250_DWLIB=y # # Non-8250 serial port support # # CONFIG_SERIAL_MAX3100 is not set # CONFIG_SERIAL_MAX310X is not set # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set # CONFIG_SERIAL_SIFIVE is not set # CONFIG_SERIAL_LANTIQ is not set # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_SC16IS7XX is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_XILINX_PS_UART is not set # CONFIG_SERIAL_ARC is not set # CONFIG_SERIAL_RP2 is not set # CONFIG_SERIAL_FSL_LPUART is not set # CONFIG_SERIAL_FSL_LINFLEXUART is not set # CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set # CONFIG_SERIAL_SPRD is not set # end of Serial drivers CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_NONSTANDARD=y # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set # CONFIG_N_HDLC is not set # CONFIG_IPWIRELESS is not set # CONFIG_N_GSM is not set # CONFIG_NOZOMI is not set # CONFIG_NULL_TTY is not set CONFIG_HVC_DRIVER=y CONFIG_SERIAL_DEV_BUS=y # CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set # CONFIG_TTY_PRINTK is not set # CONFIG_PRINTER is not set # CONFIG_PPDEV is not set CONFIG_VIRTIO_CONSOLE=y # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=y # CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_HW_RANDOM_INTEL is not set # CONFIG_HW_RANDOM_AMD is not set # CONFIG_HW_RANDOM_BA431 is not set # CONFIG_HW_RANDOM_VIA is not set CONFIG_HW_RANDOM_VIRTIO=y # CONFIG_HW_RANDOM_CCTRNG is not set # CONFIG_HW_RANDOM_XIPHERA is not set # CONFIG_APPLICOM is not set # CONFIG_DEVMEM is not set CONFIG_NVRAM=y # CONFIG_DEVPORT is not set CONFIG_HPET=y # CONFIG_HPET_MMAP is not set # CONFIG_HANGCHECK_TIMER is not set # CONFIG_TCG_TPM is not set # CONFIG_TELCLOCK is not set CONFIG_XILLYBUS_CLASS=y # CONFIG_XILLYBUS is not set CONFIG_XILLYUSB=y # end of Character devices # # I2C support # CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y # CONFIG_I2C_CHARDEV is not set CONFIG_I2C_MUX=y # # Multiplexer I2C Chip support # # CONFIG_I2C_ARB_GPIO_CHALLENGE is not set # CONFIG_I2C_MUX_GPIO is not set # CONFIG_I2C_MUX_GPMUX is not set # CONFIG_I2C_MUX_LTC4306 is not set # CONFIG_I2C_MUX_PCA9541 is not set # CONFIG_I2C_MUX_PCA954x is not set # CONFIG_I2C_MUX_REG is not set # CONFIG_I2C_MUX_MLXCPLD is not set # end of Multiplexer I2C Chip support CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_SMBUS=y CONFIG_I2C_ALGOBIT=y # # I2C Hardware Bus support # # # PC SMBus host controller drivers # # CONFIG_I2C_ALI1535 is not set # CONFIG_I2C_ALI1563 is not set # CONFIG_I2C_ALI15X3 is not set # CONFIG_I2C_AMD756 is not set # CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_AMD_MP2 is not set CONFIG_I2C_I801=y # CONFIG_I2C_ISCH is not set # CONFIG_I2C_ISMT is not set # CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_CHT_WC is not set # CONFIG_I2C_NFORCE2 is not set # CONFIG_I2C_NVIDIA_GPU is not set # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set # CONFIG_I2C_SIS96X is not set # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set # CONFIG_I2C_ZHAOXIN is not set # # ACPI drivers # # CONFIG_I2C_SCMI is not set # # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_CBUS_GPIO is not set CONFIG_I2C_DESIGNWARE_CORE=y CONFIG_I2C_DESIGNWARE_PLATFORM=y # CONFIG_I2C_DESIGNWARE_AMDPSP is not set # CONFIG_I2C_DESIGNWARE_BAYTRAIL is not set # CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_EMEV2 is not set # CONFIG_I2C_GPIO is not set # CONFIG_I2C_OCORES is not set # CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_RK3X is not set # CONFIG_I2C_SIMTEC is not set # CONFIG_I2C_XILINX is not set # # External I2C/SMBus adapter drivers # CONFIG_I2C_DIOLAN_U2C=y CONFIG_I2C_DLN2=y CONFIG_I2C_LJCA=y CONFIG_I2C_CP2615=y # CONFIG_I2C_PARPORT is not set # CONFIG_I2C_PCI1XXXX is not set CONFIG_I2C_ROBOTFUZZ_OSIF=y # CONFIG_I2C_TAOS_EVM is not set CONFIG_I2C_TINY_USB=y CONFIG_I2C_VIPERBOARD=y # # Other I2C/SMBus bus drivers # # CONFIG_I2C_MLXCPLD is not set # CONFIG_I2C_CROS_EC_TUNNEL is not set # CONFIG_I2C_VIRTIO is not set # end of I2C Hardware Bus support # CONFIG_I2C_STUB is not set # CONFIG_I2C_SLAVE is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # end of I2C support # CONFIG_I3C is not set CONFIG_I3C_OR_I2C=y CONFIG_SPI=y # CONFIG_SPI_DEBUG is not set CONFIG_SPI_MASTER=y # CONFIG_SPI_MEM is not set # # SPI Master Controller Drivers # # CONFIG_SPI_ALTERA is not set # CONFIG_SPI_AXI_SPI_ENGINE is not set # CONFIG_SPI_BITBANG is not set # CONFIG_SPI_BUTTERFLY is not set # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_CADENCE_QUADSPI is not set # CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set CONFIG_SPI_DLN2=y # CONFIG_SPI_GPIO is not set # CONFIG_SPI_LM70_LLP is not set # CONFIG_SPI_FSL_SPI is not set CONFIG_SPI_LJCA=y # CONFIG_SPI_MICROCHIP_CORE_QSPI is not set # CONFIG_SPI_MICROCHIP_CORE_SPI is not set # CONFIG_SPI_LANTIQ_SSC is not set # CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_PCI1XXXX is not set # CONFIG_SPI_PXA2XX is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_MXIC is not set # CONFIG_SPI_VIRTIO is not set # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # # SPI Multiplexer support # # CONFIG_SPI_MUX is not set # # SPI Protocol Masters # # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_LOOPBACK_TEST is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_SPI_SLAVE is not set CONFIG_SPI_DYNAMIC=y # CONFIG_SPMI is not set # CONFIG_HSI is not set CONFIG_PPS=y # CONFIG_PPS_DEBUG is not set # # PPS clients support # # CONFIG_PPS_CLIENT_KTIMER is not set # CONFIG_PPS_CLIENT_LDISC is not set # CONFIG_PPS_CLIENT_PARPORT is not set # CONFIG_PPS_CLIENT_GPIO is not set # CONFIG_PPS_GENERATOR is not set # # PTP clock support # CONFIG_PTP_1588_CLOCK=y CONFIG_PTP_1588_CLOCK_OPTIONAL=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. # CONFIG_PTP_1588_CLOCK_KVM=y CONFIG_PTP_1588_CLOCK_VMCLOCK=y # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set # CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # CONFIG_PTP_1588_CLOCK_VMW is not set # CONFIG_PTP_NETC_V4_TIMER is not set # end of PTP clock support # # DPLL device support # # CONFIG_ZL3073X_I2C is not set # CONFIG_ZL3073X_SPI is not set # end of DPLL device support # CONFIG_PINCTRL is not set CONFIG_GPIOLIB_LEGACY=y CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y CONFIG_GPIO_ACPI=y CONFIG_GPIOLIB_IRQCHIP=y # CONFIG_DEBUG_GPIO is not set # CONFIG_GPIO_SYSFS is not set # CONFIG_GPIO_CDEV is not set # # Memory mapped GPIO drivers # # CONFIG_GPIO_74XX_MMIO is not set # CONFIG_GPIO_ALTERA is not set # CONFIG_GPIO_AMDPT is not set # CONFIG_GPIO_CADENCE is not set # CONFIG_GPIO_DWAPB is not set # CONFIG_GPIO_EXAR is not set # CONFIG_GPIO_FTGPIO010 is not set # CONFIG_GPIO_GENERIC_PLATFORM is not set # CONFIG_GPIO_GRANITERAPIDS is not set # CONFIG_GPIO_GRGPIO is not set # CONFIG_GPIO_HLWD is not set # CONFIG_GPIO_LOGICVC is not set # CONFIG_GPIO_MB86S7X is not set # CONFIG_GPIO_POLARFIRE_SOC is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SYSCON is not set # CONFIG_GPIO_XILINX is not set # CONFIG_GPIO_AMD_FCH is not set # end of Memory mapped GPIO drivers # # Port-mapped I/O GPIO drivers # # CONFIG_GPIO_VX855 is not set # CONFIG_GPIO_F7188X is not set # CONFIG_GPIO_IT87 is not set # CONFIG_GPIO_SCH311X is not set # CONFIG_GPIO_WINBOND is not set # CONFIG_GPIO_WS16C48 is not set # end of Port-mapped I/O GPIO drivers # # I2C GPIO expanders # # CONFIG_GPIO_ADNP is not set # CONFIG_GPIO_FXL6408 is not set # CONFIG_GPIO_DS4520 is not set # CONFIG_GPIO_GW_PLD is not set # CONFIG_GPIO_MAX7300 is not set # CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set # CONFIG_GPIO_PCA9570 is not set # CONFIG_GPIO_PCF857X is not set # CONFIG_GPIO_TPIC2810 is not set # end of I2C GPIO expanders # # MFD GPIO expanders # # CONFIG_GPIO_CROS_EC is not set CONFIG_GPIO_DLN2=y CONFIG_GPIO_LJCA=y # CONFIG_GPIO_TWL4030 is not set # CONFIG_GPIO_WHISKEY_COVE is not set # end of MFD GPIO expanders # # PCI GPIO expanders # # CONFIG_GPIO_AMD8111 is not set # CONFIG_GPIO_BT8XX is not set # CONFIG_GPIO_ML_IOH is not set # CONFIG_GPIO_PCI_IDIO_16 is not set # CONFIG_GPIO_PCIE_IDIO_24 is not set # CONFIG_GPIO_RDC321X is not set # CONFIG_GPIO_SODAVILLE is not set # end of PCI GPIO expanders # # SPI GPIO expanders # # CONFIG_GPIO_74X164 is not set # CONFIG_GPIO_MAX3191X is not set # CONFIG_GPIO_MAX7301 is not set # CONFIG_GPIO_MC33880 is not set # CONFIG_GPIO_PISOSR is not set # CONFIG_GPIO_XRA1403 is not set # end of SPI GPIO expanders # # USB GPIO expanders # CONFIG_GPIO_VIPERBOARD=y # CONFIG_GPIO_MPSSE is not set # end of USB GPIO expanders # # Virtual GPIO drivers # # CONFIG_GPIO_AGGREGATOR is not set # CONFIG_GPIO_LATCH is not set # CONFIG_GPIO_LINE_MUX is not set # CONFIG_GPIO_MOCKUP is not set # CONFIG_GPIO_VIRTIO is not set # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers # # GPIO Debugging utilities # # CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set # CONFIG_GPIO_VIRTUSER is not set # end of GPIO Debugging utilities CONFIG_W1=y # CONFIG_W1_CON is not set # # 1-wire Bus Masters # # CONFIG_W1_MASTER_AMD_AXI is not set # CONFIG_W1_MASTER_MATROX is not set CONFIG_W1_MASTER_DS2490=y # CONFIG_W1_MASTER_DS2482 is not set # CONFIG_W1_MASTER_GPIO is not set # CONFIG_W1_MASTER_SGI is not set # CONFIG_W1_MASTER_UART is not set # end of 1-wire Bus Masters # # 1-wire Slaves # # CONFIG_W1_SLAVE_THERM is not set # CONFIG_W1_SLAVE_SMEM is not set # CONFIG_W1_SLAVE_DS2405 is not set # CONFIG_W1_SLAVE_DS2408 is not set # CONFIG_W1_SLAVE_DS2413 is not set # CONFIG_W1_SLAVE_DS2406 is not set # CONFIG_W1_SLAVE_DS2423 is not set # CONFIG_W1_SLAVE_DS2805 is not set # CONFIG_W1_SLAVE_DS2430 is not set # CONFIG_W1_SLAVE_DS2431 is not set # CONFIG_W1_SLAVE_DS2433 is not set # CONFIG_W1_SLAVE_DS2438 is not set # CONFIG_W1_SLAVE_DS250X is not set # CONFIG_W1_SLAVE_DS2780 is not set # CONFIG_W1_SLAVE_DS2781 is not set # CONFIG_W1_SLAVE_DS28E04 is not set # CONFIG_W1_SLAVE_DS28E17 is not set # end of 1-wire Slaves # CONFIG_POWER_RESET is not set # CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_IP5XXX_POWER is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set # CONFIG_BATTERY_CHAGALL is not set # CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2760 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set # CONFIG_BATTERY_SAMSUNG_SDI is not set # CONFIG_BATTERY_SBS is not set # CONFIG_CHARGER_SBS is not set # CONFIG_MANAGER_SBS is not set # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set # CONFIG_BATTERY_MAX1720X is not set # CONFIG_BATTERY_MAX1721X is not set CONFIG_CHARGER_ISP1704=y # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_TWL4030 is not set # CONFIG_CHARGER_TWL6030 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set # CONFIG_CHARGER_MANAGER is not set # CONFIG_CHARGER_LT3651 is not set # CONFIG_CHARGER_LTC4162L is not set # CONFIG_CHARGER_DETECTOR_MAX14656 is not set # CONFIG_CHARGER_MAX77976 is not set # CONFIG_CHARGER_MAX8971 is not set # CONFIG_CHARGER_MT6360 is not set # CONFIG_CHARGER_MT6370 is not set # CONFIG_CHARGER_BQ2415X is not set CONFIG_CHARGER_BQ24190=y # CONFIG_CHARGER_BQ24257 is not set # CONFIG_CHARGER_BQ24735 is not set # CONFIG_CHARGER_BQ2515X is not set # CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_BQ25980 is not set # CONFIG_CHARGER_BQ256XX is not set # CONFIG_CHARGER_SMB347 is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_BATTERY_GOLDFISH is not set # CONFIG_BATTERY_RT5033 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_RT9467 is not set # CONFIG_CHARGER_RT9471 is not set # CONFIG_CHARGER_RT9756 is not set # CONFIG_CHARGER_CROS_USBPD is not set # CONFIG_CHARGER_CROS_PCHG is not set # CONFIG_CHARGER_CROS_CONTROL is not set # CONFIG_FUEL_GAUGE_STC3117 is not set # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_SURFACE is not set # CONFIG_CHARGER_SURFACE is not set # CONFIG_BATTERY_UG3105 is not set # CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set # # Native drivers # # CONFIG_SENSORS_ABITUGURU is not set # CONFIG_SENSORS_ABITUGURU3 is not set # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM1177 is not set # CONFIG_SENSORS_ADM9240 is not set # CONFIG_SENSORS_ADT7310 is not set # CONFIG_SENSORS_ADT7410 is not set # CONFIG_SENSORS_ADT7411 is not set # CONFIG_SENSORS_ADT7462 is not set # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_AHT10 is not set CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=y # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set # CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set # CONFIG_SENSORS_K8TEMP is not set # CONFIG_SENSORS_K10TEMP is not set # CONFIG_SENSORS_FAM15H_POWER is not set # CONFIG_SENSORS_APPLESMC is not set # CONFIG_SENSORS_ASB100 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_CHIPCAP2 is not set CONFIG_SENSORS_CORSAIR_CPRO=y CONFIG_SENSORS_CORSAIR_PSU=y # CONFIG_SENSORS_CROS_EC is not set # CONFIG_SENSORS_DRIVETEMP is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_DELL_SMM is not set # CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FSCHMD is not set # CONFIG_SENSORS_FTSTEUTATES is not set CONFIG_SENSORS_GIGABYTE_WATERFORCE=y # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_GPD is not set # CONFIG_SENSORS_G760A is not set # CONFIG_SENSORS_G762 is not set # CONFIG_SENSORS_GPIO_FAN is not set # CONFIG_SENSORS_HIH6130 is not set # CONFIG_SENSORS_HS3001 is not set # CONFIG_SENSORS_HTU31 is not set # CONFIG_SENSORS_IIO_HWMON is not set # CONFIG_SENSORS_I5500 is not set # CONFIG_SENSORS_CORETEMP is not set # CONFIG_SENSORS_ISL28022 is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_JC42 is not set CONFIG_SENSORS_POWERZ=y # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LENOVO_EC is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set # CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set # CONFIG_SENSORS_LTC4222 is not set # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set # CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX1668 is not set # CONFIG_SENSORS_MAX197 is not set # CONFIG_SENSORS_MAX31722 is not set # CONFIG_SENSORS_MAX31730 is not set # CONFIG_SENSORS_MAX31760 is not set # CONFIG_MAX31827 is not set # CONFIG_SENSORS_MAX6620 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set # CONFIG_SENSORS_MC34VR500 is not set # CONFIG_SENSORS_MCP3021 is not set # CONFIG_SENSORS_TC654 is not set # CONFIG_SENSORS_TPS23861 is not set # CONFIG_SENSORS_MR75203 is not set # CONFIG_SENSORS_ADCXX is not set # CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM70 is not set # CONFIG_SENSORS_LM73 is not set # CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM78 is not set # CONFIG_SENSORS_LM80 is not set # CONFIG_SENSORS_LM83 is not set # CONFIG_SENSORS_LM85 is not set # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_LM93 is not set # CONFIG_SENSORS_LM95234 is not set # CONFIG_SENSORS_LM95241 is not set # CONFIG_SENSORS_LM95245 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set # CONFIG_SENSORS_NCT6775_I2C is not set # CONFIG_SENSORS_NCT7363 is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set CONFIG_SENSORS_NZXT_KRAKEN2=y # CONFIG_SENSORS_NZXT_KRAKEN3 is not set CONFIG_SENSORS_NZXT_SMART2=y # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set # CONFIG_SENSORS_PT5161L is not set # CONFIG_SENSORS_SBTSI is not set # CONFIG_SENSORS_SHT15 is not set # CONFIG_SENSORS_SHT21 is not set # CONFIG_SENSORS_SHT3x is not set # CONFIG_SENSORS_SHT4x is not set # CONFIG_SENSORS_SHTC1 is not set # CONFIG_SENSORS_SIS5595 is not set # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set # CONFIG_SENSORS_EMC2103 is not set # CONFIG_SENSORS_EMC2305 is not set # CONFIG_SENSORS_EMC6W201 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set # CONFIG_SENSORS_SCH5627 is not set # CONFIG_SENSORS_SCH5636 is not set # CONFIG_SENSORS_STTS751 is not set # CONFIG_SENSORS_SURFACE_FAN is not set # CONFIG_SENSORS_SURFACE_TEMP is not set # CONFIG_SENSORS_ADC128D818 is not set # CONFIG_SENSORS_ADS7828 is not set # CONFIG_SENSORS_ADS7871 is not set # CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_INA209 is not set # CONFIG_SENSORS_INA2XX is not set # CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set # CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set # CONFIG_SENSORS_TMP103 is not set # CONFIG_SENSORS_TMP108 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set # CONFIG_SENSORS_TMP464 is not set # CONFIG_SENSORS_TMP513 is not set # CONFIG_SENSORS_TSC1641 is not set # CONFIG_SENSORS_VIA_CPUTEMP is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set # CONFIG_SENSORS_W83773G is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83793 is not set # CONFIG_SENSORS_W83795 is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83L786NG is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_SENSORS_XGENE is not set # # ACPI drivers # # CONFIG_SENSORS_ACPI_POWER is not set # CONFIG_SENSORS_ATK0110 is not set # CONFIG_SENSORS_ASUS_WMI is not set # CONFIG_SENSORS_ASUS_EC is not set # CONFIG_SENSORS_HP_WMI is not set CONFIG_THERMAL=y CONFIG_THERMAL_NETLINK=y # CONFIG_THERMAL_STATISTICS is not set # CONFIG_THERMAL_DEBUGFS is not set # CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y # CONFIG_THERMAL_OF is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set # CONFIG_THERMAL_GOV_FAIR_SHARE is not set CONFIG_THERMAL_GOV_STEP_WISE=y # CONFIG_THERMAL_GOV_BANG_BANG is not set # CONFIG_THERMAL_GOV_USER_SPACE is not set # CONFIG_PCIE_THERMAL is not set # CONFIG_THERMAL_EMULATION is not set # CONFIG_THERMAL_MMIO is not set # # Intel thermal drivers # # CONFIG_INTEL_POWERCLAMP is not set CONFIG_X86_THERMAL_VECTOR=y CONFIG_INTEL_TCC=y CONFIG_X86_PKG_TEMP_THERMAL=y # CONFIG_INTEL_SOC_DTS_THERMAL is not set # # ACPI INT340X thermal drivers # # CONFIG_INT340X_THERMAL is not set # end of ACPI INT340X thermal drivers # CONFIG_INTEL_BXT_PMIC_THERMAL is not set # CONFIG_INTEL_PCH_THERMAL is not set # CONFIG_INTEL_TCC_COOLING is not set # CONFIG_INTEL_HFI_THERMAL is not set # end of Intel thermal drivers # CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y # CONFIG_WATCHDOG_CORE is not set # CONFIG_WATCHDOG_NOWAYOUT is not set CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # CONFIG_WATCHDOG_SYSFS is not set # CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT is not set # # Watchdog Pretimeout Governors # # # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set # CONFIG_CROS_EC_WATCHDOG is not set # CONFIG_GPIO_WATCHDOG is not set # CONFIG_LENOVO_SE10_WDT is not set # CONFIG_LENOVO_SE30_WDT is not set # CONFIG_WDAT_WDT is not set # CONFIG_XILINX_WATCHDOG is not set # CONFIG_ZIIRAVE_WATCHDOG is not set # CONFIG_CADENCE_WATCHDOG is not set # CONFIG_DW_WATCHDOG is not set # CONFIG_TWL4030_WATCHDOG is not set # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_RETU_WATCHDOG is not set # CONFIG_ACQUIRE_WDT is not set # CONFIG_ADVANTECH_WDT is not set # CONFIG_ADVANTECH_EC_WDT is not set # CONFIG_ALIM1535_WDT is not set # CONFIG_ALIM7101_WDT is not set # CONFIG_EBC_C384_WDT is not set # CONFIG_EXAR_WDT is not set # CONFIG_F71808E_WDT is not set # CONFIG_SP5100_TCO is not set # CONFIG_SBC_FITPC2_WATCHDOG is not set # CONFIG_EUROTECH_WDT is not set # CONFIG_IB700_WDT is not set # CONFIG_IBMASR is not set # CONFIG_WAFER_WDT is not set # CONFIG_I6300ESB_WDT is not set # CONFIG_IE6XX_WDT is not set # CONFIG_INTEL_OC_WATCHDOG is not set # CONFIG_ITCO_WDT is not set # CONFIG_IT8712F_WDT is not set # CONFIG_IT87_WDT is not set # CONFIG_HP_WATCHDOG is not set # CONFIG_SC1200_WDT is not set # CONFIG_PC87413_WDT is not set # CONFIG_NV_TCO is not set # CONFIG_60XX_WDT is not set # CONFIG_SMSC_SCH311X_WDT is not set # CONFIG_SMSC37B787_WDT is not set # CONFIG_TQMX86_WDT is not set # CONFIG_VIA_WDT is not set # CONFIG_W83627HF_WDT is not set # CONFIG_W83877F_WDT is not set # CONFIG_W83977F_WDT is not set # CONFIG_MACHZ_WDT is not set # CONFIG_SBC_EPX_C3_WATCHDOG is not set # CONFIG_INTEL_MEI_WDT is not set # CONFIG_NI903X_WDT is not set # CONFIG_NIC7018_WDT is not set # CONFIG_MEN_A21_WDT is not set # # PCI-based Watchdog Cards # # CONFIG_PCIPCWATCHDOG is not set # CONFIG_WDTPCI is not set # # USB-based Watchdog Cards # CONFIG_USBPCWATCHDOG=y CONFIG_SSB_POSSIBLE=y CONFIG_SSB=y CONFIG_SSB_PCIHOST_POSSIBLE=y # CONFIG_SSB_PCIHOST is not set CONFIG_SSB_PCMCIAHOST_POSSIBLE=y # CONFIG_SSB_PCMCIAHOST is not set CONFIG_SSB_SDIOHOST_POSSIBLE=y # CONFIG_SSB_SDIOHOST is not set # CONFIG_SSB_DRIVER_GPIO is not set CONFIG_BCMA_POSSIBLE=y CONFIG_BCMA=y CONFIG_BCMA_HOST_PCI_POSSIBLE=y # CONFIG_BCMA_HOST_PCI is not set # CONFIG_BCMA_HOST_SOC is not set # CONFIG_BCMA_DRIVER_PCI is not set # CONFIG_BCMA_DRIVER_GMAC_CMN is not set # CONFIG_BCMA_DRIVER_GPIO is not set # CONFIG_BCMA_DEBUG is not set # # Multifunction device drivers # CONFIG_MFD_CORE=y # CONFIG_MFD_ADP5585 is not set # CONFIG_MFD_ACT8945A is not set # CONFIG_MFD_AS3711 is not set # CONFIG_MFD_SMPRO is not set # CONFIG_MFD_AS3722 is not set # CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_AAT2870_CORE is not set # CONFIG_MFD_ATMEL_FLEXCOM is not set # CONFIG_MFD_ATMEL_HLCDC is not set # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP20X_I2C is not set # CONFIG_MFD_CGBC is not set CONFIG_MFD_CROS_EC_DEV=y # CONFIG_MFD_CS40L50_I2C is not set # CONFIG_MFD_CS40L50_SPI is not set # CONFIG_MFD_CS42L43_I2C is not set # CONFIG_MFD_CS42L43_SDW is not set # CONFIG_MFD_LOCHNAGAR is not set # CONFIG_MFD_MADERA is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_DA9052_SPI is not set # CONFIG_MFD_DA9052_I2C is not set # CONFIG_MFD_DA9055 is not set # CONFIG_MFD_DA9062 is not set # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set CONFIG_MFD_DLN2=y # CONFIG_MFD_GATEWORKS_GSC is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_MFD_MP2629 is not set # CONFIG_MFD_PF1550 is not set # CONFIG_MFD_HI6421_PMIC is not set # CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set # CONFIG_LPC_ICH is not set # CONFIG_LPC_SCH is not set # CONFIG_INTEL_SOC_PMIC is not set CONFIG_INTEL_SOC_PMIC_BXTWC=y CONFIG_INTEL_SOC_PMIC_CHTWC=y # CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set # CONFIG_MFD_INTEL_LPSS_ACPI is not set # CONFIG_MFD_INTEL_LPSS_PCI is not set CONFIG_MFD_INTEL_PMC_BXT=y # CONFIG_MFD_IQS62X is not set # CONFIG_MFD_JANZ_CMODIO is not set # CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set # CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX5970 is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77620 is not set # CONFIG_MFD_MAX77650 is not set # CONFIG_MFD_MAX77686 is not set # CONFIG_MFD_MAX77693 is not set # CONFIG_MFD_MAX77705 is not set # CONFIG_MFD_MAX77714 is not set # CONFIG_MFD_MAX77759 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set CONFIG_MFD_MT6360=y CONFIG_MFD_MT6370=y # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set # CONFIG_MFD_NCT6694 is not set # CONFIG_MFD_OCELOT is not set # CONFIG_EZX_PCAP is not set # CONFIG_MFD_CPCAP is not set CONFIG_MFD_VIPERBOARD=y # CONFIG_MFD_NTXEC is not set CONFIG_MFD_RETU=y # CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RDC321X is not set # CONFIG_MFD_RT4831 is not set # CONFIG_MFD_RT5033 is not set # CONFIG_MFD_RT5120 is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_RK8XX_I2C is not set # CONFIG_MFD_RK8XX_SPI is not set # CONFIG_MFD_RN5T618 is not set # CONFIG_MFD_SEC_I2C is not set # CONFIG_MFD_SI476X_CORE is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_SKY81452 is not set # CONFIG_MFD_STMPE is not set CONFIG_MFD_SYSCON=y # CONFIG_MFD_LP3943 is not set # CONFIG_MFD_LP8788 is not set # CONFIG_MFD_TI_LMU is not set # CONFIG_MFD_BQ257XX is not set # CONFIG_MFD_PALMAS is not set # CONFIG_TPS6105X is not set # CONFIG_TPS65010 is not set # CONFIG_TPS6507X is not set # CONFIG_MFD_TPS65086 is not set # CONFIG_MFD_TPS65090 is not set # CONFIG_MFD_TPS65217 is not set # CONFIG_MFD_TI_LP873X is not set # CONFIG_MFD_TI_LP87565 is not set # CONFIG_MFD_TPS65218 is not set # CONFIG_MFD_TPS65219 is not set # CONFIG_MFD_TPS6586X is not set # CONFIG_MFD_TPS65910 is not set # CONFIG_MFD_TPS65912_I2C is not set # CONFIG_MFD_TPS65912_SPI is not set # CONFIG_MFD_TPS6594_I2C is not set # CONFIG_MFD_TPS6594_SPI is not set CONFIG_TWL4030_CORE=y # CONFIG_MFD_TWL4030_AUDIO is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TC3589X is not set # CONFIG_MFD_TQMX86 is not set # CONFIG_MFD_VX855 is not set # CONFIG_MFD_ARIZONA_I2C is not set # CONFIG_MFD_ARIZONA_SPI is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X_I2C is not set # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set # CONFIG_MFD_ROHM_BD718XX is not set # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set # CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_QCOM_PM8008 is not set # CONFIG_RAVE_SP_CORE is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set # CONFIG_MFD_QNAP_MCU is not set # CONFIG_MFD_RSMU_I2C is not set # CONFIG_MFD_RSMU_SPI is not set # CONFIG_MFD_UPBOARD_FPGA is not set # CONFIG_MFD_MAX7360 is not set # end of Multifunction device drivers CONFIG_REGULATOR=y # CONFIG_REGULATOR_DEBUG is not set CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set # CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set # CONFIG_REGULATOR_ADP5055 is not set # CONFIG_REGULATOR_AW37503 is not set # CONFIG_REGULATOR_CROS_EC is not set # CONFIG_REGULATOR_DA9121 is not set # CONFIG_REGULATOR_DA9210 is not set # CONFIG_REGULATOR_DA9211 is not set # CONFIG_REGULATOR_FAN53555 is not set # CONFIG_REGULATOR_FAN53880 is not set # CONFIG_REGULATOR_GPIO is not set # CONFIG_REGULATOR_ISL9305 is not set # CONFIG_REGULATOR_ISL6271A is not set # CONFIG_REGULATOR_FP9931 is not set # CONFIG_REGULATOR_LP3971 is not set # CONFIG_REGULATOR_LP3972 is not set # CONFIG_REGULATOR_LP872X is not set # CONFIG_REGULATOR_LP8755 is not set # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set # CONFIG_REGULATOR_MAX77503 is not set # CONFIG_REGULATOR_MAX77675 is not set # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set # CONFIG_REGULATOR_MAX8660 is not set # CONFIG_REGULATOR_MAX8893 is not set # CONFIG_REGULATOR_MAX8952 is not set # CONFIG_REGULATOR_MAX20086 is not set # CONFIG_REGULATOR_MAX20411 is not set # CONFIG_REGULATOR_MAX77826 is not set # CONFIG_REGULATOR_MAX77838 is not set # CONFIG_REGULATOR_MCP16502 is not set # CONFIG_REGULATOR_MP5416 is not set # CONFIG_REGULATOR_MP8859 is not set # CONFIG_REGULATOR_MP886X is not set # CONFIG_REGULATOR_MPQ7920 is not set # CONFIG_REGULATOR_MT6311 is not set # CONFIG_REGULATOR_MT6360 is not set # CONFIG_REGULATOR_MT6370 is not set # CONFIG_REGULATOR_PCA9450 is not set # CONFIG_REGULATOR_PF9453 is not set # CONFIG_REGULATOR_PF0900 is not set # CONFIG_REGULATOR_PF530X is not set # CONFIG_REGULATOR_PF8X00 is not set # CONFIG_REGULATOR_PFUZE100 is not set # CONFIG_REGULATOR_PV88060 is not set # CONFIG_REGULATOR_PV88080 is not set # CONFIG_REGULATOR_PV88090 is not set # CONFIG_REGULATOR_RAA215300 is not set # CONFIG_REGULATOR_RT4801 is not set # CONFIG_REGULATOR_RT4803 is not set # CONFIG_REGULATOR_RT5133 is not set # CONFIG_REGULATOR_RT5190A is not set # CONFIG_REGULATOR_RT5739 is not set # CONFIG_REGULATOR_RT5759 is not set # CONFIG_REGULATOR_RT6160 is not set # CONFIG_REGULATOR_RT6190 is not set # CONFIG_REGULATOR_RT6245 is not set # CONFIG_REGULATOR_RT8092 is not set # CONFIG_REGULATOR_RTQ2134 is not set # CONFIG_REGULATOR_RTMV20 is not set # CONFIG_REGULATOR_RTQ6752 is not set # CONFIG_REGULATOR_RTQ2208 is not set # CONFIG_REGULATOR_SLG51000 is not set # CONFIG_REGULATOR_SY8106A is not set # CONFIG_REGULATOR_SY8824X is not set # CONFIG_REGULATOR_SY8827N is not set # CONFIG_REGULATOR_TPS51632 is not set # CONFIG_REGULATOR_TPS62360 is not set # CONFIG_REGULATOR_TPS6286X is not set # CONFIG_REGULATOR_TPS6287X is not set # CONFIG_REGULATOR_TPS65023 is not set # CONFIG_REGULATOR_TPS6507X is not set # CONFIG_REGULATOR_TPS65132 is not set # CONFIG_REGULATOR_TPS65185 is not set # CONFIG_REGULATOR_TPS6524X is not set CONFIG_REGULATOR_TWL4030=y # CONFIG_REGULATOR_VCTRL is not set CONFIG_RC_CORE=y # CONFIG_LIRC is not set # CONFIG_RC_MAP is not set # CONFIG_RC_DECODERS is not set CONFIG_RC_DEVICES=y # CONFIG_IR_ENE is not set # CONFIG_IR_FINTEK is not set # CONFIG_IR_GPIO_CIR is not set # CONFIG_IR_HIX5HD2 is not set CONFIG_IR_IGORPLUGUSB=y CONFIG_IR_IGUANA=y CONFIG_IR_IMON=y CONFIG_IR_IMON_RAW=y # CONFIG_IR_ITE_CIR is not set CONFIG_IR_MCEUSB=y # CONFIG_IR_NUVOTON is not set CONFIG_IR_REDRAT3=y # CONFIG_IR_SERIAL is not set CONFIG_IR_STREAMZAP=y CONFIG_IR_TOY=y CONFIG_IR_TTUSBIR=y # CONFIG_IR_WINBOND_CIR is not set CONFIG_RC_ATI_REMOTE=y # CONFIG_RC_LOOPBACK is not set CONFIG_RC_XBOX_DVD=y CONFIG_CEC_CORE=y # # CEC support # # CONFIG_MEDIA_CEC_RC is not set CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set # CONFIG_CEC_NXP_TDA9950 is not set # CONFIG_CEC_CROS_EC is not set # CONFIG_CEC_GPIO is not set # CONFIG_CEC_SECO is not set # CONFIG_USB_EXTRON_DA_HD_4K_PLUS_CEC is not set CONFIG_USB_PULSE8_CEC=y CONFIG_USB_RAINSHADOW_CEC=y # end of CEC support CONFIG_MEDIA_SUPPORT=y # CONFIG_MEDIA_SUPPORT_FILTER is not set # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set # # Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y CONFIG_MEDIA_RADIO_SUPPORT=y CONFIG_MEDIA_SDR_SUPPORT=y CONFIG_MEDIA_PLATFORM_SUPPORT=y CONFIG_MEDIA_TEST_SUPPORT=y # end of Media device types # # Media core support # CONFIG_VIDEO_DEV=y CONFIG_MEDIA_CONTROLLER=y CONFIG_DVB_CORE=y # end of Media core support # # Video4Linux options # CONFIG_VIDEO_V4L2_I2C=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set CONFIG_VIDEO_TUNER=y # end of Video4Linux options # # Media controller options # CONFIG_MEDIA_CONTROLLER_DVB=y # end of Media controller options # # Digital TV options # # CONFIG_DVB_MMAP is not set # CONFIG_DVB_NET is not set CONFIG_DVB_MAX_ADAPTERS=16 # CONFIG_DVB_DYNAMIC_MINORS is not set # CONFIG_DVB_DEMUX_SECTION_LOSS_LOG is not set # CONFIG_DVB_ULE_DEBUG is not set # end of Digital TV options # # Media drivers # # # Media drivers # CONFIG_MEDIA_USB_SUPPORT=y # # Webcam devices # CONFIG_USB_GSPCA=y CONFIG_USB_GSPCA_BENQ=y CONFIG_USB_GSPCA_CONEX=y CONFIG_USB_GSPCA_CPIA1=y CONFIG_USB_GSPCA_DTCS033=y CONFIG_USB_GSPCA_ETOMS=y CONFIG_USB_GSPCA_FINEPIX=y CONFIG_USB_GSPCA_JEILINJ=y CONFIG_USB_GSPCA_JL2005BCD=y CONFIG_USB_GSPCA_KINECT=y CONFIG_USB_GSPCA_KONICA=y CONFIG_USB_GSPCA_MARS=y CONFIG_USB_GSPCA_MR97310A=y CONFIG_USB_GSPCA_NW80X=y CONFIG_USB_GSPCA_OV519=y CONFIG_USB_GSPCA_OV534=y CONFIG_USB_GSPCA_OV534_9=y CONFIG_USB_GSPCA_PAC207=y CONFIG_USB_GSPCA_PAC7302=y CONFIG_USB_GSPCA_PAC7311=y CONFIG_USB_GSPCA_SE401=y CONFIG_USB_GSPCA_SN9C2028=y CONFIG_USB_GSPCA_SN9C20X=y CONFIG_USB_GSPCA_SONIXB=y CONFIG_USB_GSPCA_SONIXJ=y CONFIG_USB_GSPCA_SPCA1528=y CONFIG_USB_GSPCA_SPCA500=y CONFIG_USB_GSPCA_SPCA501=y CONFIG_USB_GSPCA_SPCA505=y CONFIG_USB_GSPCA_SPCA506=y CONFIG_USB_GSPCA_SPCA508=y CONFIG_USB_GSPCA_SPCA561=y CONFIG_USB_GSPCA_SQ905=y CONFIG_USB_GSPCA_SQ905C=y CONFIG_USB_GSPCA_SQ930X=y CONFIG_USB_GSPCA_STK014=y CONFIG_USB_GSPCA_STK1135=y CONFIG_USB_GSPCA_STV0680=y CONFIG_USB_GSPCA_SUNPLUS=y CONFIG_USB_GSPCA_T613=y CONFIG_USB_GSPCA_TOPRO=y CONFIG_USB_GSPCA_TOUPTEK=y CONFIG_USB_GSPCA_TV8532=y CONFIG_USB_GSPCA_VC032X=y CONFIG_USB_GSPCA_VICAM=y CONFIG_USB_GSPCA_XIRLINK_CIT=y CONFIG_USB_GSPCA_ZC3XX=y CONFIG_USB_GL860=y CONFIG_USB_M5602=y CONFIG_USB_STV06XX=y CONFIG_USB_PWC=y # CONFIG_USB_PWC_DEBUG is not set CONFIG_USB_PWC_INPUT_EVDEV=y CONFIG_USB_S2255=y CONFIG_VIDEO_USBTV=y CONFIG_USB_VIDEO_CLASS=y CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y # # Analog TV USB devices # CONFIG_VIDEO_GO7007=y CONFIG_VIDEO_GO7007_USB=y CONFIG_VIDEO_GO7007_LOADER=y CONFIG_VIDEO_GO7007_USB_S2250_BOARD=y CONFIG_VIDEO_HDPVR=y CONFIG_VIDEO_PVRUSB2=y CONFIG_VIDEO_PVRUSB2_SYSFS=y CONFIG_VIDEO_PVRUSB2_DVB=y # CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set CONFIG_VIDEO_STK1160=y # # Analog/digital TV USB devices # CONFIG_VIDEO_AU0828=y CONFIG_VIDEO_AU0828_V4L2=y CONFIG_VIDEO_AU0828_RC=y CONFIG_VIDEO_CX231XX=y CONFIG_VIDEO_CX231XX_RC=y CONFIG_VIDEO_CX231XX_ALSA=y CONFIG_VIDEO_CX231XX_DVB=y # # Digital TV USB devices # CONFIG_DVB_AS102=y CONFIG_DVB_B2C2_FLEXCOP_USB=y # CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG is not set CONFIG_DVB_USB_V2=y CONFIG_DVB_USB_AF9015=y CONFIG_DVB_USB_AF9035=y CONFIG_DVB_USB_ANYSEE=y CONFIG_DVB_USB_AU6610=y CONFIG_DVB_USB_AZ6007=y CONFIG_DVB_USB_CE6230=y CONFIG_DVB_USB_DVBSKY=y CONFIG_DVB_USB_EC168=y CONFIG_DVB_USB_GL861=y CONFIG_DVB_USB_LME2510=y CONFIG_DVB_USB_MXL111SF=y CONFIG_DVB_USB_RTL28XXU=y CONFIG_DVB_USB_ZD1301=y CONFIG_DVB_USB=y # CONFIG_DVB_USB_DEBUG is not set CONFIG_DVB_USB_A800=y CONFIG_DVB_USB_AF9005=y CONFIG_DVB_USB_AF9005_REMOTE=y CONFIG_DVB_USB_AZ6027=y CONFIG_DVB_USB_CINERGY_T2=y CONFIG_DVB_USB_CXUSB=y CONFIG_DVB_USB_CXUSB_ANALOG=y CONFIG_DVB_USB_DIB0700=y CONFIG_DVB_USB_DIB3000MC=y CONFIG_DVB_USB_DIBUSB_MB=y # CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set CONFIG_DVB_USB_DIBUSB_MC=y CONFIG_DVB_USB_DIGITV=y CONFIG_DVB_USB_DTT200U=y CONFIG_DVB_USB_DTV5100=y CONFIG_DVB_USB_DW2102=y CONFIG_DVB_USB_GP8PSK=y CONFIG_DVB_USB_M920X=y CONFIG_DVB_USB_NOVA_T_USB2=y CONFIG_DVB_USB_OPERA1=y CONFIG_DVB_USB_PCTV452E=y CONFIG_DVB_USB_TECHNISAT_USB2=y CONFIG_DVB_USB_TTUSB2=y CONFIG_DVB_USB_UMT_010=y CONFIG_DVB_USB_VP702X=y CONFIG_DVB_USB_VP7045=y CONFIG_SMS_USB_DRV=y CONFIG_DVB_TTUSB_BUDGET=y CONFIG_DVB_TTUSB_DEC=y # # Webcam, TV (analog/digital) USB devices # CONFIG_VIDEO_EM28XX=y CONFIG_VIDEO_EM28XX_V4L2=y CONFIG_VIDEO_EM28XX_ALSA=y CONFIG_VIDEO_EM28XX_DVB=y CONFIG_VIDEO_EM28XX_RC=y # # Software defined radio USB devices # CONFIG_USB_AIRSPY=y CONFIG_USB_HACKRF=y CONFIG_USB_MSI2500=y CONFIG_MEDIA_PCI_SUPPORT=y # # Media capture support # # CONFIG_VIDEO_SOLO6X10 is not set # CONFIG_VIDEO_TW5864 is not set # CONFIG_VIDEO_TW68 is not set # CONFIG_VIDEO_TW686X is not set # CONFIG_VIDEO_ZORAN is not set # # Media capture/analog TV support # # CONFIG_VIDEO_DT3155 is not set # CONFIG_VIDEO_IVTV is not set # CONFIG_VIDEO_HEXIUM_GEMINI is not set # CONFIG_VIDEO_HEXIUM_ORION is not set # CONFIG_VIDEO_MXB is not set # # Media capture/analog/hybrid TV support # # CONFIG_VIDEO_BT848 is not set # CONFIG_VIDEO_CX18 is not set # CONFIG_VIDEO_CX23885 is not set # CONFIG_VIDEO_CX25821 is not set # CONFIG_VIDEO_CX88 is not set CONFIG_VIDEO_SAA7134=y # CONFIG_VIDEO_SAA7134_ALSA is not set # CONFIG_VIDEO_SAA7134_RC is not set # CONFIG_VIDEO_SAA7134_DVB is not set CONFIG_VIDEO_SAA7134_GO7007=y # CONFIG_VIDEO_SAA7164 is not set # # Media digital TV PCI Adapters # CONFIG_DVB_B2C2_FLEXCOP_PCI=y # CONFIG_DVB_B2C2_FLEXCOP_PCI_DEBUG is not set # CONFIG_DVB_DDBRIDGE is not set # CONFIG_DVB_DM1105 is not set # CONFIG_MANTIS_CORE is not set # CONFIG_DVB_NETUP_UNIDVB is not set # CONFIG_DVB_NGENE is not set # CONFIG_DVB_PLUTO2 is not set # CONFIG_DVB_PT1 is not set # CONFIG_DVB_PT3 is not set # CONFIG_DVB_SMIPCIE is not set # CONFIG_DVB_BUDGET_CORE is not set # CONFIG_VIDEO_IPU3_CIO2 is not set # CONFIG_VIDEO_INTEL_IPU6 is not set # CONFIG_INTEL_VSC is not set # CONFIG_IPU_BRIDGE is not set CONFIG_RADIO_ADAPTERS=y # CONFIG_RADIO_MAXIRADIO is not set # CONFIG_RADIO_SAA7706H is not set CONFIG_RADIO_SHARK=y CONFIG_RADIO_SHARK2=y CONFIG_RADIO_SI4713=y CONFIG_RADIO_TEA575X=y # CONFIG_RADIO_TEA5764 is not set # CONFIG_RADIO_TEF6862 is not set CONFIG_USB_DSBR=y CONFIG_USB_KEENE=y CONFIG_USB_MA901=y CONFIG_USB_MR800=y CONFIG_USB_RAREMONO=y CONFIG_RADIO_SI470X=y CONFIG_USB_SI470X=y # CONFIG_I2C_SI470X is not set CONFIG_USB_SI4713=y # CONFIG_PLATFORM_SI4713 is not set CONFIG_I2C_SI4713=y # CONFIG_MEDIA_PLATFORM_DRIVERS is not set # # MMC/SDIO DVB adapters # CONFIG_SMS_SDIO_DRV=y # CONFIG_V4L_TEST_DRIVERS is not set # CONFIG_DVB_TEST_DRIVERS is not set CONFIG_MEDIA_COMMON_OPTIONS=y # # common driver options # CONFIG_CYPRESS_FIRMWARE=y CONFIG_TTPCI_EEPROM=y CONFIG_UVC_COMMON=y CONFIG_VIDEO_CX2341X=y CONFIG_VIDEO_TVEEPROM=y CONFIG_DVB_B2C2_FLEXCOP=y CONFIG_SMS_SIANO_MDTV=y CONFIG_SMS_SIANO_RC=y CONFIG_SMS_SIANO_DEBUGFS=y CONFIG_VIDEOBUF2_CORE=y CONFIG_VIDEOBUF2_V4L2=y CONFIG_VIDEOBUF2_MEMOPS=y CONFIG_VIDEOBUF2_VMALLOC=y CONFIG_VIDEOBUF2_DMA_SG=y # end of Media drivers # # Media ancillary drivers # CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C is not set # CONFIG_VIDEO_CAMERA_SENSOR is not set # # Camera ISPs # # CONFIG_VIDEO_THP7312 is not set # end of Camera ISPs # CONFIG_VIDEO_CAMERA_LENS is not set # # Flash devices # # CONFIG_VIDEO_ADP1653 is not set # CONFIG_VIDEO_LM3560 is not set # CONFIG_VIDEO_LM3646 is not set # end of Flash devices # # Audio decoders, processors and mixers # # CONFIG_VIDEO_CS3308 is not set # CONFIG_VIDEO_CS5345 is not set CONFIG_VIDEO_CS53L32A=y CONFIG_VIDEO_MSP3400=y # CONFIG_VIDEO_SONY_BTF_MPX is not set # CONFIG_VIDEO_TDA1997X is not set # CONFIG_VIDEO_TDA7432 is not set # CONFIG_VIDEO_TDA9840 is not set # CONFIG_VIDEO_TEA6415C is not set # CONFIG_VIDEO_TEA6420 is not set # CONFIG_VIDEO_TLV320AIC23B is not set # CONFIG_VIDEO_TVAUDIO is not set # CONFIG_VIDEO_UDA1342 is not set # CONFIG_VIDEO_VP27SMPX is not set # CONFIG_VIDEO_WM8739 is not set CONFIG_VIDEO_WM8775=y # end of Audio decoders, processors and mixers # # RDS decoders # # CONFIG_VIDEO_SAA6588 is not set # end of RDS decoders # # Video decoders # # CONFIG_VIDEO_ADV7180 is not set # CONFIG_VIDEO_ADV7183 is not set # CONFIG_VIDEO_ADV748X is not set # CONFIG_VIDEO_ADV7604 is not set # CONFIG_VIDEO_ADV7842 is not set # CONFIG_VIDEO_BT819 is not set # CONFIG_VIDEO_BT856 is not set # CONFIG_VIDEO_BT866 is not set # CONFIG_VIDEO_ISL7998X is not set # CONFIG_VIDEO_LT6911UXE is not set # CONFIG_VIDEO_KS0127 is not set # CONFIG_VIDEO_MAX9286 is not set # CONFIG_VIDEO_ML86V7667 is not set # CONFIG_VIDEO_SAA7110 is not set CONFIG_VIDEO_SAA711X=y # CONFIG_VIDEO_TC358743 is not set # CONFIG_VIDEO_TC358746 is not set # CONFIG_VIDEO_TVP514X is not set # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set # CONFIG_VIDEO_TW9900 is not set # CONFIG_VIDEO_TW9903 is not set # CONFIG_VIDEO_TW9906 is not set # CONFIG_VIDEO_TW9910 is not set # CONFIG_VIDEO_VPX3220 is not set # # Video and audio decoders # # CONFIG_VIDEO_SAA717X is not set CONFIG_VIDEO_CX25840=y # end of Video decoders # # Video encoders # # CONFIG_VIDEO_ADV7170 is not set # CONFIG_VIDEO_ADV7175 is not set # CONFIG_VIDEO_ADV7343 is not set # CONFIG_VIDEO_ADV7393 is not set # CONFIG_VIDEO_ADV7511 is not set # CONFIG_VIDEO_AK881X is not set # CONFIG_VIDEO_SAA7127 is not set # CONFIG_VIDEO_SAA7185 is not set # CONFIG_VIDEO_THS8200 is not set # end of Video encoders # # Video improvement chips # # CONFIG_VIDEO_UPD64031A is not set # CONFIG_VIDEO_UPD64083 is not set # end of Video improvement chips # # Audio/Video compression chips # # CONFIG_VIDEO_SAA6752HS is not set # end of Audio/Video compression chips # # SDR tuner chips # # CONFIG_SDR_MAX2175 is not set # end of SDR tuner chips # # Miscellaneous helper chips # # CONFIG_VIDEO_I2C is not set # CONFIG_VIDEO_M52790 is not set # CONFIG_VIDEO_ST_MIPID02 is not set # CONFIG_VIDEO_THS7303 is not set # end of Miscellaneous helper chips # # Video serializers and deserializers # # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set # CONFIG_VIDEO_MAX96714 is not set # CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # # Media SPI Adapters # # CONFIG_CXD2880_SPI_DRV is not set # CONFIG_VIDEO_GS1662 is not set # end of Media SPI Adapters CONFIG_MEDIA_TUNER=y # # Customize TV tuners # # CONFIG_MEDIA_TUNER_E4000 is not set # CONFIG_MEDIA_TUNER_FC0011 is not set # CONFIG_MEDIA_TUNER_FC0012 is not set # CONFIG_MEDIA_TUNER_FC0013 is not set # CONFIG_MEDIA_TUNER_FC2580 is not set # CONFIG_MEDIA_TUNER_IT913X is not set # CONFIG_MEDIA_TUNER_M88RS6000T is not set # CONFIG_MEDIA_TUNER_MAX2165 is not set # CONFIG_MEDIA_TUNER_MC44S803 is not set CONFIG_MEDIA_TUNER_MSI001=y # CONFIG_MEDIA_TUNER_MT2060 is not set # CONFIG_MEDIA_TUNER_MT2063 is not set # CONFIG_MEDIA_TUNER_MT20XX is not set # CONFIG_MEDIA_TUNER_MT2131 is not set # CONFIG_MEDIA_TUNER_MT2266 is not set # CONFIG_MEDIA_TUNER_MXL301RF is not set # CONFIG_MEDIA_TUNER_MXL5005S is not set # CONFIG_MEDIA_TUNER_MXL5007T is not set # CONFIG_MEDIA_TUNER_QM1D1B0004 is not set # CONFIG_MEDIA_TUNER_QM1D1C0042 is not set # CONFIG_MEDIA_TUNER_QT1010 is not set # CONFIG_MEDIA_TUNER_R820T is not set # CONFIG_MEDIA_TUNER_SI2157 is not set # CONFIG_MEDIA_TUNER_SIMPLE is not set # CONFIG_MEDIA_TUNER_TDA18212 is not set # CONFIG_MEDIA_TUNER_TDA18218 is not set # CONFIG_MEDIA_TUNER_TDA18250 is not set # CONFIG_MEDIA_TUNER_TDA18271 is not set # CONFIG_MEDIA_TUNER_TDA827X is not set # CONFIG_MEDIA_TUNER_TDA8290 is not set # CONFIG_MEDIA_TUNER_TDA9887 is not set # CONFIG_MEDIA_TUNER_TEA5761 is not set # CONFIG_MEDIA_TUNER_TEA5767 is not set # CONFIG_MEDIA_TUNER_TUA9001 is not set # CONFIG_MEDIA_TUNER_XC2028 is not set # CONFIG_MEDIA_TUNER_XC4000 is not set # CONFIG_MEDIA_TUNER_XC5000 is not set # end of Customize TV tuners # # Customise DVB Frontends # # # Multistandard (satellite) frontends # # CONFIG_DVB_M88DS3103 is not set # CONFIG_DVB_MXL5XX is not set # CONFIG_DVB_STB0899 is not set # CONFIG_DVB_STB6100 is not set # CONFIG_DVB_STV090x is not set # CONFIG_DVB_STV0910 is not set # CONFIG_DVB_STV6110x is not set # CONFIG_DVB_STV6111 is not set # # Multistandard (cable + terrestrial) frontends # # CONFIG_DVB_DRXK is not set # CONFIG_DVB_MN88472 is not set # CONFIG_DVB_MN88473 is not set # CONFIG_DVB_SI2165 is not set # CONFIG_DVB_TDA18271C2DD is not set # # DVB-S (satellite) frontends # # CONFIG_DVB_CX24110 is not set # CONFIG_DVB_CX24116 is not set # CONFIG_DVB_CX24117 is not set # CONFIG_DVB_CX24120 is not set # CONFIG_DVB_CX24123 is not set # CONFIG_DVB_DS3000 is not set # CONFIG_DVB_MB86A16 is not set # CONFIG_DVB_MT312 is not set # CONFIG_DVB_S5H1420 is not set # CONFIG_DVB_SI21XX is not set # CONFIG_DVB_STB6000 is not set # CONFIG_DVB_STV0288 is not set # CONFIG_DVB_STV0299 is not set # CONFIG_DVB_STV0900 is not set # CONFIG_DVB_STV6110 is not set # CONFIG_DVB_TDA10071 is not set # CONFIG_DVB_TDA10086 is not set # CONFIG_DVB_TDA8083 is not set # CONFIG_DVB_TDA8261 is not set # CONFIG_DVB_TDA826X is not set # CONFIG_DVB_TS2020 is not set # CONFIG_DVB_TUA6100 is not set # CONFIG_DVB_TUNER_CX24113 is not set # CONFIG_DVB_TUNER_ITD1000 is not set # CONFIG_DVB_VES1X93 is not set # CONFIG_DVB_ZL10036 is not set # CONFIG_DVB_ZL10039 is not set # # DVB-T (terrestrial) frontends # CONFIG_DVB_AF9013=y CONFIG_DVB_AS102_FE=y # CONFIG_DVB_CX22700 is not set # CONFIG_DVB_CX22702 is not set # CONFIG_DVB_CXD2820R is not set # CONFIG_DVB_CXD2841ER is not set CONFIG_DVB_DIB3000MB=y CONFIG_DVB_DIB3000MC=y # CONFIG_DVB_DIB7000M is not set # CONFIG_DVB_DIB7000P is not set # CONFIG_DVB_DIB9000 is not set # CONFIG_DVB_DRXD is not set CONFIG_DVB_EC100=y CONFIG_DVB_GP8PSK_FE=y # CONFIG_DVB_L64781 is not set # CONFIG_DVB_MT352 is not set # CONFIG_DVB_NXT6000 is not set CONFIG_DVB_RTL2830=y CONFIG_DVB_RTL2832=y CONFIG_DVB_RTL2832_SDR=y # CONFIG_DVB_S5H1432 is not set # CONFIG_DVB_SI2168 is not set # CONFIG_DVB_SP887X is not set # CONFIG_DVB_STV0367 is not set # CONFIG_DVB_TDA10048 is not set # CONFIG_DVB_TDA1004X is not set # CONFIG_DVB_ZD1301_DEMOD is not set CONFIG_DVB_ZL10353=y # CONFIG_DVB_CXD2880 is not set # # DVB-C (cable) frontends # # CONFIG_DVB_STV0297 is not set # CONFIG_DVB_TDA10021 is not set # CONFIG_DVB_TDA10023 is not set # CONFIG_DVB_VES1820 is not set # # ATSC (North American/Korean Terrestrial/Cable DTV) frontends # # CONFIG_DVB_AU8522_DTV is not set # CONFIG_DVB_AU8522_V4L is not set # CONFIG_DVB_BCM3510 is not set # CONFIG_DVB_LG2160 is not set # CONFIG_DVB_LGDT3305 is not set # CONFIG_DVB_LGDT3306A is not set # CONFIG_DVB_LGDT330X is not set # CONFIG_DVB_MXL692 is not set # CONFIG_DVB_NXT200X is not set # CONFIG_DVB_OR51132 is not set # CONFIG_DVB_OR51211 is not set # CONFIG_DVB_S5H1409 is not set # CONFIG_DVB_S5H1411 is not set # # ISDB-T (terrestrial) frontends # # CONFIG_DVB_DIB8000 is not set # CONFIG_DVB_MB86A20S is not set # CONFIG_DVB_S921 is not set # # ISDB-S (satellite) & ISDB-T (terrestrial) frontends # # CONFIG_DVB_MN88443X is not set # CONFIG_DVB_TC90522 is not set # # Digital terrestrial only tuners/PLL # # CONFIG_DVB_PLL is not set # CONFIG_DVB_TUNER_DIB0070 is not set # CONFIG_DVB_TUNER_DIB0090 is not set # # SEC control devices for DVB-S # # CONFIG_DVB_A8293 is not set CONFIG_DVB_AF9033=y # CONFIG_DVB_ASCOT2E is not set # CONFIG_DVB_ATBM8830 is not set # CONFIG_DVB_HELENE is not set # CONFIG_DVB_HORUS3A is not set # CONFIG_DVB_ISL6405 is not set # CONFIG_DVB_ISL6421 is not set # CONFIG_DVB_ISL6423 is not set # CONFIG_DVB_IX2505V is not set # CONFIG_DVB_LGS8GL5 is not set # CONFIG_DVB_LGS8GXX is not set # CONFIG_DVB_LNBH25 is not set # CONFIG_DVB_LNBH29 is not set # CONFIG_DVB_LNBP21 is not set # CONFIG_DVB_LNBP22 is not set # CONFIG_DVB_M88RS2000 is not set # CONFIG_DVB_TDA665x is not set # CONFIG_DVB_DRX39XYJ is not set # # Common Interface (EN50221) controller drivers # # CONFIG_DVB_CXD2099 is not set # CONFIG_DVB_SP2 is not set # end of Customise DVB Frontends # # Tools to develop new frontends # # CONFIG_DVB_DUMMY_FE is not set # end of Media ancillary drivers # # Graphics support # CONFIG_APERTURE_HELPERS=y CONFIG_SCREEN_INFO=y CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set # CONFIG_PANEL is not set CONFIG_AGP=y CONFIG_AGP_AMD64=y CONFIG_AGP_INTEL=y # CONFIG_AGP_SIS is not set # CONFIG_AGP_VIA is not set CONFIG_INTEL_GTT=y # CONFIG_VGA_SWITCHEROO is not set CONFIG_DRM=y # # DRM debugging options # # CONFIG_DRM_WERROR is not set # CONFIG_DRM_DEBUG_MM is not set # end of DRM debugging options CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_KMS_HELPER=y # CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set # CONFIG_DRM_DEBUG_MODESET_LOCK is not set CONFIG_DRM_CLIENT_SELECTION=y # # Supported DRM clients # # CONFIG_DRM_FBDEV_EMULATION is not set # CONFIG_DRM_CLIENT_LOG is not set # end of Supported DRM clients # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set CONFIG_DRM_DISPLAY_HELPER=y # CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set # CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_DSC_HELPER=y CONFIG_DRM_DISPLAY_HDCP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y CONFIG_DRM_TTM=y CONFIG_DRM_BUDDY=y CONFIG_DRM_GEM_SHMEM_HELPER=y # CONFIG_DRM_AMDGPU is not set # # ARM devices # # CONFIG_DRM_KOMEDA is not set # end of ARM devices # CONFIG_DRM_AST is not set CONFIG_DRM_BRIDGE=y CONFIG_DRM_PANEL_BRIDGE=y CONFIG_DRM_AUX_BRIDGE=y # # Display Interface Bridges # # CONFIG_DRM_CHIPONE_ICN6211 is not set # CONFIG_DRM_CHRONTEL_CH7033 is not set # CONFIG_DRM_DISPLAY_CONNECTOR is not set # CONFIG_DRM_I2C_NXP_TDA998X is not set # CONFIG_DRM_ITE_IT6263 is not set # CONFIG_DRM_ITE_IT6505 is not set # CONFIG_DRM_LONTIUM_LT8912B is not set # CONFIG_DRM_LONTIUM_LT9211 is not set # CONFIG_DRM_LONTIUM_LT9611 is not set # CONFIG_DRM_LONTIUM_LT9611UXC is not set # CONFIG_DRM_ITE_IT66121 is not set # CONFIG_DRM_LVDS_CODEC is not set # CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set # CONFIG_DRM_NWL_MIPI_DSI is not set # CONFIG_DRM_NXP_PTN3460 is not set # CONFIG_DRM_PARADE_PS8622 is not set # CONFIG_DRM_PARADE_PS8640 is not set # CONFIG_DRM_SAMSUNG_DSIM is not set # CONFIG_DRM_SIL_SII8620 is not set # CONFIG_DRM_SII902X is not set # CONFIG_DRM_SII9234 is not set # CONFIG_DRM_SIMPLE_BRIDGE is not set # CONFIG_DRM_SOLOMON_SSD2825 is not set # CONFIG_DRM_THINE_THC63LVD1024 is not set # CONFIG_DRM_TOSHIBA_TC358762 is not set # CONFIG_DRM_TOSHIBA_TC358764 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set # CONFIG_DRM_TI_DLPC3433 is not set # CONFIG_DRM_TI_TDP158 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set # CONFIG_DRM_TI_SN65DSI86 is not set # CONFIG_DRM_TI_TPD12S015 is not set # CONFIG_DRM_WAVESHARE_BRIDGE is not set # CONFIG_DRM_ANALOGIX_ANX6345 is not set # CONFIG_DRM_ANALOGIX_ANX78XX is not set # CONFIG_DRM_ANALOGIX_ANX7625 is not set # CONFIG_DRM_I2C_ADV7511 is not set # CONFIG_DRM_CDNS_DSI is not set # CONFIG_DRM_CDNS_MHDP8546 is not set # end of Display Interface Bridges # CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_GMA500 is not set CONFIG_DRM_GUD=y # CONFIG_DRM_HISI_HIBMC is not set CONFIG_DRM_I915=y CONFIG_DRM_I915_FORCE_PROBE="" CONFIG_DRM_I915_CAPTURE_ERROR=y CONFIG_DRM_I915_COMPRESS_ERROR=y CONFIG_DRM_I915_USERPTR=y # CONFIG_DRM_I915_DP_TUNNEL is not set # # drm/i915 Debugging # # CONFIG_DRM_I915_WERROR is not set # CONFIG_DRM_I915_REPLAY_GPU_HANGS_API is not set # CONFIG_DRM_I915_DEBUG is not set # CONFIG_DRM_I915_DEBUG_MMIO is not set # CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set # CONFIG_DRM_I915_SW_FENCE_CHECK_DAG is not set # CONFIG_DRM_I915_DEBUG_GUC is not set # CONFIG_DRM_I915_SELFTEST is not set # CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set # CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set # CONFIG_DRM_I915_DEBUG_RUNTIME_PM is not set # CONFIG_DRM_I915_DEBUG_WAKEREF is not set # end of drm/i915 Debugging # # drm/i915 Profile Guided Optimisation # CONFIG_DRM_I915_REQUEST_TIMEOUT=20000 CONFIG_DRM_I915_FENCE_TIMEOUT=10000 CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 CONFIG_DRM_I915_PREEMPT_TIMEOUT_COMPUTE=7500 CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 CONFIG_DRM_I915_STOP_TIMEOUT=100 CONFIG_DRM_I915_TIMESLICE_DURATION=1 # end of drm/i915 Profile Guided Optimisation # CONFIG_DRM_LOGICVC is not set # CONFIG_DRM_MGAG200 is not set # CONFIG_DRM_NOUVEAU is not set CONFIG_DRM_PANEL=y # # Display Panels # # CONFIG_DRM_PANEL_ABT_Y030XX067A is not set # CONFIG_DRM_PANEL_ARM_VERSATILE is not set # CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0 is not set # CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set # CONFIG_DRM_PANEL_BOE_TD4320 is not set # CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set # CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set # CONFIG_DRM_PANEL_BOE_TV101WUM_LL2 is not set # CONFIG_DRM_PANEL_EBBG_FT8719 is not set # CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set # CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set # CONFIG_DRM_PANEL_DSI_CM is not set # CONFIG_DRM_PANEL_LVDS is not set # CONFIG_DRM_PANEL_HIMAX_HX8279 is not set # CONFIG_DRM_PANEL_HIMAX_HX83102 is not set # CONFIG_DRM_PANEL_HIMAX_HX83112A is not set # CONFIG_DRM_PANEL_HIMAX_HX83112B is not set # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set # CONFIG_DRM_PANEL_HYDIS_HV101HD1 is not set # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9805 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set # CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set # CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set # CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set # CONFIG_DRM_PANEL_JDI_LPM102A188A is not set # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set # CONFIG_DRM_PANEL_JDI_R63452 is not set # CONFIG_DRM_PANEL_KHADAS_TS050 is not set # CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set # CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set # CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set # CONFIG_DRM_PANEL_LINCOLNTECH_LCD197 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LD070WX3 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set # CONFIG_DRM_PANEL_LG_SW43408 is not set # CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966 is not set # CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set # CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set # CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set # CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set # CONFIG_DRM_PANEL_NOVATEK_NT35560 is not set # CONFIG_DRM_PANEL_NOVATEK_NT35950 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set # CONFIG_DRM_PANEL_NOVATEK_NT36672E is not set # CONFIG_DRM_PANEL_NOVATEK_NT37801 is not set # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set # CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set # CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set # CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set # CONFIG_DRM_PANEL_RAYDIUM_RM67191 is not set # CONFIG_DRM_PANEL_RAYDIUM_RM67200 is not set # CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set # CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set # CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set # CONFIG_DRM_PANEL_RENESAS_R61307 is not set # CONFIG_DRM_PANEL_RENESAS_R69328 is not set # CONFIG_DRM_PANEL_RONBO_RB070D30 is not set # CONFIG_DRM_PANEL_SAMSUNG_AMS581VF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_AMS639RQ08 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS427AP24 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set # CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_SAMSUNG_LTL106HL02 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E3FA7 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E3FC2X01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA8 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA5X01_AMS561RA01 is not set # CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set # CONFIG_DRM_PANEL_SHARP_LQ079L1SX01 is not set # CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set # CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set # CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set # CONFIG_DRM_PANEL_SHARP_LS060T1SX01 is not set # CONFIG_DRM_PANEL_SITRONIX_ST7701 is not set # CONFIG_DRM_PANEL_SITRONIX_ST7703 is not set # CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set # CONFIG_DRM_PANEL_SONY_ACX565AKM is not set # CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set # CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521 is not set # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set # CONFIG_DRM_PANEL_EDP is not set # CONFIG_DRM_PANEL_SIMPLE is not set # CONFIG_DRM_PANEL_SUMMIT is not set # CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set # CONFIG_DRM_PANEL_SYNAPTICS_TDDI is not set # CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set # CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set # CONFIG_DRM_PANEL_VISIONOX_G2647FB105 is not set # CONFIG_DRM_PANEL_VISIONOX_R66451 is not set # CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set # CONFIG_DRM_PANEL_VISIONOX_RM692E5 is not set # CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set # CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set # end of Display Panels # CONFIG_DRM_QXL is not set # CONFIG_DRM_RADEON is not set # CONFIG_DRM_ST7571 is not set # CONFIG_DRM_ST7586 is not set # CONFIG_DRM_ST7735R is not set # CONFIG_DRM_ST7920 is not set # CONFIG_DRM_SSD130X is not set # # Drivers for system framebuffers # # CONFIG_DRM_SIMPLEDRM is not set # CONFIG_DRM_VESADRM is not set # end of Drivers for system framebuffers # CONFIG_DRM_APPLETBDRM is not set # CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_BOCHS is not set # CONFIG_DRM_CIRRUS_QEMU is not set CONFIG_DRM_GM12U320=y # CONFIG_DRM_PANEL_MIPI_DBI is not set # CONFIG_DRM_PIXPAPER is not set # CONFIG_TINYDRM_HX8357D is not set # CONFIG_TINYDRM_ILI9163 is not set # CONFIG_TINYDRM_ILI9225 is not set # CONFIG_TINYDRM_ILI9341 is not set # CONFIG_TINYDRM_ILI9486 is not set # CONFIG_TINYDRM_MI0283QT is not set # CONFIG_TINYDRM_REPAPER is not set # CONFIG_TINYDRM_SHARP_MEMORY is not set CONFIG_DRM_UDL=y # CONFIG_DRM_VBOXVIDEO is not set # CONFIG_DRM_VGEM is not set CONFIG_DRM_VIRTIO_GPU=y CONFIG_DRM_VIRTIO_GPU_KMS=y # CONFIG_DRM_VKMS is not set # CONFIG_DRM_VMWGFX is not set # CONFIG_DRM_XE is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # CONFIG_FB=y # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_ARC is not set # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set # CONFIG_FB_VGA16 is not set # CONFIG_FB_UVESA is not set # CONFIG_FB_VESA is not set # CONFIG_FB_N411 is not set # CONFIG_FB_HGA is not set # CONFIG_FB_OPENCORES is not set # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_I740 is not set # CONFIG_FB_RADEON is not set # CONFIG_FB_ATY128 is not set # CONFIG_FB_ATY is not set # CONFIG_FB_SAVAGE is not set # CONFIG_FB_SIS is not set # CONFIG_FB_VIA is not set # CONFIG_FB_NEOMAGIC is not set # CONFIG_FB_KYRO is not set # CONFIG_FB_3DFX is not set # CONFIG_FB_VOODOO1 is not set # CONFIG_FB_TRIDENT is not set # CONFIG_FB_PM3 is not set # CONFIG_FB_CARMINE is not set CONFIG_FB_SMSCUFX=y CONFIG_FB_UDL=y # CONFIG_FB_IBM_GXT4500 is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_FB_METRONOME is not set # CONFIG_FB_MB862XX is not set # CONFIG_FB_SIMPLE is not set # CONFIG_FB_SSD1307 is not set # CONFIG_FB_SM712 is not set CONFIG_FB_CORE=y CONFIG_FB_NOTIFY=y CONFIG_FB_DEVICE=y CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_SYSMEM_HELPERS=y CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y CONFIG_FB_MODE_HELPERS=y # CONFIG_FB_TILEBLITTING is not set # end of Frame buffer Devices # # Backlight & LCD device support # CONFIG_LCD_CLASS_DEVICE=y # CONFIG_LCD_L4F00242T03 is not set # CONFIG_LCD_LMS283GF05 is not set # CONFIG_LCD_LTV350QV is not set # CONFIG_LCD_ILI922X is not set # CONFIG_LCD_ILI9320 is not set # CONFIG_LCD_TDO24M is not set # CONFIG_LCD_VGG2432A4 is not set # CONFIG_LCD_PLATFORM is not set # CONFIG_LCD_AMS369FG06 is not set # CONFIG_LCD_LMS501KF03 is not set # CONFIG_LCD_HX8357 is not set # CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_AW99706 is not set # CONFIG_BACKLIGHT_KTD253 is not set # CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set # CONFIG_BACKLIGHT_MT6370 is not set # CONFIG_BACKLIGHT_APPLE is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_SAHARA is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set # CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_PANDORA is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set # CONFIG_BACKLIGHT_ARCXCNN is not set # CONFIG_BACKLIGHT_LED is not set # end of Backlight & LCD device support CONFIG_HDMI=y # CONFIG_FIRMWARE_EDID is not set # # Console display driver support # CONFIG_VGA_CONSOLE=y CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 # CONFIG_FRAMEBUFFER_CONSOLE is not set # end of Console display driver support # CONFIG_LOGO is not set # CONFIG_TRACE_GPU_MEM is not set # end of Graphics support # CONFIG_DRM_ACCEL is not set CONFIG_SOUND=y CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y CONFIG_SND_HWDEP=y CONFIG_SND_SEQ_DEVICE=y CONFIG_SND_RAWMIDI=y CONFIG_SND_UMP=y CONFIG_SND_UMP_LEGACY_RAWMIDI=y CONFIG_SND_JACK=y CONFIG_SND_JACK_INPUT_DEV=y # CONFIG_SND_OSSEMUL is not set CONFIG_SND_PCM_TIMER=y CONFIG_SND_HRTIMER=y # CONFIG_SND_DYNAMIC_MINORS is not set # CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set # CONFIG_SND_CTL_INPUT_VALIDATION is not set # CONFIG_SND_UTIMER is not set CONFIG_SND_VMASTER=y CONFIG_SND_DMA_SGBUF=y CONFIG_SND_SEQUENCER=y CONFIG_SND_SEQ_DUMMY=y CONFIG_SND_SEQ_HRTIMER_DEFAULT=y CONFIG_SND_SEQ_MIDI_EVENT=y CONFIG_SND_SEQ_MIDI=y # CONFIG_SND_SEQ_UMP is not set CONFIG_SND_DRIVERS=y # CONFIG_SND_PCSP is not set # CONFIG_SND_DUMMY is not set # CONFIG_SND_ALOOP is not set # CONFIG_SND_PCMTEST is not set # CONFIG_SND_VIRMIDI is not set # CONFIG_SND_MTPAV is not set # CONFIG_SND_MTS64 is not set # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_SERIAL_GENERIC is not set # CONFIG_SND_MPU401 is not set # CONFIG_SND_PORTMAN2X4 is not set CONFIG_SND_PCI=y # CONFIG_SND_AD1889 is not set # CONFIG_SND_ALS300 is not set # CONFIG_SND_ALS4000 is not set # CONFIG_SND_ALI5451 is not set # CONFIG_SND_ASIHPI is not set # CONFIG_SND_ATIIXP is not set # CONFIG_SND_ATIIXP_MODEM is not set # CONFIG_SND_AU8810 is not set # CONFIG_SND_AU8820 is not set # CONFIG_SND_AU8830 is not set # CONFIG_SND_AW2 is not set # CONFIG_SND_AZT3328 is not set # CONFIG_SND_BT87X is not set # CONFIG_SND_CA0106 is not set # CONFIG_SND_CMIPCI is not set # CONFIG_SND_OXYGEN is not set # CONFIG_SND_CS4281 is not set # CONFIG_SND_CS46XX is not set # CONFIG_SND_CTXFI is not set # CONFIG_SND_DARLA20 is not set # CONFIG_SND_GINA20 is not set # CONFIG_SND_LAYLA20 is not set # CONFIG_SND_DARLA24 is not set # CONFIG_SND_GINA24 is not set # CONFIG_SND_LAYLA24 is not set # CONFIG_SND_MONA is not set # CONFIG_SND_MIA is not set # CONFIG_SND_ECHO3G is not set # CONFIG_SND_INDIGO is not set # CONFIG_SND_INDIGOIO is not set # CONFIG_SND_INDIGODJ is not set # CONFIG_SND_INDIGOIOX is not set # CONFIG_SND_INDIGODJX is not set # CONFIG_SND_EMU10K1 is not set # CONFIG_SND_EMU10K1X is not set # CONFIG_SND_ENS1370 is not set # CONFIG_SND_ENS1371 is not set # CONFIG_SND_ES1938 is not set # CONFIG_SND_ES1968 is not set # CONFIG_SND_FM801 is not set # CONFIG_SND_HDSP is not set # CONFIG_SND_HDSPM is not set # CONFIG_SND_ICE1712 is not set # CONFIG_SND_ICE1724 is not set # CONFIG_SND_INTEL8X0 is not set # CONFIG_SND_INTEL8X0M is not set # CONFIG_SND_KORG1212 is not set # CONFIG_SND_LOLA is not set # CONFIG_SND_LX6464ES is not set # CONFIG_SND_MAESTRO3 is not set # CONFIG_SND_MIXART is not set # CONFIG_SND_NM256 is not set # CONFIG_SND_PCXHR is not set # CONFIG_SND_RIPTIDE is not set # CONFIG_SND_RME32 is not set # CONFIG_SND_RME96 is not set # CONFIG_SND_RME9652 is not set # CONFIG_SND_SE6X is not set # CONFIG_SND_SONICVIBES is not set # CONFIG_SND_TRIDENT is not set # CONFIG_SND_VIA82XX is not set # CONFIG_SND_VIA82XX_MODEM is not set # CONFIG_SND_VIRTUOSO is not set # CONFIG_SND_VX222 is not set # CONFIG_SND_YMFPCI is not set # # HD-Audio # CONFIG_SND_HDA=y CONFIG_SND_HDA_HWDEP=y # CONFIG_SND_HDA_RECONFIG is not set # CONFIG_SND_HDA_INPUT_BEEP is not set # CONFIG_SND_HDA_PATCH_LOADER is not set CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 # CONFIG_SND_HDA_CTL_DEV_ID is not set CONFIG_SND_HDA_PREALLOC_SIZE=0 CONFIG_SND_HDA_INTEL=y # CONFIG_SND_HDA_ACPI is not set # CONFIG_SND_HDA_CODEC_ANALOG is not set # CONFIG_SND_HDA_CODEC_SIGMATEL is not set # CONFIG_SND_HDA_CODEC_VIA is not set # CONFIG_SND_HDA_CODEC_CONEXANT is not set # CONFIG_SND_HDA_CODEC_SENARYTECH is not set # CONFIG_SND_HDA_CODEC_CA0110 is not set # CONFIG_SND_HDA_CODEC_CA0132 is not set # CONFIG_SND_HDA_CODEC_CMEDIA is not set # CONFIG_SND_HDA_CODEC_CM9825 is not set # CONFIG_SND_HDA_CODEC_SI3054 is not set # CONFIG_SND_HDA_GENERIC is not set # CONFIG_SND_HDA_CODEC_REALTEK is not set # CONFIG_SND_HDA_CODEC_CIRRUS is not set # CONFIG_SND_HDA_CODEC_HDMI is not set # CONFIG_SND_HDA_SCODEC_CS35L56_I2C is not set # CONFIG_SND_HDA_SCODEC_CS35L56_SPI is not set CONFIG_SND_HDA_CORE=y CONFIG_SND_HDA_COMPONENT=y CONFIG_SND_HDA_I915=y CONFIG_SND_INTEL_NHLT=y CONFIG_SND_INTEL_DSP_CONFIG=y CONFIG_SND_INTEL_SOUNDWIRE_ACPI=y # end of HD-Audio # CONFIG_SND_SPI is not set CONFIG_SND_USB=y CONFIG_SND_USB_AUDIO=y CONFIG_SND_USB_AUDIO_MIDI_V2=y CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y CONFIG_SND_USB_UA101=y CONFIG_SND_USB_USX2Y=y CONFIG_SND_USB_CAIAQ=y CONFIG_SND_USB_CAIAQ_INPUT=y CONFIG_SND_USB_US122L=y # CONFIG_SND_USB_US144MKII is not set CONFIG_SND_USB_6FIRE=y CONFIG_SND_USB_HIFACE=y CONFIG_SND_BCD2000=y CONFIG_SND_USB_LINE6=y CONFIG_SND_USB_POD=y CONFIG_SND_USB_PODHD=y CONFIG_SND_USB_TONEPORT=y CONFIG_SND_USB_VARIAX=y CONFIG_SND_PCMCIA=y # CONFIG_SND_VXPOCKET is not set # CONFIG_SND_PDAUDIOCF is not set CONFIG_SND_SOC=y # CONFIG_SND_SOC_USB is not set # # Analog Devices # # CONFIG_SND_SOC_ADI_AXI_I2S is not set # CONFIG_SND_SOC_ADI_AXI_SPDIF is not set # end of Analog Devices # # AMD # # CONFIG_SND_SOC_AMD_ACP is not set # CONFIG_SND_SOC_AMD_ACP3x is not set # CONFIG_SND_SOC_AMD_RENOIR is not set # CONFIG_SND_SOC_AMD_ACP5x is not set # CONFIG_SND_SOC_AMD_ACP6x is not set # CONFIG_SND_AMD_ACP_CONFIG is not set # CONFIG_SND_SOC_AMD_ACP_COMMON is not set # CONFIG_SND_SOC_AMD_RPL_ACP6x is not set # end of AMD # # Apple # # end of Apple # # Atmel # # CONFIG_SND_SOC_MIKROE_PROTO is not set # end of Atmel # # Au1x # # end of Au1x # # Broadcom # # CONFIG_SND_BCM63XX_I2S_WHISTLER is not set # end of Broadcom # # Cirrus Logic # # end of Cirrus Logic # # DesignWare # # CONFIG_SND_DESIGNWARE_I2S is not set # end of DesignWare # # Freescale # # # Common SoC Audio options for Freescale CPUs: # # CONFIG_SND_SOC_FSL_ASRC is not set # CONFIG_SND_SOC_FSL_SAI is not set # CONFIG_SND_SOC_FSL_AUDMIX is not set # CONFIG_SND_SOC_FSL_SSI is not set # CONFIG_SND_SOC_FSL_SPDIF is not set # CONFIG_SND_SOC_FSL_ESAI is not set # CONFIG_SND_SOC_FSL_MICFIL is not set # CONFIG_SND_SOC_FSL_XCVR is not set # CONFIG_SND_SOC_IMX_AUDMUX is not set # end of Freescale # # Google # # CONFIG_SND_SOC_CHV3_I2S is not set # end of Google # # Hisilicon # # CONFIG_SND_I2S_HI6210_I2S is not set # end of Hisilicon # # JZ4740 # # end of JZ4740 # # Kirkwood # # end of Kirkwood # # Loongson # # end of Loongson # # Intel # # CONFIG_SND_SOC_INTEL_SST_TOPLEVEL is not set # CONFIG_SND_SOC_INTEL_AVS is not set # end of Intel # # Mediatek # # CONFIG_SND_SOC_MTK_BTCVSD is not set # end of Mediatek # # PXA # # end of PXA # # SoundWire (SDCA) # CONFIG_SND_SOC_SDCA_OPTIONAL=y # end of SoundWire (SDCA) # # ST SPEAr # # end of ST SPEAr # # Spreadtrum # # end of Spreadtrum # # STMicroelectronics STM32 # # end of STMicroelectronics STM32 # # Tegra # # end of Tegra # # Xilinx # # CONFIG_SND_SOC_XILINX_I2S is not set # CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set # CONFIG_SND_SOC_XILINX_SPDIF is not set # end of Xilinx # # Xtensa # # CONFIG_SND_SOC_XTFPGA_I2S is not set # end of Xtensa # CONFIG_SND_SOC_SOF_TOPLEVEL is not set CONFIG_SND_SOC_I2C_AND_SPI=y # # CODEC drivers # # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1372_I2C is not set # CONFIG_SND_SOC_ADAU1372_SPI is not set # CONFIG_SND_SOC_ADAU1373 is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set # CONFIG_SND_SOC_ADAU1761_SPI is not set # CONFIG_SND_SOC_ADAU7002 is not set # CONFIG_SND_SOC_ADAU7118_HW is not set # CONFIG_SND_SOC_ADAU7118_I2C is not set # CONFIG_SND_SOC_AK4104 is not set # CONFIG_SND_SOC_AK4118 is not set # CONFIG_SND_SOC_AK4375 is not set # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set # CONFIG_SND_SOC_AK4613 is not set # CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set # CONFIG_SND_SOC_ALC5623 is not set # CONFIG_SND_SOC_AUDIO_IIO_AUX is not set # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set # CONFIG_SND_SOC_AW88166 is not set # CONFIG_SND_SOC_AW88261 is not set # CONFIG_SND_SOC_AW88081 is not set # CONFIG_SND_SOC_AW87390 is not set # CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set # CONFIG_SND_SOC_CROS_EC_CODEC is not set # CONFIG_SND_SOC_CS35L32 is not set # CONFIG_SND_SOC_CS35L33 is not set # CONFIG_SND_SOC_CS35L34 is not set # CONFIG_SND_SOC_CS35L35 is not set # CONFIG_SND_SOC_CS35L36 is not set # CONFIG_SND_SOC_CS35L41_SPI is not set # CONFIG_SND_SOC_CS35L41_I2C is not set # CONFIG_SND_SOC_CS35L45_SPI is not set # CONFIG_SND_SOC_CS35L45_I2C is not set # CONFIG_SND_SOC_CS35L56_I2C is not set # CONFIG_SND_SOC_CS35L56_SPI is not set # CONFIG_SND_SOC_CS35L56_SDW is not set # CONFIG_SND_SOC_CS42L42 is not set # CONFIG_SND_SOC_CS42L42_SDW is not set # CONFIG_SND_SOC_CS42L51_I2C is not set # CONFIG_SND_SOC_CS42L52 is not set # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set # CONFIG_SND_SOC_CS42L83 is not set # CONFIG_SND_SOC_CS42L84 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set # CONFIG_SND_SOC_CS4271_I2C is not set # CONFIG_SND_SOC_CS4271_SPI is not set # CONFIG_SND_SOC_CS42XX8_I2C is not set # CONFIG_SND_SOC_CS43130 is not set # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS48L32 is not set # CONFIG_SND_SOC_CS53L30 is not set # CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CS530X_SPI is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set # CONFIG_SND_SOC_ES7134 is not set # CONFIG_SND_SOC_ES7241 is not set # CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set # CONFIG_SND_SOC_ES8323 is not set # CONFIG_SND_SOC_ES8326 is not set # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_ES8328_SPI is not set # CONFIG_SND_SOC_ES8375 is not set # CONFIG_SND_SOC_ES8389 is not set # CONFIG_SND_SOC_FS210X is not set # CONFIG_SND_SOC_GTM601 is not set # CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_IDT821034 is not set # CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98090 is not set # CONFIG_SND_SOC_MAX98357A is not set # CONFIG_SND_SOC_MAX98504 is not set # CONFIG_SND_SOC_MAX9867 is not set # CONFIG_SND_SOC_MAX98927 is not set # CONFIG_SND_SOC_MAX98520 is not set # CONFIG_SND_SOC_MAX98363 is not set # CONFIG_SND_SOC_MAX98373_I2C is not set # CONFIG_SND_SOC_MAX98373_SDW is not set # CONFIG_SND_SOC_MAX98388 is not set # CONFIG_SND_SOC_MAX98390 is not set # CONFIG_SND_SOC_MAX98396 is not set # CONFIG_SND_SOC_MAX9860 is not set # CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set # CONFIG_SND_SOC_PCM1681 is not set # CONFIG_SND_SOC_PCM1754 is not set # CONFIG_SND_SOC_PCM1789_I2C is not set # CONFIG_SND_SOC_PCM179X_I2C is not set # CONFIG_SND_SOC_PCM179X_SPI is not set # CONFIG_SND_SOC_PCM186X_I2C is not set # CONFIG_SND_SOC_PCM186X_SPI is not set # CONFIG_SND_SOC_PCM3060_I2C is not set # CONFIG_SND_SOC_PCM3060_SPI is not set # CONFIG_SND_SOC_PCM3168A_I2C is not set # CONFIG_SND_SOC_PCM3168A_SPI is not set # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set # CONFIG_SND_SOC_PM4125_SDW is not set # CONFIG_SND_SOC_RT1017_SDCA_SDW is not set # CONFIG_SND_SOC_RT1308_SDW is not set # CONFIG_SND_SOC_RT1316_SDW is not set # CONFIG_SND_SOC_RT1318_SDW is not set # CONFIG_SND_SOC_RT1320_SDW is not set # CONFIG_SND_SOC_RT5575 is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_RT5640 is not set # CONFIG_SND_SOC_RT5659 is not set # CONFIG_SND_SOC_RT5682_SDW is not set # CONFIG_SND_SOC_RT700_SDW is not set # CONFIG_SND_SOC_RT711_SDW is not set # CONFIG_SND_SOC_RT711_SDCA_SDW is not set # CONFIG_SND_SOC_RT712_SDCA_SDW is not set # CONFIG_SND_SOC_RT712_SDCA_DMIC_SDW is not set # CONFIG_SND_SOC_RT721_SDCA_SDW is not set # CONFIG_SND_SOC_RT722_SDCA_SDW is not set # CONFIG_SND_SOC_RT715_SDW is not set # CONFIG_SND_SOC_RT715_SDCA_SDW is not set # CONFIG_SND_SOC_RT9120 is not set # CONFIG_SND_SOC_RT9123 is not set # CONFIG_SND_SOC_RT9123P is not set # CONFIG_SND_SOC_RTQ9124 is not set # CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SDW_MOCKUP is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIMPLE_MUX is not set # CONFIG_SND_SOC_SMA1303 is not set # CONFIG_SND_SOC_SMA1307 is not set # CONFIG_SND_SOC_SPDIF is not set # CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set # CONFIG_SND_SOC_SSM2518 is not set # CONFIG_SND_SOC_SSM2602_SPI is not set # CONFIG_SND_SOC_SSM2602_I2C is not set # CONFIG_SND_SOC_SSM3515 is not set # CONFIG_SND_SOC_SSM4567 is not set # CONFIG_SND_SOC_STA32X is not set # CONFIG_SND_SOC_STA350 is not set # CONFIG_SND_SOC_STI_SAS is not set # CONFIG_SND_SOC_TAS2552 is not set # CONFIG_SND_SOC_TAS2562 is not set # CONFIG_SND_SOC_TAS2764 is not set # CONFIG_SND_SOC_TAS2770 is not set # CONFIG_SND_SOC_TAS2780 is not set # CONFIG_SND_SOC_TAS2781_I2C is not set # CONFIG_SND_SOC_TAS5086 is not set # CONFIG_SND_SOC_TAS571X is not set # CONFIG_SND_SOC_TAS5720 is not set # CONFIG_SND_SOC_TAS5805M is not set # CONFIG_SND_SOC_TAS6424 is not set # CONFIG_SND_SOC_TDA7419 is not set # CONFIG_SND_SOC_TFA9879 is not set # CONFIG_SND_SOC_TFA989X is not set # CONFIG_SND_SOC_TLV320ADC3XXX is not set # CONFIG_SND_SOC_TLV320AIC23_I2C is not set # CONFIG_SND_SOC_TLV320AIC23_SPI is not set # CONFIG_SND_SOC_TLV320AIC31XX is not set # CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set # CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set # CONFIG_SND_SOC_TLV320AIC3X_I2C is not set # CONFIG_SND_SOC_TLV320AIC3X_SPI is not set # CONFIG_SND_SOC_TLV320ADCX140 is not set # CONFIG_SND_SOC_TS3A227E is not set # CONFIG_SND_SOC_TSCS42XX is not set # CONFIG_SND_SOC_TSCS454 is not set # CONFIG_SND_SOC_UDA1334 is not set # CONFIG_SND_SOC_UDA1342 is not set # CONFIG_SND_SOC_WCD937X_SDW is not set # CONFIG_SND_SOC_WCD938X_SDW is not set # CONFIG_SND_SOC_WCD939X_SDW is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set # CONFIG_SND_SOC_WM8524 is not set # CONFIG_SND_SOC_WM8580 is not set # CONFIG_SND_SOC_WM8711 is not set # CONFIG_SND_SOC_WM8728 is not set # CONFIG_SND_SOC_WM8731_I2C is not set # CONFIG_SND_SOC_WM8731_SPI is not set # CONFIG_SND_SOC_WM8737 is not set # CONFIG_SND_SOC_WM8741 is not set # CONFIG_SND_SOC_WM8750 is not set # CONFIG_SND_SOC_WM8753 is not set # CONFIG_SND_SOC_WM8770 is not set # CONFIG_SND_SOC_WM8776 is not set # CONFIG_SND_SOC_WM8782 is not set # CONFIG_SND_SOC_WM8804_I2C is not set # CONFIG_SND_SOC_WM8804_SPI is not set # CONFIG_SND_SOC_WM8903 is not set # CONFIG_SND_SOC_WM8904 is not set # CONFIG_SND_SOC_WM8940 is not set # CONFIG_SND_SOC_WM8960 is not set # CONFIG_SND_SOC_WM8961 is not set # CONFIG_SND_SOC_WM8962 is not set # CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_WM8978 is not set # CONFIG_SND_SOC_WM8985 is not set # CONFIG_SND_SOC_WSA881X is not set # CONFIG_SND_SOC_WSA883X is not set # CONFIG_SND_SOC_WSA884X is not set # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set # CONFIG_SND_SOC_MT6351 is not set # CONFIG_SND_SOC_MT6357 is not set # CONFIG_SND_SOC_MT6358 is not set # CONFIG_SND_SOC_MT6660 is not set # CONFIG_SND_SOC_NAU8315 is not set # CONFIG_SND_SOC_NAU8325 is not set # CONFIG_SND_SOC_NAU8540 is not set # CONFIG_SND_SOC_NAU8810 is not set # CONFIG_SND_SOC_NAU8821 is not set # CONFIG_SND_SOC_NAU8822 is not set # CONFIG_SND_SOC_NAU8824 is not set # CONFIG_SND_SOC_NTP8918 is not set # CONFIG_SND_SOC_NTP8835 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_LPASS_WSA_MACRO is not set # CONFIG_SND_SOC_LPASS_VA_MACRO is not set # CONFIG_SND_SOC_LPASS_RX_MACRO is not set # CONFIG_SND_SOC_LPASS_TX_MACRO is not set # end of CODEC drivers # # Generic drivers # # CONFIG_SND_SIMPLE_CARD is not set # CONFIG_SND_AUDIO_GRAPH_CARD is not set # CONFIG_SND_AUDIO_GRAPH_CARD2 is not set # CONFIG_SND_TEST_COMPONENT is not set # end of Generic drivers CONFIG_SND_X86=y # CONFIG_HDMI_LPE_AUDIO is not set # CONFIG_SND_VIRTIO is not set CONFIG_HID_SUPPORT=y CONFIG_HID=y CONFIG_HID_BATTERY_STRENGTH=y CONFIG_HIDRAW=y CONFIG_UHID=y CONFIG_HID_GENERIC=y # CONFIG_HID_HAPTIC is not set # # Special HID drivers # CONFIG_HID_A4TECH=y CONFIG_HID_ACCUTOUCH=y CONFIG_HID_ACRUX=y CONFIG_HID_ACRUX_FF=y CONFIG_HID_APPLE=y CONFIG_HID_APPLEIR=y # CONFIG_HID_APPLETB_BL is not set # CONFIG_HID_APPLETB_KBD is not set CONFIG_HID_ASUS=y CONFIG_HID_AUREAL=y CONFIG_HID_BELKIN=y CONFIG_HID_BETOP_FF=y CONFIG_HID_BIGBEN_FF=y CONFIG_HID_CHERRY=y CONFIG_HID_CHICONY=y CONFIG_HID_CORSAIR=y CONFIG_HID_COUGAR=y CONFIG_HID_MACALLY=y CONFIG_HID_PRODIKEYS=y CONFIG_HID_CMEDIA=y CONFIG_HID_CP2112=y CONFIG_HID_CREATIVE_SB0540=y CONFIG_HID_CYPRESS=y CONFIG_HID_DRAGONRISE=y CONFIG_DRAGONRISE_FF=y CONFIG_HID_EMS_FF=y CONFIG_HID_ELAN=y CONFIG_HID_ELECOM=y CONFIG_HID_ELO=y CONFIG_HID_EVISION=y CONFIG_HID_EZKEY=y CONFIG_HID_FT260=y CONFIG_HID_GEMBIRD=y CONFIG_HID_GFRM=y CONFIG_HID_GLORIOUS=y CONFIG_HID_HOLTEK=y CONFIG_HOLTEK_FF=y CONFIG_HID_VIVALDI_COMMON=y # CONFIG_HID_GOODIX_SPI is not set CONFIG_HID_GOOGLE_HAMMER=y CONFIG_HID_GOOGLE_STADIA_FF=y CONFIG_HID_VIVALDI=y CONFIG_HID_GT683R=y CONFIG_HID_KEYTOUCH=y CONFIG_HID_KYE=y # CONFIG_HID_KYSONA is not set CONFIG_HID_UCLOGIC=y CONFIG_HID_WALTOP=y CONFIG_HID_VIEWSONIC=y CONFIG_HID_VRC2=y CONFIG_HID_XIAOMI=y CONFIG_HID_GYRATION=y CONFIG_HID_ICADE=y CONFIG_HID_ITE=y CONFIG_HID_JABRA=y CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y CONFIG_HID_LED=y CONFIG_HID_LENOVO=y CONFIG_HID_LETSKETCH=y CONFIG_HID_LOGITECH=y CONFIG_HID_LOGITECH_DJ=y CONFIG_HID_LOGITECH_HIDPP=y CONFIG_LOGITECH_FF=y CONFIG_LOGIRUMBLEPAD2_FF=y CONFIG_LOGIG940_FF=y CONFIG_LOGIWHEELS_FF=y CONFIG_HID_MAGICMOUSE=y CONFIG_HID_MALTRON=y CONFIG_HID_MAYFLASH=y CONFIG_HID_MEGAWORLD_FF=y CONFIG_HID_REDRAGON=y CONFIG_HID_MICROSOFT=y CONFIG_HID_MONTEREY=y CONFIG_HID_MULTITOUCH=y CONFIG_HID_NINTENDO=y CONFIG_NINTENDO_FF=y CONFIG_HID_NTI=y CONFIG_HID_NTRIG=y CONFIG_HID_NVIDIA_SHIELD=y CONFIG_NVIDIA_SHIELD_FF=y CONFIG_HID_ORTEK=y CONFIG_HID_PANTHERLORD=y CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=y CONFIG_HID_PETALYNX=y CONFIG_HID_PICOLCD=y CONFIG_HID_PICOLCD_FB=y CONFIG_HID_PICOLCD_BACKLIGHT=y CONFIG_HID_PICOLCD_LCD=y CONFIG_HID_PICOLCD_LEDS=y CONFIG_HID_PICOLCD_CIR=y CONFIG_HID_PLANTRONICS=y CONFIG_HID_PLAYSTATION=y CONFIG_PLAYSTATION_FF=y CONFIG_HID_PXRC=y # CONFIG_HID_RAPOO is not set CONFIG_HID_RAZER=y CONFIG_HID_PRIMAX=y CONFIG_HID_RETRODE=y CONFIG_HID_ROCCAT=y CONFIG_HID_SAITEK=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SEMITEK=y CONFIG_HID_SIGMAMICRO=y CONFIG_HID_SONY=y CONFIG_SONY_FF=y CONFIG_HID_SPEEDLINK=y CONFIG_HID_STEAM=y CONFIG_STEAM_FF=y CONFIG_HID_STEELSERIES=y CONFIG_HID_SUNPLUS=y CONFIG_HID_RMI=y CONFIG_HID_GREENASIA=y CONFIG_GREENASIA_FF=y CONFIG_HID_SMARTJOYPLUS=y CONFIG_SMARTJOYPLUS_FF=y CONFIG_HID_TIVO=y CONFIG_HID_TOPSEED=y CONFIG_HID_TOPRE=y CONFIG_HID_THINGM=y CONFIG_HID_THRUSTMASTER=y CONFIG_THRUSTMASTER_FF=y CONFIG_HID_UDRAW_PS3=y CONFIG_HID_U2FZERO=y # CONFIG_HID_UNIVERSAL_PIDFF is not set CONFIG_HID_WACOM=y CONFIG_HID_WIIMOTE=y # CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=y CONFIG_HID_ZEROPLUS=y CONFIG_ZEROPLUS_FF=y CONFIG_HID_ZYDACRON=y CONFIG_HID_SENSOR_HUB=y CONFIG_HID_SENSOR_CUSTOM_SENSOR=y CONFIG_HID_ALPS=y CONFIG_HID_MCP2200=y CONFIG_HID_MCP2221=y # end of Special HID drivers # # HID-BPF support # # end of HID-BPF support CONFIG_I2C_HID=y CONFIG_I2C_HID_ACPI=y CONFIG_I2C_HID_OF=y # CONFIG_I2C_HID_OF_ELAN is not set # CONFIG_I2C_HID_OF_GOODIX is not set CONFIG_I2C_HID_CORE=y # # Intel ISH HID support # CONFIG_INTEL_ISH_HID=y CONFIG_INTEL_ISH_FIRMWARE_DOWNLOADER=y # end of Intel ISH HID support # # AMD SFH HID Support # CONFIG_AMD_SFH_HID=y # end of AMD SFH HID Support # # Surface System Aggregator Module HID support # CONFIG_SURFACE_HID=y CONFIG_SURFACE_KBD=y # end of Surface System Aggregator Module HID support CONFIG_SURFACE_HID_CORE=y # # Intel THC HID Support # # CONFIG_INTEL_THC_HID is not set # end of Intel THC HID Support # # USB HID support # CONFIG_USB_HID=y CONFIG_HID_PID=y CONFIG_USB_HIDDEV=y # end of USB HID support CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y CONFIG_USB_LED_TRIG=y CONFIG_USB_ULPI_BUS=y CONFIG_USB_CONN_GPIO=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y CONFIG_USB_PCI_AMD=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # # Miscellaneous USB options # CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_FEW_INIT_RETRIES is not set CONFIG_USB_DYNAMIC_MINORS=y CONFIG_USB_OTG=y # CONFIG_USB_OTG_PRODUCTLIST is not set # CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set CONFIG_USB_OTG_FSM=y CONFIG_USB_LEDS_TRIGGER_USBPORT=y CONFIG_USB_AUTOSUSPEND_DELAY=2 CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 CONFIG_USB_MON=y # # USB Host Controller Drivers # CONFIG_USB_C67X00_HCD=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DBGCAP=y CONFIG_USB_XHCI_PCI=y CONFIG_USB_XHCI_PCI_RENESAS=y CONFIG_USB_XHCI_PLATFORM=y # CONFIG_USB_XHCI_SIDEBAND is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y CONFIG_USB_EHCI_PCI=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_OXU210HP_HCD=y CONFIG_USB_ISP116X_HCD=y CONFIG_USB_MAX3421_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PCI=y # CONFIG_USB_OHCI_HCD_SSB is not set CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_UHCI_HCD=y CONFIG_USB_SL811_HCD=y CONFIG_USB_SL811_HCD_ISO=y CONFIG_USB_SL811_CS=y CONFIG_USB_R8A66597_HCD=y CONFIG_USB_HCD_BCMA=y CONFIG_USB_HCD_SSB=y # CONFIG_USB_HCD_TEST_MODE is not set # # USB Device Class drivers # CONFIG_USB_ACM=y CONFIG_USB_PRINTER=y CONFIG_USB_WDM=y CONFIG_USB_TMC=y # # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set CONFIG_USB_STORAGE_REALTEK=y CONFIG_REALTEK_AUTOPM=y CONFIG_USB_STORAGE_DATAFAB=y CONFIG_USB_STORAGE_FREECOM=y CONFIG_USB_STORAGE_ISD200=y CONFIG_USB_STORAGE_USBAT=y CONFIG_USB_STORAGE_SDDR09=y CONFIG_USB_STORAGE_SDDR55=y CONFIG_USB_STORAGE_JUMPSHOT=y CONFIG_USB_STORAGE_ALAUDA=y CONFIG_USB_STORAGE_ONETOUCH=y CONFIG_USB_STORAGE_KARMA=y CONFIG_USB_STORAGE_CYPRESS_ATACB=y CONFIG_USB_STORAGE_ENE_UB6250=y CONFIG_USB_UAS=y # # USB Imaging devices # CONFIG_USB_MDC800=y CONFIG_USB_MICROTEK=y CONFIG_USBIP_CORE=y CONFIG_USBIP_VHCI_HCD=y CONFIG_USBIP_VHCI_HC_PORTS=8 CONFIG_USBIP_VHCI_NR_HCS=16 CONFIG_USBIP_HOST=y CONFIG_USBIP_VUDC=y # CONFIG_USBIP_DEBUG is not set # # USB dual-mode controller drivers # CONFIG_USB_CDNS_SUPPORT=y CONFIG_USB_CDNS_HOST=y CONFIG_USB_CDNS3=y CONFIG_USB_CDNS3_GADGET=y CONFIG_USB_CDNS3_HOST=y CONFIG_USB_CDNS3_PCI_WRAP=y CONFIG_USB_CDNSP_PCI=y CONFIG_USB_CDNSP_GADGET=y CONFIG_USB_CDNSP_HOST=y CONFIG_USB_MUSB_HDRC=y # CONFIG_USB_MUSB_HOST is not set # CONFIG_USB_MUSB_GADGET is not set CONFIG_USB_MUSB_DUAL_ROLE=y # # Platform Glue Layer # # # MUSB DMA mode # CONFIG_MUSB_PIO_ONLY=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_ULPI=y # CONFIG_USB_DWC3_HOST is not set # CONFIG_USB_DWC3_GADGET is not set CONFIG_USB_DWC3_DUAL_ROLE=y # # Platform Glue Driver Support # CONFIG_USB_DWC3_PCI=y CONFIG_USB_DWC3_HAPS=y CONFIG_USB_DWC3_OF_SIMPLE=y # CONFIG_USB_DWC3_GENERIC_PLAT is not set # CONFIG_USB_DWC3_GOOGLE is not set CONFIG_USB_DWC2=y CONFIG_USB_DWC2_HOST=y # # Gadget/Dual-role mode requires USB Gadget support to be enabled # # CONFIG_USB_DWC2_PERIPHERAL is not set # CONFIG_USB_DWC2_DUAL_ROLE is not set CONFIG_USB_DWC2_PCI=y # CONFIG_USB_DWC2_DEBUG is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_PCI=y CONFIG_USB_CHIPIDEA_MSM=y CONFIG_USB_CHIPIDEA_NPCM=y # CONFIG_USB_CHIPIDEA_IMX is not set CONFIG_USB_CHIPIDEA_GENERIC=y # CONFIG_USB_CHIPIDEA_TEGRA is not set CONFIG_USB_ISP1760=y CONFIG_USB_ISP1760_HCD=y CONFIG_USB_ISP1761_UDC=y # CONFIG_USB_ISP1760_HOST_ROLE is not set # CONFIG_USB_ISP1760_GADGET_ROLE is not set CONFIG_USB_ISP1760_DUAL_ROLE=y # # USB port drivers # CONFIG_USB_SERIAL=y CONFIG_USB_SERIAL_CONSOLE=y CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_SERIAL_SIMPLE=y CONFIG_USB_SERIAL_AIRCABLE=y CONFIG_USB_SERIAL_ARK3116=y CONFIG_USB_SERIAL_BELKIN=y CONFIG_USB_SERIAL_CH341=y CONFIG_USB_SERIAL_WHITEHEAT=y CONFIG_USB_SERIAL_DIGI_ACCELEPORT=y CONFIG_USB_SERIAL_CP210X=y CONFIG_USB_SERIAL_CYPRESS_M8=y CONFIG_USB_SERIAL_EMPEG=y CONFIG_USB_SERIAL_FTDI_SIO=y CONFIG_USB_SERIAL_VISOR=y CONFIG_USB_SERIAL_IPAQ=y CONFIG_USB_SERIAL_IR=y CONFIG_USB_SERIAL_EDGEPORT=y CONFIG_USB_SERIAL_EDGEPORT_TI=y CONFIG_USB_SERIAL_F81232=y CONFIG_USB_SERIAL_F8153X=y CONFIG_USB_SERIAL_GARMIN=y CONFIG_USB_SERIAL_IPW=y CONFIG_USB_SERIAL_IUU=y CONFIG_USB_SERIAL_KEYSPAN_PDA=y CONFIG_USB_SERIAL_KEYSPAN=y CONFIG_USB_SERIAL_KLSI=y CONFIG_USB_SERIAL_KOBIL_SCT=y CONFIG_USB_SERIAL_MCT_U232=y CONFIG_USB_SERIAL_METRO=y CONFIG_USB_SERIAL_MOS7720=y CONFIG_USB_SERIAL_MOS7715_PARPORT=y CONFIG_USB_SERIAL_MOS7840=y CONFIG_USB_SERIAL_MXUPORT=y CONFIG_USB_SERIAL_NAVMAN=y CONFIG_USB_SERIAL_PL2303=y CONFIG_USB_SERIAL_OTI6858=y CONFIG_USB_SERIAL_QCAUX=y CONFIG_USB_SERIAL_QUALCOMM=y CONFIG_USB_SERIAL_SPCP8X5=y CONFIG_USB_SERIAL_SAFE=y # CONFIG_USB_SERIAL_SAFE_PADDED is not set CONFIG_USB_SERIAL_SIERRAWIRELESS=y CONFIG_USB_SERIAL_SYMBOL=y CONFIG_USB_SERIAL_TI=y CONFIG_USB_SERIAL_CYBERJACK=y CONFIG_USB_SERIAL_WWAN=y CONFIG_USB_SERIAL_OPTION=y CONFIG_USB_SERIAL_OMNINET=y CONFIG_USB_SERIAL_OPTICON=y CONFIG_USB_SERIAL_XSENS_MT=y CONFIG_USB_SERIAL_WISHBONE=y CONFIG_USB_SERIAL_SSU100=y CONFIG_USB_SERIAL_QT2=y CONFIG_USB_SERIAL_UPD78F0730=y CONFIG_USB_SERIAL_XR=y CONFIG_USB_SERIAL_DEBUG=y # # USB Miscellaneous drivers # CONFIG_USB_USS720=y CONFIG_USB_EMI62=y CONFIG_USB_EMI26=y CONFIG_USB_ADUTUX=y CONFIG_USB_SEVSEG=y CONFIG_USB_LEGOTOWER=y CONFIG_USB_LCD=y CONFIG_USB_CYPRESS_CY7C63=y CONFIG_USB_CYTHERM=y CONFIG_USB_IDMOUSE=y CONFIG_USB_APPLEDISPLAY=y CONFIG_APPLE_MFI_FASTCHARGE=y CONFIG_USB_LJCA=y # CONFIG_USB_USBIO is not set CONFIG_USB_SISUSBVGA=y CONFIG_USB_LD=y CONFIG_USB_TRANCEVIBRATOR=y CONFIG_USB_IOWARRIOR=y CONFIG_USB_TEST=y CONFIG_USB_EHSET_TEST_FIXTURE=y CONFIG_USB_ISIGHTFW=y CONFIG_USB_YUREX=y CONFIG_USB_EZUSB_FX2=y CONFIG_USB_HUB_USB251XB=y CONFIG_USB_HSIC_USB3503=y CONFIG_USB_HSIC_USB4604=y CONFIG_USB_LINK_LAYER_TEST=y CONFIG_USB_CHAOSKEY=y # CONFIG_USB_ONBOARD_DEV is not set CONFIG_USB_ATM=y CONFIG_USB_SPEEDTOUCH=y CONFIG_USB_CXACRU=y CONFIG_USB_UEAGLEATM=y CONFIG_USB_XUSBATM=y # # USB Physical Layer drivers # CONFIG_USB_PHY=y CONFIG_NOP_USB_XCEIV=y CONFIG_TAHVO_USB=y CONFIG_TAHVO_USB_HOST_BY_DEFAULT=y CONFIG_USB_ISP1301=y # end of USB Physical Layer drivers CONFIG_USB_GADGET=y # CONFIG_USB_GADGET_DEBUG is not set CONFIG_USB_GADGET_DEBUG_FILES=y CONFIG_USB_GADGET_DEBUG_FS=y CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 CONFIG_U_SERIAL_CONSOLE=y # # USB Peripheral Controller # CONFIG_USB_GR_UDC=y CONFIG_USB_R8A66597=y CONFIG_USB_PXA27X=y CONFIG_USB_SNP_CORE=y # CONFIG_USB_SNP_UDC_PLAT is not set # CONFIG_USB_M66592 is not set CONFIG_USB_BDC_UDC=y CONFIG_USB_AMD5536UDC=y CONFIG_USB_NET2280=y CONFIG_USB_GOKU=y CONFIG_USB_EG20T=y # CONFIG_USB_GADGET_XILINX is not set CONFIG_USB_MAX3420_UDC=y CONFIG_USB_CDNS2_UDC=y # CONFIG_USB_DUMMY_HCD is not set # end of USB Peripheral Controller CONFIG_USB_LIBCOMPOSITE=y CONFIG_USB_F_ACM=y CONFIG_USB_F_SS_LB=y CONFIG_USB_U_SERIAL=y CONFIG_USB_U_ETHER=y CONFIG_USB_U_AUDIO=y CONFIG_USB_F_SERIAL=y CONFIG_USB_F_OBEX=y CONFIG_USB_F_NCM=y CONFIG_USB_F_ECM=y CONFIG_USB_F_PHONET=y CONFIG_USB_F_EEM=y CONFIG_USB_F_SUBSET=y CONFIG_USB_F_RNDIS=y CONFIG_USB_F_MASS_STORAGE=y CONFIG_USB_F_FS=y CONFIG_USB_F_UAC1=y CONFIG_USB_F_UAC1_LEGACY=y CONFIG_USB_F_UAC2=y CONFIG_USB_F_UVC=y CONFIG_USB_F_MIDI=y CONFIG_USB_F_MIDI2=y CONFIG_USB_F_HID=y CONFIG_USB_F_PRINTER=y CONFIG_USB_F_TCM=y CONFIG_USB_CONFIGFS=y CONFIG_USB_CONFIGFS_SERIAL=y CONFIG_USB_CONFIGFS_ACM=y CONFIG_USB_CONFIGFS_OBEX=y CONFIG_USB_CONFIGFS_NCM=y CONFIG_USB_CONFIGFS_ECM=y CONFIG_USB_CONFIGFS_ECM_SUBSET=y CONFIG_USB_CONFIGFS_RNDIS=y CONFIG_USB_CONFIGFS_EEM=y CONFIG_USB_CONFIGFS_PHONET=y CONFIG_USB_CONFIGFS_MASS_STORAGE=y CONFIG_USB_CONFIGFS_F_LB_SS=y CONFIG_USB_CONFIGFS_F_FS=y CONFIG_USB_CONFIGFS_F_UAC1=y CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y CONFIG_USB_CONFIGFS_F_UAC2=y CONFIG_USB_CONFIGFS_F_MIDI=y CONFIG_USB_CONFIGFS_F_MIDI2=y CONFIG_USB_CONFIGFS_F_HID=y CONFIG_USB_CONFIGFS_F_UVC=y CONFIG_USB_CONFIGFS_F_PRINTER=y CONFIG_USB_CONFIGFS_F_TCM=y # # USB Gadget precomposed configurations # # CONFIG_USB_ZERO is not set # CONFIG_USB_AUDIO is not set # CONFIG_USB_ETH is not set # CONFIG_USB_G_NCM is not set CONFIG_USB_GADGETFS=y # CONFIG_USB_FUNCTIONFS is not set # CONFIG_USB_MASS_STORAGE is not set # CONFIG_USB_GADGET_TARGET is not set # CONFIG_USB_G_SERIAL is not set # CONFIG_USB_MIDI_GADGET is not set # CONFIG_USB_G_PRINTER is not set # CONFIG_USB_CDC_COMPOSITE is not set # CONFIG_USB_G_NOKIA is not set # CONFIG_USB_G_ACM_MS is not set # CONFIG_USB_G_MULTI is not set # CONFIG_USB_G_HID is not set # CONFIG_USB_G_DBGP is not set # CONFIG_USB_G_WEBCAM is not set CONFIG_USB_RAW_GADGET=y # end of USB Gadget precomposed configurations CONFIG_TYPEC=y CONFIG_TYPEC_TCPM=y CONFIG_TYPEC_TCPCI=y CONFIG_TYPEC_RT1711H=y CONFIG_TYPEC_MT6360=y CONFIG_TYPEC_TCPCI_MT6370=y CONFIG_TYPEC_TCPCI_MAXIM=y CONFIG_TYPEC_FUSB302=y CONFIG_TYPEC_WCOVE=y CONFIG_TYPEC_UCSI=y CONFIG_UCSI_CCG=y CONFIG_UCSI_ACPI=y CONFIG_UCSI_STM32G0=y # CONFIG_CROS_EC_UCSI is not set CONFIG_TYPEC_TPS6598X=y CONFIG_TYPEC_ANX7411=y CONFIG_TYPEC_RT1719=y CONFIG_TYPEC_HD3SS3220=y CONFIG_TYPEC_STUSB160X=y CONFIG_TYPEC_WUSB3801=y # # USB Type-C Multiplexer/DeMultiplexer Switch support # CONFIG_TYPEC_MUX_FSA4480=y CONFIG_TYPEC_MUX_GPIO_SBU=y CONFIG_TYPEC_MUX_PI3USB30532=y CONFIG_TYPEC_MUX_INTEL_PMC=y # CONFIG_TYPEC_MUX_IT5205 is not set CONFIG_TYPEC_MUX_NB7VPQ904M=y # CONFIG_TYPEC_MUX_PS883X is not set CONFIG_TYPEC_MUX_PTN36502=y # CONFIG_TYPEC_MUX_TUSB1046 is not set CONFIG_TYPEC_MUX_WCD939X_USBSS=y # end of USB Type-C Multiplexer/DeMultiplexer Switch support # # USB Type-C Alternate Mode drivers # CONFIG_TYPEC_DP_ALTMODE=y CONFIG_TYPEC_NVIDIA_ALTMODE=y # CONFIG_TYPEC_TBT_ALTMODE is not set # end of USB Type-C Alternate Mode drivers CONFIG_USB_ROLE_SWITCH=y CONFIG_USB_ROLES_INTEL_XHCI=y CONFIG_MMC=y # CONFIG_PWRSEQ_EMMC is not set # CONFIG_PWRSEQ_SD8787 is not set # CONFIG_PWRSEQ_SIMPLE is not set # CONFIG_MMC_BLOCK is not set # CONFIG_SDIO_UART is not set # CONFIG_MMC_TEST is not set # # MMC/SD/SDIO Host Controller Drivers # # CONFIG_MMC_DEBUG is not set # CONFIG_MMC_SDHCI is not set # CONFIG_MMC_WBSD is not set # CONFIG_MMC_TIFM_SD is not set # CONFIG_MMC_SPI is not set # CONFIG_MMC_SDRICOH_CS is not set # CONFIG_MMC_CB710 is not set # CONFIG_MMC_VIA_SDMMC is not set CONFIG_MMC_VUB300=y CONFIG_MMC_USHC=y # CONFIG_MMC_USDHI6ROL0 is not set CONFIG_MMC_REALTEK_USB=y # CONFIG_MMC_CQHCI is not set # CONFIG_MMC_HSQ is not set # CONFIG_MMC_TOSHIBA_PCI is not set # CONFIG_MMC_MTK is not set # CONFIG_SCSI_UFSHCD is not set CONFIG_MEMSTICK=y # CONFIG_MEMSTICK_DEBUG is not set # # MemoryStick drivers # # CONFIG_MEMSTICK_UNSAFE_RESUME is not set # CONFIG_MSPRO_BLOCK is not set # CONFIG_MS_BLOCK is not set # # MemoryStick Host Controller Drivers # # CONFIG_MEMSTICK_TIFM_MS is not set # CONFIG_MEMSTICK_JMICRON_38X is not set # CONFIG_MEMSTICK_R592 is not set CONFIG_MEMSTICK_REALTEK_USB=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y # CONFIG_LEDS_CLASS_FLASH is not set CONFIG_LEDS_CLASS_MULTICOLOR=y # CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set # # LED drivers # # CONFIG_LEDS_AN30259A is not set # CONFIG_LEDS_APU is not set # CONFIG_LEDS_OSRAM_AMS_AS3668 is not set # CONFIG_LEDS_AW200XX is not set # CONFIG_LEDS_AW2013 is not set # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CHT_WCOVE is not set # CONFIG_LEDS_CR0014114 is not set # CONFIG_LEDS_CROS_EC is not set # CONFIG_LEDS_EL15203000 is not set # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_LM3532 is not set # CONFIG_LEDS_LM3642 is not set # CONFIG_LEDS_LM3692X is not set # CONFIG_LEDS_PCA9532 is not set # CONFIG_LEDS_GPIO is not set # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP3952 is not set # CONFIG_LEDS_LP50XX is not set # CONFIG_LEDS_LP55XX_COMMON is not set # CONFIG_LEDS_LP8860 is not set # CONFIG_LEDS_LP8864 is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set # CONFIG_LEDS_PCA995X is not set # CONFIG_LEDS_DAC124S085 is not set # CONFIG_LEDS_REGULATOR is not set # CONFIG_LEDS_BD2606MVV is not set # CONFIG_LEDS_BD2802 is not set # CONFIG_LEDS_INTEL_SS4200 is not set # CONFIG_LEDS_LT3593 is not set # CONFIG_LEDS_TCA6507 is not set # CONFIG_LEDS_TLC591XX is not set # CONFIG_LEDS_LM355x is not set # CONFIG_LEDS_IS31FL319X is not set # CONFIG_LEDS_IS31FL32XX is not set # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) # # CONFIG_LEDS_BLINKM is not set # CONFIG_LEDS_SYSCON is not set # CONFIG_LEDS_MLXCPLD is not set # CONFIG_LEDS_MLXREG is not set # CONFIG_LEDS_USER is not set # CONFIG_LEDS_NIC78BX is not set # CONFIG_LEDS_SPI_BYTE is not set # CONFIG_LEDS_LM3697 is not set # CONFIG_LEDS_ST1202 is not set # CONFIG_LEDS_LGM is not set # # Flash and Torch LED drivers # # # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set # CONFIG_LEDS_KTD202X is not set # CONFIG_LEDS_LP5812 is not set # CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_MT6370_RGB is not set # # LED Triggers # CONFIG_LEDS_TRIGGERS=y # CONFIG_LEDS_TRIGGER_TIMER is not set # CONFIG_LEDS_TRIGGER_ONESHOT is not set # CONFIG_LEDS_TRIGGER_DISK is not set # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set # CONFIG_LEDS_TRIGGER_CPU is not set # CONFIG_LEDS_TRIGGER_ACTIVITY is not set # CONFIG_LEDS_TRIGGER_GPIO is not set # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set # # iptables trigger is under Netfilter config (LED target) # # CONFIG_LEDS_TRIGGER_TRANSIENT is not set # CONFIG_LEDS_TRIGGER_CAMERA is not set # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set # CONFIG_LEDS_TRIGGER_TTY is not set # CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # # Simatic LED drivers # # CONFIG_ACCESSIBILITY is not set CONFIG_INFINIBAND=y CONFIG_INFINIBAND_USER_MAD=y CONFIG_INFINIBAND_USER_ACCESS=y CONFIG_INFINIBAND_USER_MEM=y CONFIG_INFINIBAND_ON_DEMAND_PAGING=y CONFIG_INFINIBAND_ADDR_TRANS=y CONFIG_INFINIBAND_ADDR_TRANS_CONFIGFS=y CONFIG_INFINIBAND_VIRT_DMA=y # CONFIG_INFINIBAND_EFA is not set # CONFIG_INFINIBAND_ERDMA is not set CONFIG_MLX4_INFINIBAND=y # CONFIG_INFINIBAND_MTHCA is not set # CONFIG_INFINIBAND_OCRDMA is not set # CONFIG_INFINIBAND_USNIC is not set # CONFIG_INFINIBAND_VMWARE_PVRDMA is not set # CONFIG_INFINIBAND_RDMAVT is not set CONFIG_RDMA_RXE=y CONFIG_RDMA_SIW=y CONFIG_INFINIBAND_IPOIB=y CONFIG_INFINIBAND_IPOIB_CM=y CONFIG_INFINIBAND_IPOIB_DEBUG=y # CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set CONFIG_INFINIBAND_SRP=y # CONFIG_INFINIBAND_SRPT is not set CONFIG_INFINIBAND_ISER=y CONFIG_INFINIBAND_RTRS=y CONFIG_INFINIBAND_RTRS_CLIENT=y # CONFIG_INFINIBAND_RTRS_SERVER is not set # CONFIG_INFINIBAND_OPA_VNIC is not set CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_EDAC=y # CONFIG_EDAC_DEBUG is not set # CONFIG_EDAC_DECODE_MCE is not set # CONFIG_EDAC_SCRUB is not set # CONFIG_EDAC_ECS is not set # CONFIG_EDAC_MEM_REPAIR is not set # CONFIG_EDAC_E752X is not set # CONFIG_EDAC_I82975X is not set # CONFIG_EDAC_I3000 is not set # CONFIG_EDAC_I3200 is not set # CONFIG_EDAC_IE31200 is not set # CONFIG_EDAC_X38 is not set # CONFIG_EDAC_I5400 is not set # CONFIG_EDAC_I7CORE is not set # CONFIG_EDAC_I5100 is not set # CONFIG_EDAC_I7300 is not set # CONFIG_EDAC_SBRIDGE is not set # CONFIG_EDAC_SKX is not set # CONFIG_EDAC_I10NM is not set # CONFIG_EDAC_IMH is not set # CONFIG_EDAC_PND2 is not set # CONFIG_EDAC_IGEN6 is not set CONFIG_RTC_LIB=y CONFIG_RTC_MC146818_LIB=y CONFIG_RTC_CLASS=y # CONFIG_RTC_HCTOSYS is not set CONFIG_RTC_SYSTOHC=y CONFIG_RTC_SYSTOHC_DEVICE="rtc0" # CONFIG_RTC_DEBUG is not set CONFIG_RTC_NVMEM=y # # RTC interfaces # CONFIG_RTC_INTF_SYSFS=y CONFIG_RTC_INTF_PROC=y CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set # CONFIG_RTC_DRV_TEST is not set # # I2C RTC drivers # # CONFIG_RTC_DRV_ABB5ZES3 is not set # CONFIG_RTC_DRV_ABEOZ9 is not set # CONFIG_RTC_DRV_ABX80X is not set # CONFIG_RTC_DRV_DS1307 is not set # CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_HYM8563 is not set # CONFIG_RTC_DRV_MAX6900 is not set # CONFIG_RTC_DRV_MAX31335 is not set # CONFIG_RTC_DRV_NCT3018Y is not set # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_ISL12022 is not set # CONFIG_RTC_DRV_ISL12026 is not set # CONFIG_RTC_DRV_X1205 is not set # CONFIG_RTC_DRV_PCF8523 is not set # CONFIG_RTC_DRV_PCF85363 is not set # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set # CONFIG_RTC_DRV_BQ32K is not set # CONFIG_RTC_DRV_TWL4030 is not set # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set # CONFIG_RTC_DRV_RX8111 is not set # CONFIG_RTC_DRV_RX8581 is not set # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set # CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # # SPI RTC drivers # # CONFIG_RTC_DRV_M41T93 is not set # CONFIG_RTC_DRV_M41T94 is not set # CONFIG_RTC_DRV_DS1302 is not set # CONFIG_RTC_DRV_DS1305 is not set # CONFIG_RTC_DRV_DS1343 is not set # CONFIG_RTC_DRV_DS1347 is not set # CONFIG_RTC_DRV_DS1390 is not set # CONFIG_RTC_DRV_MAX6916 is not set # CONFIG_RTC_DRV_R9701 is not set # CONFIG_RTC_DRV_RX4581 is not set # CONFIG_RTC_DRV_RS5C348 is not set # CONFIG_RTC_DRV_MAX6902 is not set # CONFIG_RTC_DRV_PCF2123 is not set # CONFIG_RTC_DRV_MCP795 is not set CONFIG_RTC_I2C_AND_SPI=y # # SPI and I2C RTC drivers # # CONFIG_RTC_DRV_DS3232 is not set # CONFIG_RTC_DRV_PCF2127 is not set # CONFIG_RTC_DRV_PCF85063 is not set # CONFIG_RTC_DRV_RV3029C2 is not set # CONFIG_RTC_DRV_RX6110 is not set # # Platform RTC drivers # CONFIG_RTC_DRV_CMOS=y # CONFIG_RTC_DRV_DS1286 is not set # CONFIG_RTC_DRV_DS1511 is not set # CONFIG_RTC_DRV_DS1553 is not set # CONFIG_RTC_DRV_DS1685_FAMILY is not set # CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_DS2404 is not set # CONFIG_RTC_DRV_STK17TA8 is not set # CONFIG_RTC_DRV_M48T86 is not set # CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set # CONFIG_RTC_DRV_MSM6242 is not set # CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_ZYNQMP is not set # CONFIG_RTC_DRV_CROS_EC is not set # # on-CPU RTC drivers # # CONFIG_RTC_DRV_CADENCE is not set # CONFIG_RTC_DRV_FTRTC010 is not set # CONFIG_RTC_DRV_R7301 is not set # CONFIG_RTC_DRV_GOLDFISH is not set # # HID Sensor RTC drivers # CONFIG_RTC_DRV_HID_SENSOR_TIME=y CONFIG_DMADEVICES=y # CONFIG_DMADEVICES_DEBUG is not set # # DMA Devices # CONFIG_DMA_ENGINE=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DMA_ACPI=y CONFIG_DMA_OF=y # CONFIG_ALTERA_MSGDMA is not set # CONFIG_DW_AXI_DMAC is not set # CONFIG_FSL_EDMA is not set # CONFIG_INTEL_IDMA64 is not set # CONFIG_INTEL_IDXD is not set # CONFIG_INTEL_IDXD_COMPAT is not set # CONFIG_INTEL_IOATDMA is not set # CONFIG_PLX_DMA is not set # CONFIG_XILINX_DMA is not set # CONFIG_XILINX_XDMA is not set # CONFIG_XILINX_ZYNQMP_DPDMA is not set # CONFIG_AMD_PTDMA is not set # CONFIG_AMD_QDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set CONFIG_DW_DMAC_CORE=y # CONFIG_DW_DMAC is not set # CONFIG_DW_DMAC_PCI is not set # CONFIG_DW_EDMA is not set CONFIG_HSU_DMA=y # CONFIG_SF_PDMA is not set # CONFIG_INTEL_LDMA is not set # # DMA Clients # # CONFIG_ASYNC_TX_DMA is not set # CONFIG_DMATEST is not set # # DMABUF options # CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set # CONFIG_UDMABUF is not set # CONFIG_DMABUF_MOVE_NOTIFY is not set # CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_HEAPS is not set # end of DMABUF options # CONFIG_UIO is not set # CONFIG_VFIO is not set # CONFIG_VIRT_DRIVERS is not set CONFIG_TSM=y CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y CONFIG_VIRTIO_PCI_LIB=y CONFIG_VIRTIO_PCI_LIB_LEGACY=y CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_PCI_ADMIN_LEGACY=y CONFIG_VIRTIO_PCI_LEGACY=y # CONFIG_VIRTIO_BALLOON is not set CONFIG_VIRTIO_INPUT=y # CONFIG_VIRTIO_MMIO is not set CONFIG_VIRTIO_DMA_SHARED_BUFFER=y # CONFIG_VIRTIO_DEBUG is not set # CONFIG_VIRTIO_RTC is not set # CONFIG_VDPA is not set CONFIG_VHOST_IOTLB=y CONFIG_VHOST_RING=y CONFIG_VHOST_MENU=y # CONFIG_VHOST_NET is not set # CONFIG_VHOST_SCSI is not set # CONFIG_VHOST_VSOCK is not set # CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set CONFIG_VHOST_ENABLE_FORK_OWNER_CONTROL=y # # Microsoft Hyper-V guest support # # CONFIG_HYPERV is not set # end of Microsoft Hyper-V guest support CONFIG_GREYBUS=y # CONFIG_GREYBUS_BEAGLEPLAY is not set CONFIG_GREYBUS_ES2=y CONFIG_COMEDI=y # CONFIG_COMEDI_DEBUG is not set CONFIG_COMEDI_DEFAULT_BUF_SIZE_KB=2048 CONFIG_COMEDI_DEFAULT_BUF_MAXSIZE_KB=20480 # CONFIG_COMEDI_MISC_DRIVERS is not set # CONFIG_COMEDI_PCI_DRIVERS is not set # CONFIG_COMEDI_PCMCIA_DRIVERS is not set CONFIG_COMEDI_USB_DRIVERS=y CONFIG_COMEDI_DT9812=y CONFIG_COMEDI_NI_USB6501=y CONFIG_COMEDI_USBDUX=y CONFIG_COMEDI_USBDUXFAST=y CONFIG_COMEDI_USBDUXSIGMA=y CONFIG_COMEDI_VMK80XX=y # CONFIG_COMEDI_8255_SA is not set # CONFIG_COMEDI_KCOMEDILIB is not set # CONFIG_COMEDI_TESTS is not set # CONFIG_GPIB is not set CONFIG_STAGING=y # CONFIG_RTL8723BS is not set # # IIO staging drivers # # # Accelerometers # # CONFIG_ADIS16203 is not set # end of Accelerometers # # Analog to digital converters # # CONFIG_AD7816 is not set # end of Analog to digital converters # # Analog digital bi-direction converters # # CONFIG_ADT7316 is not set # end of Analog digital bi-direction converters # # Direct Digital Synthesis # # CONFIG_AD9832 is not set # CONFIG_AD9834 is not set # end of Direct Digital Synthesis # # Network Analyzer, Impedance Converters # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters # end of IIO staging drivers # CONFIG_FB_SM750 is not set # CONFIG_STAGING_MEDIA is not set # CONFIG_FB_TFT is not set # CONFIG_MOST_COMPONENTS is not set # CONFIG_GREYBUS_AUDIO is not set # CONFIG_GREYBUS_BOOTROM is not set # CONFIG_GREYBUS_FIRMWARE is not set CONFIG_GREYBUS_HID=y # CONFIG_GREYBUS_LOG is not set # CONFIG_GREYBUS_LOOPBACK is not set # CONFIG_GREYBUS_POWER is not set # CONFIG_GREYBUS_RAW is not set # CONFIG_GREYBUS_VIBRATOR is not set CONFIG_GREYBUS_BRIDGED_PHY=y # CONFIG_GREYBUS_GPIO is not set # CONFIG_GREYBUS_I2C is not set # CONFIG_GREYBUS_SDIO is not set # CONFIG_GREYBUS_SPI is not set # CONFIG_GREYBUS_UART is not set CONFIG_GREYBUS_USB=y # CONFIG_XIL_AXIS_FIFO is not set # CONFIG_VME_BUS is not set # CONFIG_GOLDFISH is not set CONFIG_CHROME_PLATFORMS=y # CONFIG_CHROMEOS_ACPI is not set # CONFIG_CHROMEOS_LAPTOP is not set # CONFIG_CHROMEOS_PSTORE is not set # CONFIG_CHROMEOS_TBMC is not set # CONFIG_CHROMEOS_OF_HW_PROBER is not set CONFIG_CROS_EC=y # CONFIG_CROS_EC_I2C is not set CONFIG_CROS_EC_ISHTP=y # CONFIG_CROS_EC_SPI is not set # CONFIG_CROS_EC_UART is not set # CONFIG_CROS_EC_LPC is not set CONFIG_CROS_EC_PROTO=y # CONFIG_CROS_KBD_LED_BACKLIGHT is not set # CONFIG_CROS_EC_CHARDEV is not set # CONFIG_CROS_EC_LIGHTBAR is not set # CONFIG_CROS_EC_VBC is not set # CONFIG_CROS_EC_DEBUGFS is not set # CONFIG_CROS_EC_SENSORHUB is not set # CONFIG_CROS_EC_SYSFS is not set CONFIG_CROS_EC_TYPEC_ALTMODES=y CONFIG_CROS_EC_TYPEC=y CONFIG_CROS_HPS_I2C=y CONFIG_CROS_USBPD_NOTIFY=y # CONFIG_CHROMEOS_PRIVACY_SCREEN is not set CONFIG_CROS_TYPEC_SWITCH=y # CONFIG_MELLANOX_PLATFORM is not set CONFIG_SURFACE_PLATFORMS=y # CONFIG_SURFACE3_WMI is not set # CONFIG_SURFACE_3_POWER_OPREGION is not set # CONFIG_SURFACE_ACPI_NOTIFY is not set # CONFIG_SURFACE_AGGREGATOR_CDEV is not set # CONFIG_SURFACE_AGGREGATOR_HUB is not set CONFIG_SURFACE_AGGREGATOR_REGISTRY=y # CONFIG_SURFACE_AGGREGATOR_TABLET_SWITCH is not set # CONFIG_SURFACE_DTX is not set # CONFIG_SURFACE_GPE is not set # CONFIG_SURFACE_HOTPLUG is not set # CONFIG_SURFACE_PLATFORM_PROFILE is not set # CONFIG_SURFACE_PRO3_BUTTON is not set CONFIG_SURFACE_AGGREGATOR=y CONFIG_SURFACE_AGGREGATOR_BUS=y CONFIG_X86_PLATFORM_DEVICES=y CONFIG_WMI_BMOF=y # CONFIG_HUAWEI_WMI is not set # CONFIG_X86_PLATFORM_DRIVERS_UNIWILL is not set # CONFIG_MXM_WMI is not set # CONFIG_NVIDIA_WMI_EC_BACKLIGHT is not set # CONFIG_XIAOMI_WMI is not set # CONFIG_REDMI_WMI is not set # CONFIG_GIGABYTE_WMI is not set # CONFIG_ACERHDF is not set # CONFIG_ACER_WIRELESS is not set # CONFIG_ACER_WMI is not set # # AMD HSMP Driver # # CONFIG_AMD_HSMP_ACPI is not set # CONFIG_AMD_HSMP_PLAT is not set # end of AMD HSMP Driver CONFIG_AMD_PMF=y CONFIG_AMD_PMF_DEBUG=y # CONFIG_AMD_PMC is not set # CONFIG_AMD_HFI is not set # CONFIG_AMD_3D_VCACHE is not set # CONFIG_AMD_WBRF is not set # CONFIG_AMD_ISP_PLATFORM is not set # CONFIG_ADV_SWBUTTON is not set # CONFIG_APPLE_GMUX is not set # CONFIG_ASUS_LAPTOP is not set # CONFIG_ASUS_WIRELESS is not set # CONFIG_ASUS_ARMOURY is not set CONFIG_ASUS_WMI=y # CONFIG_ASUS_WMI_DEPRECATED_ATTRS is not set # CONFIG_ASUS_NB_WMI is not set CONFIG_ASUS_TF103C_DOCK=y # CONFIG_AYANEO_EC is not set CONFIG_EEEPC_LAPTOP=y # CONFIG_EEEPC_WMI is not set # CONFIG_X86_PLATFORM_DRIVERS_DELL is not set # CONFIG_AMILO_RFKILL is not set # CONFIG_FUJITSU_LAPTOP is not set # CONFIG_FUJITSU_TABLET is not set # CONFIG_GPD_POCKET_FAN is not set # CONFIG_X86_PLATFORM_DRIVERS_HP is not set # CONFIG_WIRELESS_HOTKEY is not set # CONFIG_IBM_RTL is not set # CONFIG_SENSORS_HDAPS is not set # CONFIG_INTEL_ATOMISP2_PM is not set # CONFIG_INTEL_IFS is not set # CONFIG_INTEL_SAR_INT1092 is not set # CONFIG_INTEL_SKL_INT3472 is not set # # Intel Speed Select Technology interface support # # CONFIG_INTEL_SPEED_SELECT_INTERFACE is not set # end of Intel Speed Select Technology interface support # CONFIG_INTEL_WMI_SBL_FW_UPDATE is not set # CONFIG_INTEL_WMI_THUNDERBOLT is not set # # Intel Uncore Frequency Control # # CONFIG_INTEL_UNCORE_FREQ_CONTROL is not set # end of Intel Uncore Frequency Control # CONFIG_INTEL_HID_EVENT is not set # CONFIG_INTEL_VBTN is not set # CONFIG_INTEL_EHL_PSE_IO is not set # CONFIG_INTEL_INT0002_VGPIO is not set # CONFIG_INTEL_OAKTRAIL is not set # CONFIG_INTEL_BXTWC_PMIC_TMU is not set CONFIG_INTEL_CHTWC_INT33FE=y CONFIG_INTEL_ISHTP_ECLITE=y # CONFIG_INTEL_PUNIT_IPC is not set # CONFIG_INTEL_RST is not set # CONFIG_INTEL_SMARTCONNECT is not set # CONFIG_INTEL_TURBO_MAX_3 is not set # CONFIG_INTEL_VSEC is not set # CONFIG_IDEAPAD_LAPTOP is not set # CONFIG_LENOVO_WMI_HOTKEY_UTILITIES is not set # CONFIG_LENOVO_WMI_CAMERA is not set # CONFIG_THINKPAD_ACPI is not set # CONFIG_THINKPAD_LMI is not set # CONFIG_YOGABOOK is not set # CONFIG_YT2_1380 is not set # CONFIG_LENOVO_WMI_GAMEZONE is not set # CONFIG_LENOVO_WMI_TUNING is not set # CONFIG_ACPI_QUICKSTART is not set # CONFIG_MEEGOPAD_ANX7428 is not set # CONFIG_MSI_EC is not set # CONFIG_MSI_LAPTOP is not set # CONFIG_MSI_WMI is not set # CONFIG_MSI_WMI_PLATFORM is not set # CONFIG_PCENGINES_APU2 is not set # CONFIG_PORTWELL_EC is not set # CONFIG_BARCO_P50_GPIO is not set # CONFIG_SAMSUNG_GALAXYBOOK is not set # CONFIG_SAMSUNG_LAPTOP is not set # CONFIG_SAMSUNG_Q10 is not set # CONFIG_ACPI_TOSHIBA is not set # CONFIG_TOSHIBA_BT_RFKILL is not set # CONFIG_TOSHIBA_HAPS is not set # CONFIG_TOSHIBA_WMI is not set # CONFIG_ACPI_CMPC is not set # CONFIG_COMPAL_LAPTOP is not set # CONFIG_LG_LAPTOP is not set # CONFIG_PANASONIC_LAPTOP is not set # CONFIG_SONY_LAPTOP is not set # CONFIG_SYSTEM76_ACPI is not set # CONFIG_TOPSTAR_LAPTOP is not set # CONFIG_SERIAL_MULTI_INSTANTIATE is not set # CONFIG_INSPUR_PLATFORM_PROFILE is not set # CONFIG_DASHARO_ACPI is not set # CONFIG_INTEL_IPS is not set CONFIG_INTEL_SCU_IPC=y # CONFIG_INTEL_SCU_PCI is not set # CONFIG_INTEL_SCU_PLATFORM is not set # CONFIG_SIEMENS_SIMATIC_IPC is not set # CONFIG_SILICOM_PLATFORM is not set # CONFIG_WINMATE_FM07_KEYS is not set # CONFIG_OXP_EC is not set # CONFIG_TUXEDO_NB04_WMI_AB is not set CONFIG_P2SB=y CONFIG_ACPI_WMI=y # CONFIG_ACPI_WMI_LEGACY_DEVICE_NAMES is not set CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y # CONFIG_LMK04832 is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_SI514 is not set # CONFIG_COMMON_CLK_SI544 is not set # CONFIG_COMMON_CLK_SI570 is not set # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CDCE925 is not set # CONFIG_COMMON_CLK_CS2000_CP is not set # CONFIG_CLK_TWL is not set # CONFIG_COMMON_CLK_AXI_CLKGEN is not set # CONFIG_COMMON_CLK_RS9_PCIE is not set # CONFIG_COMMON_CLK_SI521XX is not set # CONFIG_COMMON_CLK_VC3 is not set # CONFIG_COMMON_CLK_VC5 is not set # CONFIG_COMMON_CLK_VC7 is not set # CONFIG_COMMON_CLK_FIXED_MMIO is not set # CONFIG_CLK_LGM_CGU is not set # CONFIG_XILINX_VCU is not set # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set # CONFIG_HWSPINLOCK is not set # # Clock Source drivers # CONFIG_CLKEVT_I8253=y CONFIG_I8253_LOCK=y CONFIG_CLKBLD_I8253=y # end of Clock Source drivers CONFIG_MAILBOX=y # CONFIG_PLATFORM_MHU is not set CONFIG_PCC=y # CONFIG_ALTERA_MBOX is not set # CONFIG_MAILBOX_TEST is not set CONFIG_IOMMU_IOVA=y CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set # CONFIG_IOMMU_DEFAULT_DMA_STRICT is not set CONFIG_IOMMU_DEFAULT_DMA_LAZY=y # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y CONFIG_IOMMU_SVA=y CONFIG_IOMMU_IOPF=y CONFIG_AMD_IOMMU=y CONFIG_DMAR_TABLE=y CONFIG_INTEL_IOMMU=y # CONFIG_INTEL_IOMMU_SVM is not set # CONFIG_INTEL_IOMMU_DEFAULT_ON is not set CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON=y CONFIG_INTEL_IOMMU_PERF_EVENTS=y # CONFIG_IOMMUFD is not set # CONFIG_IRQ_REMAP is not set # CONFIG_VIRTIO_IOMMU is not set CONFIG_GENERIC_PT=y # CONFIG_DEBUG_GENERIC_PT is not set CONFIG_IOMMU_PT=y CONFIG_IOMMU_PT_AMDV1=y CONFIG_IOMMU_PT_VTDSS=y CONFIG_IOMMU_PT_X86_64=y # # Remoteproc drivers # # CONFIG_REMOTEPROC is not set # end of Remoteproc drivers # # Rpmsg drivers # # CONFIG_RPMSG_QCOM_GLINK_RPM is not set # CONFIG_RPMSG_VIRTIO is not set # end of Rpmsg drivers CONFIG_SOUNDWIRE=y # # SoundWire Devices # # CONFIG_SOUNDWIRE_AMD is not set # CONFIG_SOUNDWIRE_INTEL is not set # CONFIG_SOUNDWIRE_QCOM is not set # # SOC (System On Chip) specific Drivers # # # Amlogic SoC drivers # # end of Amlogic SoC drivers # # Broadcom SoC drivers # # end of Broadcom SoC drivers # # NXP/Freescale QorIQ SoC drivers # # end of NXP/Freescale QorIQ SoC drivers # # fujitsu SoC drivers # # end of fujitsu SoC drivers # # i.MX SoC drivers # # end of i.MX SoC drivers # # Enable LiteX SoC Builder specific drivers # # CONFIG_LITEX_SOC_CONTROLLER is not set # end of Enable LiteX SoC Builder specific drivers # CONFIG_WPCM450_SOC is not set # # Qualcomm SoC drivers # # end of Qualcomm SoC drivers # CONFIG_SOC_TI is not set # # Xilinx SoC drivers # # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers # # PM Domains # # # Amlogic PM Domains # # end of Amlogic PM Domains # # Broadcom PM Domains # # end of Broadcom PM Domains # # i.MX PM Domains # # end of i.MX PM Domains # # Qualcomm PM Domains # # end of Qualcomm PM Domains # end of PM Domains # CONFIG_PM_DEVFREQ is not set CONFIG_EXTCON=y # # Extcon Device Drivers # # CONFIG_EXTCON_ADC_JACK is not set # CONFIG_EXTCON_FSA9480 is not set # CONFIG_EXTCON_GPIO is not set # CONFIG_EXTCON_INTEL_INT3496 is not set CONFIG_EXTCON_INTEL_CHT_WC=y # CONFIG_EXTCON_LC824206XA is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_MAX14526 is not set CONFIG_EXTCON_PTN5150=y # CONFIG_EXTCON_RT8973A is not set # CONFIG_EXTCON_SM5502 is not set # CONFIG_EXTCON_USB_GPIO is not set # CONFIG_EXTCON_USBC_CROS_EC is not set CONFIG_EXTCON_USBC_TUSB320=y # CONFIG_MEMORY is not set CONFIG_IIO=y CONFIG_IIO_BUFFER=y # CONFIG_IIO_BUFFER_CB is not set # CONFIG_IIO_BUFFER_DMA is not set # CONFIG_IIO_BUFFER_DMAENGINE is not set # CONFIG_IIO_BUFFER_HW_CONSUMER is not set CONFIG_IIO_KFIFO_BUF=y CONFIG_IIO_TRIGGERED_BUFFER=y # CONFIG_IIO_CONFIGFS is not set CONFIG_IIO_TRIGGER=y CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_IIO_SW_DEVICE is not set # CONFIG_IIO_SW_TRIGGER is not set # CONFIG_IIO_TRIGGERED_EVENT is not set # # Accelerometers # # CONFIG_ADIS16201 is not set # CONFIG_ADIS16209 is not set # CONFIG_ADXL313_I2C is not set # CONFIG_ADXL313_SPI is not set # CONFIG_ADXL345_I2C is not set # CONFIG_ADXL345_SPI is not set # CONFIG_ADXL355_I2C is not set # CONFIG_ADXL355_SPI is not set # CONFIG_ADXL367_SPI is not set # CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set # CONFIG_ADXL380_SPI is not set # CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set # CONFIG_BMC150_ACCEL is not set # CONFIG_BMI088_ACCEL is not set # CONFIG_DA280 is not set # CONFIG_DA311 is not set # CONFIG_DMARD06 is not set # CONFIG_DMARD09 is not set # CONFIG_DMARD10 is not set # CONFIG_FXLS8962AF_I2C is not set # CONFIG_FXLS8962AF_SPI is not set CONFIG_HID_SENSOR_ACCEL_3D=y # CONFIG_IIO_ST_ACCEL_3AXIS is not set # CONFIG_IIO_KX022A_SPI is not set # CONFIG_IIO_KX022A_I2C is not set # CONFIG_KXSD9 is not set # CONFIG_KXCJK1013 is not set # CONFIG_MC3230 is not set # CONFIG_MMA7455_I2C is not set # CONFIG_MMA7455_SPI is not set # CONFIG_MMA7660 is not set # CONFIG_MMA8452 is not set # CONFIG_MMA9551 is not set # CONFIG_MMA9553 is not set # CONFIG_MSA311 is not set # CONFIG_MXC4005 is not set # CONFIG_MXC6255 is not set # CONFIG_SCA3000 is not set # CONFIG_SCA3300 is not set # CONFIG_STK8312 is not set # CONFIG_STK8BA50 is not set # end of Accelerometers # # Analog to digital converters # # CONFIG_AD4000 is not set # CONFIG_AD4030 is not set # CONFIG_AD4080 is not set # CONFIG_AD4130 is not set # CONFIG_AD4134 is not set # CONFIG_AD4170_4 is not set # CONFIG_AD4695 is not set # CONFIG_AD7091R5 is not set # CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set # CONFIG_AD7173 is not set # CONFIG_AD7191 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set # CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set # CONFIG_AD7766 is not set # CONFIG_AD7768_1 is not set # CONFIG_AD7779 is not set # CONFIG_AD7780 is not set # CONFIG_AD7791 is not set # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set # CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set # CONFIG_ADE9000 is not set # CONFIG_CC10001_ADC is not set CONFIG_DLN2_ADC=y # CONFIG_ENVELOPE_DETECTOR is not set # CONFIG_GEHC_PMC_ADC is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set # CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set # CONFIG_LTC2497 is not set # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set # CONFIG_MAX11205 is not set # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX14001 is not set # CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set # CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_MEDIATEK_MT6360_ADC is not set # CONFIG_MEDIATEK_MT6370_ADC is not set # CONFIG_NAU7802 is not set # CONFIG_NCT7201 is not set # CONFIG_PAC1921 is not set # CONFIG_PAC1934 is not set # CONFIG_ROHM_BD79112 is not set # CONFIG_ROHM_BD79124 is not set # CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_SD_ADC_MODULATOR is not set # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set # CONFIG_TI_ADC108S102 is not set # CONFIG_TI_ADC12138 is not set # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set # CONFIG_TI_ADS1018 is not set # CONFIG_TI_ADS1100 is not set # CONFIG_TI_ADS1119 is not set # CONFIG_TI_ADS124S08 is not set # CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS131E08 is not set # CONFIG_TI_ADS131M02 is not set # CONFIG_TI_ADS7138 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set # CONFIG_TI_LMP92064 is not set # CONFIG_TI_TLC4541 is not set # CONFIG_TI_TSC2046 is not set # CONFIG_TWL4030_MADC is not set # CONFIG_TWL6030_GPADC is not set # CONFIG_VF610_ADC is not set CONFIG_VIPERBOARD_ADC=y # CONFIG_XILINX_XADC is not set # end of Analog to digital converters # # Analog to digital and digital to analog converters # # CONFIG_AD74115 is not set # CONFIG_AD74413R is not set # end of Analog to digital and digital to analog converters # # Analog Front Ends # # CONFIG_IIO_RESCALE is not set # end of Analog Front Ends # # Amplifiers # # CONFIG_AD8366 is not set # CONFIG_ADA4250 is not set # CONFIG_ADL8113 is not set # CONFIG_HMC425 is not set # end of Amplifiers # # Capacitance to digital converters # # CONFIG_AD7150 is not set # CONFIG_AD7746 is not set # end of Capacitance to digital converters # # Chemical Sensors # # CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set # CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_MHZ19B is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set # CONFIG_SCD4X is not set # CONFIG_SEN0322 is not set # CONFIG_SENSIRION_SGP30 is not set # CONFIG_SENSIRION_SGP40 is not set # CONFIG_SPS30_I2C is not set # CONFIG_SPS30_SERIAL is not set # CONFIG_SENSEAIR_SUNRISE_CO2 is not set # CONFIG_VZ89X is not set # end of Chemical Sensors # # Hid Sensor IIO Common # CONFIG_HID_SENSOR_IIO_COMMON=y CONFIG_HID_SENSOR_IIO_TRIGGER=y # end of Hid Sensor IIO Common # # IIO SCMI Sensors # # end of IIO SCMI Sensors # # SSP Sensor Common # # CONFIG_IIO_SSP_SENSORHUB is not set # end of SSP Sensor Common # # Digital to analog converters # # CONFIG_AD3530R is not set # CONFIG_AD3552R_HS is not set # CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set # CONFIG_AD5380 is not set # CONFIG_AD5421 is not set # CONFIG_AD5446_SPI is not set # CONFIG_AD5446_I2C is not set # CONFIG_AD5449 is not set # CONFIG_AD5592R is not set # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set # CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set # CONFIG_AD5755 is not set # CONFIG_AD5758 is not set # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set # CONFIG_AD5766 is not set # CONFIG_AD5770R is not set # CONFIG_AD5791 is not set # CONFIG_AD7293 is not set # CONFIG_AD7303 is not set # CONFIG_AD8460 is not set # CONFIG_AD8801 is not set # CONFIG_BD79703 is not set # CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set # CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MAX22007 is not set # CONFIG_MAX5522 is not set # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set # CONFIG_MCP47FEB02 is not set # CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set # CONFIG_TI_DAC7311 is not set # CONFIG_TI_DAC7612 is not set # CONFIG_VF610_DAC is not set # end of Digital to analog converters # # IIO dummy driver # # end of IIO dummy driver # # Filters # # CONFIG_ADMV8818 is not set # end of Filters # # Frequency Synthesizers DDS/PLL # # # Clock Generator/Distribution # # CONFIG_AD9523 is not set # end of Clock Generator/Distribution # # Phase-Locked Loop (PLL) frequency synthesizers # # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set # CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set # CONFIG_ADRF6780 is not set # end of Phase-Locked Loop (PLL) frequency synthesizers # end of Frequency Synthesizers DDS/PLL # # Digital gyroscope sensors # # CONFIG_ADIS16080 is not set # CONFIG_ADIS16130 is not set # CONFIG_ADIS16136 is not set # CONFIG_ADIS16260 is not set # CONFIG_ADXRS290 is not set # CONFIG_ADXRS450 is not set # CONFIG_BMG160 is not set # CONFIG_FXAS21002C is not set CONFIG_HID_SENSOR_GYRO_3D=y # CONFIG_MPU3050_I2C is not set # CONFIG_IIO_ST_GYRO_3AXIS is not set # CONFIG_ITG3200 is not set # end of Digital gyroscope sensors # # Health Sensors # # # Heart Rate Monitors # # CONFIG_AFE4403 is not set # CONFIG_AFE4404 is not set # CONFIG_MAX30100 is not set # CONFIG_MAX30102 is not set # end of Heart Rate Monitors # end of Health Sensors # # Humidity sensors # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set # CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set # CONFIG_HDC3020 is not set CONFIG_HID_SENSOR_HUMIDITY=y # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set # CONFIG_SI7020 is not set # end of Humidity sensors # # Inertial measurement units # # CONFIG_ADIS16400 is not set # CONFIG_ADIS16460 is not set # CONFIG_ADIS16475 is not set # CONFIG_ADIS16480 is not set # CONFIG_ADIS16550 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set # CONFIG_BMI270_I2C is not set # CONFIG_BMI270_SPI is not set # CONFIG_BMI323_I2C is not set # CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set # CONFIG_FXOS8700_SPI is not set # CONFIG_KMX61 is not set # CONFIG_INV_ICM42600_I2C is not set # CONFIG_INV_ICM42600_SPI is not set # CONFIG_INV_ICM45600_I2C is not set # CONFIG_INV_ICM45600_SPI is not set # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set # CONFIG_SMI240 is not set # CONFIG_SMI330_I2C is not set # CONFIG_SMI330_SPI is not set # CONFIG_IIO_ST_LSM6DSX is not set # CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units # # Light sensors # # CONFIG_ACPI_ALS is not set # CONFIG_ADJD_S311 is not set # CONFIG_ADUX1020 is not set # CONFIG_AL3000A is not set # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9160 is not set # CONFIG_APDS9300 is not set # CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set # CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set # CONFIG_CM3232 is not set # CONFIG_CM3323 is not set # CONFIG_CM3605 is not set # CONFIG_CM36651 is not set # CONFIG_GP2AP002 is not set # CONFIG_GP2AP020A00F is not set # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set # CONFIG_ISL76682 is not set CONFIG_HID_SENSOR_ALS=y CONFIG_HID_SENSOR_PROX=y # CONFIG_JSA1212 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set # CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set # CONFIG_MAX44000 is not set # CONFIG_MAX44009 is not set # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set # CONFIG_OPT4001 is not set # CONFIG_OPT4060 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set # CONFIG_STK3310 is not set # CONFIG_ST_UVIS25 is not set # CONFIG_TCS3414 is not set # CONFIG_TCS3472 is not set # CONFIG_SENSORS_TSL2563 is not set # CONFIG_TSL2583 is not set # CONFIG_TSL2591 is not set # CONFIG_TSL2772 is not set # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set # CONFIG_VEML3235 is not set # CONFIG_VEML6030 is not set # CONFIG_VEML6040 is not set # CONFIG_VEML6046X00 is not set # CONFIG_VEML6070 is not set # CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors # # Magnetometer sensors # # CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set # CONFIG_ALS31300 is not set # CONFIG_BMC150_MAGN_I2C is not set # CONFIG_BMC150_MAGN_SPI is not set # CONFIG_MAG3110 is not set CONFIG_HID_SENSOR_MAGNETOMETER_3D=y # CONFIG_MMC35240 is not set # CONFIG_MMC5633 is not set # CONFIG_IIO_ST_MAGN_3AXIS is not set # CONFIG_INFINEON_TLV493D is not set # CONFIG_SENSORS_HMC5843_I2C is not set # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set # CONFIG_SI7210 is not set # CONFIG_TI_TMAG5273 is not set # CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors # # Multiplexers # # CONFIG_IIO_MUX is not set # end of Multiplexers # # Inclinometer sensors # CONFIG_HID_SENSOR_INCLINOMETER_3D=y CONFIG_HID_SENSOR_DEVICE_ROTATION=y # end of Inclinometer sensors # # Triggers - standalone # # CONFIG_IIO_INTERRUPT_TRIGGER is not set # CONFIG_IIO_SYSFS_TRIGGER is not set # end of Triggers - standalone # # Linear and angular position sensors # CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=y # end of Linear and angular position sensors # # Digital potentiometers # # CONFIG_AD5110 is not set # CONFIG_AD5272 is not set # CONFIG_DS1803 is not set # CONFIG_MAX5432 is not set # CONFIG_MAX5481 is not set # CONFIG_MAX5487 is not set # CONFIG_MCP4018 is not set # CONFIG_MCP4131 is not set # CONFIG_MCP4531 is not set # CONFIG_MCP41010 is not set # CONFIG_TPL0102 is not set # CONFIG_X9250 is not set # end of Digital potentiometers # # Digital potentiostats # # CONFIG_LMP91000 is not set # end of Digital potentiostats # # Pressure sensors # # CONFIG_ABP060MG is not set # CONFIG_ABP2030PA_I2C is not set # CONFIG_ABP2030PA_SPI is not set # CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set CONFIG_HID_SENSOR_PRESS=y # CONFIG_HP03 is not set # CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set # CONFIG_MPL3115 is not set # CONFIG_MPRLS0025PA_I2C is not set # CONFIG_MPRLS0025PA_SPI is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set # CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set # CONFIG_ZPA2326 is not set # CONFIG_ADP810 is not set # end of Pressure sensors # # Lightning sensors # # CONFIG_AS3935 is not set # end of Lightning sensors # # Proximity and distance sensors # # CONFIG_CROS_EC_MKBP_PROXIMITY is not set # CONFIG_D3323AA is not set # CONFIG_HX9023S is not set # CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set # CONFIG_MB1232 is not set # CONFIG_PING is not set # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set # CONFIG_SX9310 is not set # CONFIG_SX9324 is not set # CONFIG_SX9360 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set # CONFIG_AW96103 is not set # end of Proximity and distance sensors # # Resolver to digital converters # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set # CONFIG_AD2S1210 is not set # end of Resolver to digital converters # # Temperature sensors # # CONFIG_LTC2983 is not set # CONFIG_MAXIM_THERMOCOUPLE is not set CONFIG_HID_SENSOR_TEMP=y # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set # CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set # CONFIG_TSYS01 is not set # CONFIG_TSYS02D is not set # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set # CONFIG_MCP9600 is not set # end of Temperature sensors # CONFIG_NTB is not set # CONFIG_PWM is not set # # IRQ chip support # CONFIG_IRQCHIP=y CONFIG_IRQ_MSI_LIB=y # CONFIG_AL_FIC is not set # CONFIG_XILINX_INTC is not set # end of IRQ chip support # CONFIG_IPACK_BUS is not set CONFIG_RESET_CONTROLLER=y # CONFIG_RESET_GPIO is not set # CONFIG_RESET_INTEL_GW is not set # CONFIG_RESET_SIMPLE is not set # CONFIG_RESET_TI_SYSCON is not set # CONFIG_RESET_TI_TPS380X is not set # # PHY Subsystem # CONFIG_GENERIC_PHY=y # CONFIG_PHY_GOOGLE_USB is not set CONFIG_USB_LGM_PHY=y # CONFIG_PHY_CAN_TRANSCEIVER is not set # CONFIG_PHY_NXP_PTN3222 is not set # # PHY drivers for Broadcom platforms # # CONFIG_BCM_KONA_USB2_PHY is not set # end of PHY drivers for Broadcom platforms # CONFIG_PHY_CADENCE_TORRENT is not set # CONFIG_PHY_CADENCE_DPHY is not set # CONFIG_PHY_CADENCE_DPHY_RX is not set # CONFIG_PHY_CADENCE_SIERRA is not set # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set CONFIG_PHY_CPCAP_USB=y # CONFIG_PHY_MAPPHONE_MDM6600 is not set # CONFIG_PHY_OCELOT_SERDES is not set CONFIG_PHY_QCOM_USB_HS=y CONFIG_PHY_QCOM_USB_HSIC=y CONFIG_PHY_SAMSUNG_USB2=y CONFIG_PHY_TUSB1210=y # CONFIG_PHY_INTEL_LGM_COMBO is not set # CONFIG_PHY_INTEL_LGM_EMMC is not set # end of PHY Subsystem # CONFIG_POWERCAP is not set # CONFIG_MCB is not set # # Performance monitor support # # CONFIG_DWC_PCIE_PMU is not set # end of Performance monitor support CONFIG_RAS=y CONFIG_USB4=y # CONFIG_USB4_DEBUGFS_WRITE is not set # CONFIG_USB4_DMA_TEST is not set # # Android # # CONFIG_ANDROID_BINDER_IPC is not set # end of Android # CONFIG_LIBNVDIMM is not set # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y CONFIG_NVMEM_LAYOUTS=y # # Layout Types # # CONFIG_NVMEM_LAYOUT_SL28_VPD is not set # CONFIG_NVMEM_LAYOUT_ONIE_TLV is not set # CONFIG_NVMEM_LAYOUT_U_BOOT_ENV is not set # end of Layout Types # CONFIG_NVMEM_RMEM is not set # # HW tracing support # # CONFIG_STM is not set # CONFIG_INTEL_TH is not set # end of HW tracing support # CONFIG_FPGA is not set # CONFIG_FSI is not set CONFIG_TEE=y CONFIG_AMDTEE=y # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set CONFIG_MOST=y CONFIG_MOST_USB_HDM=y # CONFIG_MOST_CDEV is not set # CONFIG_MOST_SND is not set # CONFIG_PECI is not set # CONFIG_HTE is not set # end of Device Drivers # # File systems # CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_VALIDATE_FS_PARSER is not set CONFIG_FS_IOMAP=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set CONFIG_EXT4_FS=y CONFIG_EXT4_USE_FOR_EXT2=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y # CONFIG_EXT4_DEBUG is not set CONFIG_JBD2=y # CONFIG_JBD2_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_JFS_FS is not set # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set CONFIG_FILE_LOCKING=y # CONFIG_FS_ENCRYPTION is not set # CONFIG_FS_VERITY is not set CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_FANOTIFY is not set CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y # CONFIG_QUOTA_DEBUG is not set CONFIG_QUOTA_TREE=y # CONFIG_QFMT_V1 is not set CONFIG_QFMT_V2=y CONFIG_QUOTACTL=y CONFIG_AUTOFS_FS=y # CONFIG_FUSE_FS is not set # CONFIG_OVERLAY_FS is not set # # Caches # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set # CONFIG_NETFS_DEBUG is not set # CONFIG_FSCACHE is not set # end of Caches # # CD-ROM/DVD Filesystems # CONFIG_ISO9660_FS=y CONFIG_JOLIET=y CONFIG_ZISOFS=y # CONFIG_UDF_FS is not set # end of CD-ROM/DVD Filesystems # # DOS/FAT/EXFAT/NT Filesystems # CONFIG_FAT_FS=y CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_EXFAT_FS is not set # CONFIG_NTFS3_FS is not set # CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_VMCORE=y # CONFIG_PROC_VMCORE_DEVICE_DUMP is not set CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROC_CHILDREN is not set CONFIG_PROC_PID_ARCH_STATUS=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_XATTR=y # CONFIG_TMPFS_INODE64 is not set # CONFIG_TMPFS_QUOTA is not set CONFIG_ARCH_SUPPORTS_HUGETLBFS=y CONFIG_HUGETLBFS=y # CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set CONFIG_HUGETLB_PAGE=y CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y CONFIG_HUGETLB_PMD_PAGE_TABLE_SHARING=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_CONFIGFS_FS=y # end of Pseudo filesystems CONFIG_MISC_FILESYSTEMS=y # CONFIG_ORANGEFS_FS is not set # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set # CONFIG_CRAMFS is not set # CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set # CONFIG_PSTORE is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y # CONFIG_NFS_V2 is not set CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y # CONFIG_NFS_SWAP is not set CONFIG_NFS_V4_0=y # CONFIG_NFS_V4_2 is not set CONFIG_PNFS_FILE_LAYOUT=y CONFIG_PNFS_BLOCK=y CONFIG_PNFS_FLEXFILE_LAYOUT=y CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" # CONFIG_NFS_V4_1_MIGRATION is not set CONFIG_ROOT_NFS=y # CONFIG_NFS_FSCACHE is not set # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y # CONFIG_NFSD is not set CONFIG_GRACE_PERIOD=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y CONFIG_SUNRPC_GSS=y CONFIG_SUNRPC_BACKCHANNEL=y CONFIG_RPCSEC_GSS_KRB5=y CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA1=y # CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_CAMELLIA is not set # CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA2 is not set # CONFIG_SUNRPC_DEBUG is not set # CONFIG_SUNRPC_XPRT_RDMA is not set # CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set # CONFIG_SMB_SERVER is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set CONFIG_9P_FS=y # CONFIG_9P_FS_POSIX_ACL is not set # CONFIG_9P_FS_SECURITY is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set # CONFIG_NLS_CODEPAGE_850 is not set # CONFIG_NLS_CODEPAGE_852 is not set # CONFIG_NLS_CODEPAGE_855 is not set # CONFIG_NLS_CODEPAGE_857 is not set # CONFIG_NLS_CODEPAGE_860 is not set # CONFIG_NLS_CODEPAGE_861 is not set # CONFIG_NLS_CODEPAGE_862 is not set # CONFIG_NLS_CODEPAGE_863 is not set # CONFIG_NLS_CODEPAGE_864 is not set # CONFIG_NLS_CODEPAGE_865 is not set # CONFIG_NLS_CODEPAGE_866 is not set # CONFIG_NLS_CODEPAGE_869 is not set # CONFIG_NLS_CODEPAGE_936 is not set # CONFIG_NLS_CODEPAGE_950 is not set # CONFIG_NLS_CODEPAGE_932 is not set # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set # CONFIG_NLS_CODEPAGE_1250 is not set # CONFIG_NLS_CODEPAGE_1251 is not set CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_ISO8859_2 is not set # CONFIG_NLS_ISO8859_3 is not set # CONFIG_NLS_ISO8859_4 is not set # CONFIG_NLS_ISO8859_5 is not set # CONFIG_NLS_ISO8859_6 is not set # CONFIG_NLS_ISO8859_7 is not set # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set # CONFIG_NLS_ISO8859_15 is not set # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_MAC_ROMAN is not set # CONFIG_NLS_MAC_CELTIC is not set # CONFIG_NLS_MAC_CENTEURO is not set # CONFIG_NLS_MAC_CROATIAN is not set # CONFIG_NLS_MAC_CYRILLIC is not set # CONFIG_NLS_MAC_GAELIC is not set # CONFIG_NLS_MAC_GREEK is not set # CONFIG_NLS_MAC_ICELAND is not set # CONFIG_NLS_MAC_INUIT is not set # CONFIG_NLS_MAC_ROMANIAN is not set # CONFIG_NLS_MAC_TURKISH is not set CONFIG_NLS_UTF8=y # CONFIG_DLM is not set # CONFIG_UNICODE is not set CONFIG_IO_WQ=y # end of File systems # # Security options # CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set # CONFIG_BIG_KEYS is not set # CONFIG_TRUSTED_KEYS is not set # CONFIG_ENCRYPTED_KEYS is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set CONFIG_PROC_MEM_ALWAYS_FORCE=y # CONFIG_PROC_MEM_FORCE_PTRACE is not set # CONFIG_PROC_MEM_NO_FORCE is not set # CONFIG_MSEAL_SYSTEM_MAPPINGS is not set CONFIG_SECURITY=y CONFIG_HAS_SECURITY_AUDIT=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y # CONFIG_SECURITY_INFINIBAND is not set # CONFIG_SECURITY_NETWORK_XFRM is not set # CONFIG_SECURITY_PATH is not set # CONFIG_INTEL_TXT is not set CONFIG_LSM_MMAP_MIN_ADDR=65536 # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_SECURITY_SELINUX=y CONFIG_SECURITY_SELINUX_BOOTPARAM=y CONFIG_SECURITY_SELINUX_DEVELOP=y CONFIG_SECURITY_SELINUX_AVC_STATS=y CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 CONFIG_SECURITY_SELINUX_AVC_HASH_BITS=9 # CONFIG_SECURITY_SELINUX_DEBUG is not set # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set # CONFIG_SECURITY_APPARMOR is not set # CONFIG_SECURITY_LOADPIN is not set # CONFIG_SECURITY_YAMA is not set # CONFIG_SECURITY_SAFESETID is not set # CONFIG_SECURITY_LOCKDOWN_LSM is not set # CONFIG_SECURITY_LANDLOCK is not set # CONFIG_SECURITY_IPE is not set CONFIG_INTEGRITY=y # CONFIG_INTEGRITY_SIGNATURE is not set CONFIG_INTEGRITY_AUDIT=y # CONFIG_IMA is not set # CONFIG_EVM is not set CONFIG_DEFAULT_SECURITY_SELINUX=y # CONFIG_DEFAULT_SECURITY_DAC is not set CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,selinux,smack,tomoyo,apparmor,ipe,bpf" # # Kernel hardening options # # # Memory initialization # CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y # CONFIG_INIT_STACK_NONE is not set # CONFIG_INIT_STACK_ALL_PATTERN is not set CONFIG_INIT_STACK_ALL_ZERO=y CONFIG_CC_HAS_SANCOV_STACK_DEPTH_CALLBACK=y # CONFIG_KSTACK_ERASE is not set CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization # # Bounds checking # CONFIG_FORTIFY_SOURCE=y CONFIG_HARDENED_USERCOPY=y # CONFIG_HARDENED_USERCOPY_DEFAULT_ON is not set # end of Bounds checking # # Hardening of kernel data structures # CONFIG_LIST_HARDENED=y CONFIG_BUG_ON_DATA_CORRUPTION=y # end of Hardening of kernel data structures CONFIG_CC_HAS_RANDSTRUCT=y CONFIG_RANDSTRUCT_NONE=y # CONFIG_RANDSTRUCT_FULL is not set # end of Kernel hardening options # end of Security options CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_SIG=y CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y CONFIG_CRYPTO_KPP=y CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y # CONFIG_CRYPTO_USER is not set # CONFIG_CRYPTO_SELFTESTS is not set # CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_PCRYPT is not set # CONFIG_CRYPTO_CRYPTD is not set CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_KRB5ENC=y # CONFIG_CRYPTO_BENCHMARK is not set # end of Crypto core or helper # # Public-key cryptography # CONFIG_CRYPTO_RSA=y # CONFIG_CRYPTO_DH is not set CONFIG_CRYPTO_ECC=y CONFIG_CRYPTO_ECDH=y # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set # CONFIG_CRYPTO_MLDSA is not set # end of Public-key cryptography # # Block ciphers # CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARIA is not set # CONFIG_CRYPTO_BLOWFISH is not set CONFIG_CRYPTO_CAMELLIA=y # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set # CONFIG_CRYPTO_DES is not set CONFIG_CRYPTO_FCRYPT=y # CONFIG_CRYPTO_SERPENT is not set # CONFIG_CRYPTO_SM4_GENERIC is not set # CONFIG_CRYPTO_TWOFISH is not set # end of Block ciphers # # Length-preserving ciphers and modes # # CONFIG_CRYPTO_ADIANTUM is not set # CONFIG_CRYPTO_CHACHA20 is not set CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=y CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set # CONFIG_CRYPTO_LRW is not set CONFIG_CRYPTO_PCBC=y # CONFIG_CRYPTO_XTS is not set # end of Length-preserving ciphers and modes # # AEAD (authenticated encryption with associated data) ciphers # # CONFIG_CRYPTO_AEGIS128 is not set # CONFIG_CRYPTO_CHACHA20POLY1305 is not set CONFIG_CRYPTO_CCM=y CONFIG_CRYPTO_GCM=y CONFIG_CRYPTO_GENIV=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_ECHAINIV=y # CONFIG_CRYPTO_ESSIV is not set # end of AEAD (authenticated encryption with associated data) ciphers # # Hashes, digests, and MACs # # CONFIG_CRYPTO_BLAKE2B is not set CONFIG_CRYPTO_CMAC=y CONFIG_CRYPTO_GHASH=y CONFIG_CRYPTO_HMAC=y # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set # CONFIG_CRYPTO_MICHAEL_MIC is not set # CONFIG_CRYPTO_RMD160 is not set CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y # CONFIG_CRYPTO_SM3_GENERIC is not set # CONFIG_CRYPTO_STREEBOG is not set # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_XCBC is not set # CONFIG_CRYPTO_XXHASH is not set # end of Hashes, digests, and MACs # # CRCs (cyclic redundancy checks) # # CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_CRC32 is not set # end of CRCs (cyclic redundancy checks) # # Compression # CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_842 is not set # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set # CONFIG_CRYPTO_ZSTD is not set # end of Compression # # Random number generation # CONFIG_CRYPTO_DRBG_MENU=y CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_HASH is not set # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 CONFIG_CRYPTO_JITTERENTROPY_OSR=1 # end of Random number generation # # Userspace interface # # CONFIG_CRYPTO_USER_API_HASH is not set # CONFIG_CRYPTO_USER_API_SKCIPHER is not set # CONFIG_CRYPTO_USER_API_RNG is not set # CONFIG_CRYPTO_USER_API_AEAD is not set # end of Userspace interface # # Accelerated Cryptographic Algorithms for CPU (x86) # # CONFIG_CRYPTO_AES_NI_INTEL is not set # CONFIG_CRYPTO_BLOWFISH_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set # CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set # CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set # CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set # CONFIG_CRYPTO_DES3_EDE_X86_64 is not set # CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set # CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set # CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set # CONFIG_CRYPTO_SM4_AESNI_AVX_X86_64 is not set # CONFIG_CRYPTO_SM4_AESNI_AVX2_X86_64 is not set # CONFIG_CRYPTO_TWOFISH_X86_64 is not set # CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set # CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set # CONFIG_CRYPTO_ARIA_AESNI_AVX_X86_64 is not set # CONFIG_CRYPTO_ARIA_AESNI_AVX2_X86_64 is not set # CONFIG_CRYPTO_ARIA_GFNI_AVX512_X86_64 is not set # CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set # CONFIG_CRYPTO_SM3_AVX_X86_64 is not set # CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set # end of Accelerated Cryptographic Algorithms for CPU (x86) CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_PADLOCK is not set # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set CONFIG_CRYPTO_DEV_CCP=y CONFIG_CRYPTO_DEV_CCP_DD=y # CONFIG_CRYPTO_DEV_SP_CCP is not set CONFIG_CRYPTO_DEV_SP_PSP=y # CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set # CONFIG_CRYPTO_DEV_QAT_C62X is not set # CONFIG_CRYPTO_DEV_QAT_4XXX is not set # CONFIG_CRYPTO_DEV_QAT_420XX is not set # CONFIG_CRYPTO_DEV_QAT_6XXX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set # CONFIG_CRYPTO_DEV_VIRTIO is not set # CONFIG_CRYPTO_DEV_SAFEXCEL is not set # CONFIG_CRYPTO_DEV_CCREE is not set # CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y CONFIG_X509_CERTIFICATE_PARSER=y # CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set # CONFIG_SIGNED_PE_FILE_VERIFICATION is not set # CONFIG_FIPS_SIGNATURE_SELFTEST is not set # # Certificates for signature checking # CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYS="" # CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set # CONFIG_SECONDARY_TRUSTED_KEYRING is not set # CONFIG_SYSTEM_BLACKLIST_KEYRING is not set CONFIG_OPENSSL_SUPPORTS_ML_DSA=y # end of Certificates for signature checking CONFIG_CRYPTO_KRB5=y # CONFIG_CRYPTO_KRB5_SELFTESTS is not set CONFIG_BINARY_PRINTF=y # # Library routines # CONFIG_LINEAR_RANGES=y # CONFIG_PACKING is not set CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y CONFIG_CRC8=y CONFIG_CRC16=y CONFIG_CRC_CCITT=y CONFIG_CRC_ITU_T=y CONFIG_CRC_T10DIF=y CONFIG_CRC_T10DIF_ARCH=y CONFIG_CRC32=y CONFIG_CRC32_ARCH=y CONFIG_CRC_OPTIMIZATIONS=y # # Crypto library routines # CONFIG_CRYPTO_HASH_INFO=y CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LIB_AES=y CONFIG_CRYPTO_LIB_AES_ARCH=y CONFIG_CRYPTO_LIB_ARC4=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_BLAKE2S_ARCH=y CONFIG_CRYPTO_LIB_CHACHA=y CONFIG_CRYPTO_LIB_CHACHA_ARCH=y CONFIG_CRYPTO_LIB_CURVE25519=y CONFIG_CRYPTO_LIB_CURVE25519_ARCH=y CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y CONFIG_CRYPTO_LIB_MD5=y CONFIG_CRYPTO_LIB_POLY1305=y CONFIG_CRYPTO_LIB_POLY1305_ARCH=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA1_ARCH=y CONFIG_CRYPTO_LIB_SHA256=y CONFIG_CRYPTO_LIB_SHA256_ARCH=y CONFIG_CRYPTO_LIB_SHA512=y CONFIG_CRYPTO_LIB_SHA512_ARCH=y CONFIG_CRYPTO_LIB_SHA3=y # end of Crypto library routines CONFIG_XXHASH=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_LZ4_COMPRESS=y CONFIG_LZ4_DECOMPRESS=y CONFIG_ZSTD_COMMON=y CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y CONFIG_XZ_DEC_RISCV=y # CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set CONFIG_DECOMPRESS_GZIP=y CONFIG_DECOMPRESS_BZIP2=y CONFIG_DECOMPRESS_LZMA=y CONFIG_DECOMPRESS_XZ=y CONFIG_DECOMPRESS_LZO=y CONFIG_DECOMPRESS_LZ4=y CONFIG_DECOMPRESS_ZSTD=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=y CONFIG_TEXTSEARCH_BM=y CONFIG_TEXTSEARCH_FSM=y CONFIG_INTERVAL_TREE=y CONFIG_XARRAY_MULTI=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y CONFIG_DMA_OPS_HELPERS=y CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_NEED_SYNC=y # CONFIG_DMA_RESTRICTED_POOL is not set # CONFIG_DMA_API_DEBUG is not set # CONFIG_DMA_MAP_BENCHMARK is not set CONFIG_SGL_ALLOC=y CONFIG_CHECK_SIGNATURE=y CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y CONFIG_NLATTR=y CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_OVERFLOW_PROTECT=y CONFIG_VDSO_GETRANDOM=y CONFIG_SG_POOL=y CONFIG_ARCH_HAS_PMEM_API=y CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION=y CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y CONFIG_ARCH_HAS_COPY_MC=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_REF_TRACKER=y CONFIG_SBITMAP=y # CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_FIRMWARE_TABLE=y CONFIG_UNION_FIND=y # # Kernel hacking # # # printk and dmesg options # CONFIG_PRINTK_TIME=y CONFIG_PRINTK_CALLER=y # CONFIG_STACKTRACE_BUILD_ID is not set CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_DYNAMIC_DEBUG is not set # CONFIG_DYNAMIC_DEBUG_CORE is not set CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_BUGVERBOSE_DETAILED is not set # end of printk and dmesg options CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y CONFIG_AS_HAS_NON_CONST_ULEB128=y # CONFIG_DEBUG_INFO_NONE is not set # CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set CONFIG_DEBUG_INFO_DWARF4=y # CONFIG_DEBUG_INFO_DWARF5 is not set # CONFIG_DEBUG_INFO_REDUCED is not set CONFIG_DEBUG_INFO_COMPRESSED_NONE=y # CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set # CONFIG_DEBUG_INFO_COMPRESSED_ZSTD is not set # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_BTF is not set CONFIG_PAHOLE_HAS_BTF_TAG=y CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y # CONFIG_GDB_SCRIPTS is not set CONFIG_FRAME_WARN=2048 # CONFIG_STRIP_ASM_SYMS is not set # CONFIG_HEADERS_INSTALL is not set CONFIG_SECTION_MISMATCH_WARN_ONLY=y # CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B is not set CONFIG_OBJTOOL=y # CONFIG_OBJTOOL_WERROR is not set CONFIG_NOINSTR_VALIDATION=y # CONFIG_VMLINUX_MAP is not set # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # end of Compile-time checks and compiler options # # Generic Kernel Debugging Instruments # # CONFIG_MAGIC_SYSRQ is not set CONFIG_DEBUG_FS=y CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y CONFIG_KCSAN=y CONFIG_CC_HAS_TSAN_COMPOUND_READ_BEFORE_WRITE=y CONFIG_KCSAN_SELFTEST=y # CONFIG_KCSAN_EARLY_ENABLE is not set CONFIG_KCSAN_NUM_WATCHPOINTS=64 CONFIG_KCSAN_UDELAY_TASK=80 CONFIG_KCSAN_UDELAY_INTERRUPT=20 CONFIG_KCSAN_DELAY_RANDOMIZE=y CONFIG_KCSAN_SKIP_WATCH=4000 CONFIG_KCSAN_SKIP_WATCH_RANDOMIZE=y # CONFIG_KCSAN_INTERRUPT_WATCHER is not set CONFIG_KCSAN_REPORT_ONCE_IN_MS=3000 # CONFIG_KCSAN_REPORT_RACE_UNKNOWN_ORIGIN is not set # CONFIG_KCSAN_STRICT is not set CONFIG_KCSAN_REPORT_VALUE_CHANGE_ONLY=y # CONFIG_KCSAN_ASSUME_PLAIN_WRITES_ATOMIC is not set CONFIG_KCSAN_IGNORE_ATOMICS=y CONFIG_KCSAN_PERMISSIVE=y # end of Generic Kernel Debugging Instruments # # Networking Debugging # CONFIG_NET_DEV_REFCNT_TRACKER=y CONFIG_NET_NS_REFCNT_TRACKER=y CONFIG_DEBUG_NET=y # CONFIG_DEBUG_NET_SMALL_RTNL is not set # end of Networking Debugging # # Memory Debugging # # CONFIG_PAGE_EXTENSION is not set # CONFIG_DEBUG_PAGEALLOC is not set CONFIG_SLUB_DEBUG=y # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_TABLE_CHECK is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y CONFIG_DEBUG_WX=y CONFIG_ARCH_HAS_PTDUMP=y CONFIG_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_PER_VMA_LOCK_STATS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SHRINKER_DEBUG is not set CONFIG_DEBUG_STACK_USAGE=y CONFIG_SCHED_STACK_END_CHECK=y CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y # CONFIG_DEBUG_VFS is not set # CONFIG_DEBUG_VM is not set # CONFIG_DEBUG_VM_PGTABLE is not set CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set CONFIG_ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP=y # CONFIG_DEBUG_KMAP_LOCAL_FORCE_MAP is not set # CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_CC_HAS_KASAN_SW_TAGS=y CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set CONFIG_HAVE_ARCH_KFENCE=y # CONFIG_KFENCE is not set CONFIG_HAVE_ARCH_KMSAN=y CONFIG_HAVE_KMSAN_COMPILER=y # end of Memory Debugging # CONFIG_DEBUG_SHIRQ is not set # # Debug Oops, Lockups and Hangs # CONFIG_PANIC_ON_OOPS=y CONFIG_PANIC_TIMEOUT=86400 # CONFIG_SOFTLOCKUP_DETECTOR is not set CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y # CONFIG_HARDLOCKUP_DETECTOR is not set CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y # CONFIG_DETECT_HUNG_TASK is not set # CONFIG_WQ_WATCHDOG is not set # CONFIG_WQ_CPU_INTENSIVE_REPORT is not set # CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs # # Scheduler Debugging # CONFIG_SCHED_INFO=y CONFIG_SCHEDSTATS=y # end of Scheduler Debugging # CONFIG_DEBUG_PREEMPT is not set # CONFIG_DEBUG_ATOMIC is not set # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_PROVE_LOCKING is not set # CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set # CONFIG_DEBUG_RWSEMS is not set # CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_DEBUG_ATOMIC_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_LOCK_TORTURE_TEST is not set # CONFIG_WW_MUTEX_SELFTEST is not set # CONFIG_SCF_TORTURE_TEST is not set # CONFIG_CSD_LOCK_WAIT_DEBUG is not set # end of Lock Debugging (spinlocks, mutexes, etc...) CONFIG_NMI_CHECK_CPU=y # CONFIG_DEBUG_IRQFLAGS is not set CONFIG_STACKTRACE=y # CONFIG_DEBUG_KOBJECT is not set # # Debug kernel data structures # CONFIG_DEBUG_LIST=y CONFIG_DEBUG_PLIST=y # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set # CONFIG_DEBUG_MAPLE_TREE is not set # end of Debug kernel data structures # # RCU Debugging # # CONFIG_RCU_SCALE_TEST is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_REF_SCALE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=100 CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 # CONFIG_RCU_CPU_STALL_CPUTIME is not set # CONFIG_RCU_TRACE is not set # CONFIG_RCU_EQS_DEBUG is not set # end of RCU Debugging # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_NOP_TRACER=y CONFIG_HAVE_RETHOOK=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_HAVE_FTRACE_REGS_HAVING_PT_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_NO_PATCHABLE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_JMP=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_FENTRY=y CONFIG_HAVE_OBJTOOL_MCOUNT=y CONFIG_HAVE_OBJTOOL_NOP_MCOUNT=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACE_CLOCK=y CONFIG_RING_BUFFER=y CONFIG_EVENT_TRACING=y CONFIG_CONTEXT_SWITCH_TRACER=y CONFIG_TRACING=y CONFIG_GENERIC_TRACER=y CONFIG_TRACING_SUPPORT=y CONFIG_FTRACE=y CONFIG_TRACEFS_AUTOMOUNT_DEPRECATED=y # CONFIG_BOOTTIME_TRACING is not set # CONFIG_FUNCTION_TRACER is not set # CONFIG_STACK_TRACER is not set # CONFIG_IRQSOFF_TRACER is not set # CONFIG_PREEMPT_TRACER is not set # CONFIG_SCHED_TRACER is not set # CONFIG_HWLAT_TRACER is not set # CONFIG_OSNOISE_TRACER is not set # CONFIG_TIMERLAT_TRACER is not set # CONFIG_MMIOTRACE is not set # CONFIG_FTRACE_SYSCALLS is not set # CONFIG_TRACER_SNAPSHOT is not set CONFIG_BRANCH_PROFILE_NONE=y # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set CONFIG_BLK_DEV_IO_TRACE=y CONFIG_UPROBE_EVENTS=y CONFIG_EPROBE_EVENTS=y CONFIG_BPF_EVENTS=y CONFIG_DYNAMIC_EVENTS=y CONFIG_PROBE_EVENTS=y # CONFIG_SYNTH_EVENTS is not set # CONFIG_USER_EVENTS is not set # CONFIG_HIST_TRIGGERS is not set CONFIG_TRACE_EVENT_INJECT=y # CONFIG_TRACEPOINT_BENCHMARK is not set # CONFIG_RING_BUFFER_BENCHMARK is not set # CONFIG_TRACE_EVAL_MAP_FILE is not set # CONFIG_FTRACE_STARTUP_TEST is not set # CONFIG_RING_BUFFER_STARTUP_TEST is not set # CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set # CONFIG_PREEMPTIRQ_DELAY_TEST is not set # CONFIG_RV is not set CONFIG_PROVIDE_OHCI1394_DMA_INIT=y # CONFIG_SAMPLES is not set CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y # CONFIG_STRICT_DEVMEM is not set # # x86 Debugging # CONFIG_EARLY_PRINTK_USB=y CONFIG_X86_VERBOSE_BOOTUP=y CONFIG_EARLY_PRINTK=y CONFIG_EARLY_PRINTK_DBGP=y # CONFIG_EARLY_PRINTK_USB_XDBC is not set # CONFIG_DEBUG_TLBFLUSH is not set CONFIG_HAVE_MMIOTRACE_SUPPORT=y # CONFIG_X86_DECODER_SELFTEST is not set CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set # CONFIG_IO_DELAY_UDELAY is not set # CONFIG_IO_DELAY_NONE is not set CONFIG_DEBUG_BOOT_PARAMS=y # CONFIG_CPA_DEBUG is not set CONFIG_DEBUG_ENTRY=y # CONFIG_DEBUG_NMI_SELFTEST is not set CONFIG_X86_DEBUG_FPU=y # CONFIG_PUNIT_ATOM_DEBUG is not set CONFIG_UNWINDER_ORC=y # CONFIG_UNWINDER_FRAME_POINTER is not set # end of x86 Debugging # # Kernel Testing and Coverage # # CONFIG_KUNIT is not set # CONFIG_NOTIFIER_ERROR_INJECTION is not set CONFIG_FAULT_INJECTION=y CONFIG_FAILSLAB=y CONFIG_FAIL_PAGE_ALLOC=y CONFIG_FAULT_INJECTION_USERCOPY=y CONFIG_FAIL_MAKE_REQUEST=y CONFIG_FAIL_IO_TIMEOUT=y CONFIG_FAIL_FUTEX=y CONFIG_FAULT_INJECTION_DEBUG_FS=y # CONFIG_FAIL_MMC_REQUEST is not set # CONFIG_FAIL_SKB_REALLOC is not set CONFIG_FAULT_INJECTION_CONFIGFS=y # CONFIG_FAULT_INJECTION_STACKTRACE_FILTER is not set CONFIG_ARCH_HAS_KCOV=y CONFIG_KCOV=y CONFIG_KCOV_ENABLE_COMPARISONS=y CONFIG_KCOV_INSTRUMENT_ALL=y CONFIG_KCOV_IRQ_AREA_SIZE=0x40000 # CONFIG_KCOV_SELFTEST is not set CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_DHRY is not set # CONFIG_LKDTM is not set # CONFIG_TEST_DIV64 is not set # CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set # CONFIG_REED_SOLOMON_TEST is not set # CONFIG_INTERVAL_TREE_TEST is not set # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_TEST_HEXDUMP is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_XARRAY is not set # CONFIG_TEST_MAPLE_TREE is not set # CONFIG_TEST_RHASHTABLE is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_BPF is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set # CONFIG_CONTEXT_ANALYSIS_TEST is not set # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_KMOD is not set # CONFIG_TEST_KALLSYMS is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set # CONFIG_TEST_CLOCKSOURCE_WATCHDOG is not set # CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage # # Rust hacking # # end of Rust hacking # end of Kernel hacking CONFIG_IO_URING_ZCRX=y CONFIG_IO_URING_BPF=y |
| KernelRepo | git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git |
| ReproCID | 0 |
| ReproOpts | |
| ReproSyzID | 0 |
| SyzkallerCommit | 628666c62893a7468bcf1a68fc1129bbce02f74a |
The Kernel Concurrency Sanitizer (KCSAN) reported a data race between
`serial8250_do_startup()` and `serial8250_handle_irq_locked()` on the `up->ier`
field of `struct uart_8250_port`.
### Race Summary
- **Function A:** `serial8250_do_startup()` (Writer)
- **Function B:** `serial8250_handle_irq_locked()` (Reader)
- **Variable:** `up->ier` (Shadow Interrupt Enable Register)
- **Context:** `serial8250_do_startup()` is called during port opening to
initialize the UART. `serial8250_handle_irq_locked()` is called from the
interrupt handler (possibly due to a shared IRQ or a hardware quirk).
### Synchronization Context
`serial8250_do_startup()` performs a plain write to `up->ier` at line 2334
without holding the `port->lock`. Meanwhile, the interrupt handler (Thread B)
reads `up->ier` while holding the `port->lock`. Since the writer does not
acquire the lock, a concurrent read can see a stale or partially updated value.
### Final Classification: **BENIGN**
#### Reasoning:
1. **Shadow Register Initialization:** `up->ier` is a shadow register used to
track which interrupts are enabled in the hardware. In
`serial8250_do_startup()`, it is initialized to `UART_IER_RLSI | UART_IER_RDI`
(0x05).
2. **Hardware State:** At this point in `startup`, hardware interrupts are
still disabled (the hardware IER was cleared earlier in the function). The
actual hardware interrupt enablement happens later in `set_termios()`, which is
called after `startup` returns.
3. **Interrupt Source:** If the interrupt handler runs during `startup`, it is
likely due to a shared IRQ line being triggered by another device. The handler
reads `up->ier` to decide whether to process RX, TX, or modem status events for
this specific UART.
4. **Tolerant Logic:**
- If the reader sees the stale value (`0x00`), it will skip RX/TX/Modem
processing for this port. This is correct because the port is not yet fully
active and hardware interrupts are off.
- If the reader sees the new value (`0x05`), it might attempt to read
characters if the Line Status Register (LSR) indicates data is ready.
Reading data during startup is safe and often desirable to clear the FIFO.
- The bits for TX interrupts (`UART_IER_THRI`) and Modem Status interrupts
(`UART_IER_MSI`) are not set in either the old (0x00) or the new (0x05)
value at this stage, so those code paths are not affected by the race.
5. **Atomicity:** `up->ier` is an `unsigned char`. On x86 (and most
architectures), a 1-byte write is atomic, preventing "torn" reads.
### Recommended Annotations
To silence the KCSAN report and ensure compiler consistency, the access should
be marked:
- In `serial8250_do_startup()`: `WRITE_ONCE(up->ier, UART_IER_RLSI |
UART_IER_RDI);`
- In `serial8250_handle_irq_locked()`: Use `READ_ONCE(up->ier)` when checking
interrupt bits.
- Alternatively, wrap the assignment in `serial8250_do_startup()` with
`uart_port_lock_irqsave(port, &flags)`.================================================================== BUG: KCSAN: data-race in serial8250_do_startup / serial8250_handle_irq_locked write to 0xffffffff893ff4c6 of 1 bytes by task 26348 on cpu 1: serial8250_do_startup+0x1628/0x1d50 drivers/tty/serial/8250/8250_port.c:2334 serial8250_startup+0x41/0x50 drivers/tty/serial/8250/8250_port.c:2354 uart_port_startup drivers/tty/serial/serial_core.c:321 [inline] uart_startup+0x464/0xae0 drivers/tty/serial/serial_core.c:365 uart_port_activate+0x67/0xc0 drivers/tty/serial/serial_core.c:1949 tty_port_open+0x196/0x270 drivers/tty/tty_port.c:747 uart_open+0x30/0x40 drivers/tty/serial/serial_core.c:1929 tty_open+0x3d4/0xaf0 drivers/tty/tty_io.c:2137 chrdev_open+0x2eb/0x3a0 fs/char_dev.c:411 do_dentry_open+0x4ca/0xa90 fs/open.c:949 vfs_open+0x37/0x1e0 fs/open.c:1081 do_open fs/namei.c:4677 [inline] path_openat+0x1b70/0x2050 fs/namei.c:4836 do_file_open+0x16c/0x290 fs/namei.c:4865 do_sys_openat2+0x94/0x130 fs/open.c:1366 do_sys_open fs/open.c:1372 [inline] __do_sys_openat fs/open.c:1388 [inline] __se_sys_openat fs/open.c:1383 [inline] __x64_sys_openat+0xf2/0x120 fs/open.c:1383 x64_sys_call+0x1e39/0x3020 arch/x86/include/generated/asm/syscalls_64.h:258 do_syscall_x64 arch/x86/entry/syscall_64.c:63 [inline] do_syscall_64+0x12c/0x370 arch/x86/entry/syscall_64.c:94 entry_SYSCALL_64_after_hwframe+0x77/0x7f read to 0xffffffff893ff4c6 of 1 bytes by interrupt on cpu 0: serial8250_handle_irq_locked+0x354/0x420 drivers/tty/serial/8250/8250_port.c:1823 serial8250_handle_irq+0xad/0x280 drivers/tty/serial/8250/8250_port.c:1841 serial8250_default_handle_irq+0x8e/0x170 drivers/tty/serial/8250/8250_port.c:1855 serial8250_interrupt+0x63/0x130 drivers/tty/serial/8250/8250_core.c:86 __handle_irq_event_percpu+0x9c/0x4d0 kernel/irq/handle.c:209 handle_irq_event_percpu kernel/irq/handle.c:246 [inline] handle_irq_event+0x64/0xf0 kernel/irq/handle.c:263 handle_edge_irq+0x154/0x470 kernel/irq/chip.c:855 generic_handle_irq_desc include/linux/irqdesc.h:186 [inline] handle_irq arch/x86/kernel/irq.c:262 [inline] call_irq_handler arch/x86/kernel/irq.c:-1 [inline] __common_interrupt+0x60/0xb0 arch/x86/kernel/irq.c:333 common_interrupt+0x3e/0x90 arch/x86/kernel/irq.c:326 asm_common_interrupt+0x26/0x40 arch/x86/include/asm/idtentry.h:688 value changed: 0x00 -> 0x05 Reported by Kernel Concurrency Sanitizer on: CPU: 0 UID: 0 PID: 23268 Comm: syz-executor Tainted: G W syzkaller #0 PREEMPT(full) Tainted: [W]=WARN Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 03/18/2026 ==================================================================
| Seq | Timestamp | Type | Name | Duration |
|---|---|---|---|---|
| 0/0 | 2026/04/07 13:18 | flow | assessment-kcsan |
19mResults:map[Benign:true Confident:true Explanation:The Kernel Concurrency Sanitizer (KCSAN) reported a data race between
`serial8250_do_startup()` and `serial8250_handle_irq_locked()` on the `up->ier`
field of `struct uart_8250_port`.
### Race Summary
- **Function A:** `serial8250_do_startup()` (Writer)
- **Function B:** `serial8250_handle_irq_locked()` (Reader)
- **Variable:** `up->ier` (Shadow Interrupt Enable Register)
- **Context:** `serial8250_do_startup()` is called during port opening to
initialize the UART. `serial8250_handle_irq_locked()` is called from the
interrupt handler (possibly due to a shared IRQ or a hardware quirk).
### Synchronization Context
`serial8250_do_startup()` performs a plain write to `up->ier` at line 2334
without holding the `port->lock`. Meanwhile, the interrupt handler (Thread B)
reads `up->ier` while holding the `port->lock`. Since the writer does not
acquire the lock, a concurrent read can see a stale or partially updated value.
### Final Classification: **BENIGN**
#### Reasoning:
1. **Shadow Register Initialization:** `up->ier` is a shadow register used to
track which interrupts are enabled in the hardware. In
`serial8250_do_startup()`, it is initialized to `UART_IER_RLSI | UART_IER_RDI`
(0x05).
2. **Hardware State:** At this point in `startup`, hardware interrupts are
still disabled (the hardware IER was cleared earlier in the function). The
actual hardware interrupt enablement happens later in `set_termios()`, which is
called after `startup` returns.
3. **Interrupt Source:** If the interrupt handler runs during `startup`, it is
likely due to a shared IRQ line being triggered by another device. The handler
reads `up->ier` to decide whether to process RX, TX, or modem status events for
this specific UART.
4. **Tolerant Logic:**
- If the reader sees the stale value (`0x00`), it will skip RX/TX/Modem
processing for this port. This is correct because the port is not yet fully
active and hardware interrupts are off.
- If the reader sees the new value (`0x05`), it might attempt to read
characters if the Line Status Register (LSR) indicates data is ready.
Reading data during startup is safe and often desirable to clear the FIFO.
- The bits for TX interrupts (`UART_IER_THRI`) and Modem Status interrupts
(`UART_IER_MSI`) are not set in either the old (0x00) or the new (0x05)
value at this stage, so those code paths are not affected by the race.
5. **Atomicity:** `up->ier` is an `unsigned char`. On x86 (and most
architectures), a 1-byte write is atomic, preventing "torn" reads.
### Recommended Annotations
To silence the KCSAN report and ensure compiler consistency, the access should
be marked:
- In `serial8250_do_startup()`: `WRITE_ONCE(up->ier, UART_IER_RLSI |
UART_IER_RDI);`
- In `serial8250_handle_irq_locked()`: Use `READ_ONCE(up->ier)` when checking
interrupt bits.
- Alternatively, wrap the assignment in `serial8250_do_startup()` with
`uart_port_lock_irqsave(port, &flags)`.] |
| 1/1 | 2026/04/07 13:18 | action | kernel-checkouter |
1mResults:map[KernelSrc:/app/workdir/cache/src/de2829276ac4973ff7bb50d225da160402a31231] |
| 2/1 | 2026/04/07 13:19 | action | kernel-builder |
8mResults:map[KernelObj:/app/workdir/cache/build/06092afd896eff1a64d01b734e354fc8b1ca5cac] |
| 3/1 | 2026/04/07 13:28 | action | codesearch-prepare |
7mResults:map[Index:codesearch-index] |
| 4/1 | 2026/04/07 13:35 | agent | expert |
1mModel:gemini-3-flash-preview Results: map[Benign:true Confident:true] Instruction: # KCSAN Data Race Severity Analysis Protocol
You are an expert Linux kernel concurrency engineer analyzing a Kernel
Concurrency Sanitizer (KCSAN) data race report to determine if it is
**BENIGN** or **HARMFUL**.
## 1. CLASSIFICATIONS
### **BENIGN (Truly Benign)**
The logic is sound and structurally tolerant to compiler optimizations or
stale/torn reads.
- **Diagnostics/Stats:** Reads used only for '/proc', '/sys', counters, or
'pr_info'.
- **Heuristic Hints:** A "hint" flag where an old value only causes a
slightly delayed update or a sub-optimal but safe fast-path.
- **Single-Writer Flag Updates:** A single writer updating flags where the
concurrent read is a simple bitwise check (e.g., 'flags & MASK'). These are
historically tolerated, assuming neither "Fused Accesses" nor "Ordering
Violations" are relevant in this context.
- **Marked Reloads:** A load feeding into a 'cmpxchg()' loop or checked
against a later 'READ_ONCE()' reload.
- **Safe Overwrites:** Writing the same value already present.
### **HARMFUL (Logic Bug or Marking Required)**
The race causes incorrect behavior due to a synchronization failure or
because missing annotations allow the compiler to break the algorithm.
**Marking Required for Correctness:**
The algorithm is logically sound but requires annotations ('READ_ONCE()',
'WRITE_ONCE()', 'smp_load_acquire()', 'smp_store_release()', etc.) to be safe.
- **Fused Accesses:** The compiler might merge accesses or hoist a load out
of a loop, breaking polling/wait loops (livelocks).
- **Torn Accesses:** A large access (e.g., 64-bit on 32-bit arch) might be
split into multiple non-atomic accesses. Note that 'READ_ONCE()' does **not**
guarantee atomicity for 64-bit variables on 32-bit architectures.
- **Ordering Violations:** The race breaks a "happens-before" relationship
(requires primitives with implied or explicit memory barriers).
**Logic Bugs:**
A fundamental synchronization failure. Marking accesses will **not** fix it;
the logic itself must change.
- **Pointers/Lifecycle:** The racing variable is a pointer being dereferenced
or a refcount governing object lifecycle (Use-After-Free risk).
- **Control Flow:** The variable guards a critical section, memory allocation,
or hardware command.
- **Bitfields:** Concurrent writes to different bits in the same word.
Compilers often use non-atomic read-modify-write sequences, meaning a
write to 'bit_A' can "clobber" a concurrent write to 'bit_B'. However,
do not blindly assume all bitfield accesses are harmful; you must prove
that a concurrent write actually clobbers another in a way that breaks
logic.
- **Complex Structures:** Races on shared lists, trees, or hashmaps.
- **Lossy Updates:** Concurrent plain RMW operations (e.g., 'var++') on
non-diagnostic variables where every increment must be preserved.
- **State Machines:** Races allowing a state machine to bypass transitions
or enter an invalid state.
- **Adjacent Unsynchronized Operations:** Consider races happening at the
same time. For example, if both threads execute 'struct->has_elements = true;
list_add(node, &struct->list);', the race on 'has_elements' implies an
adjacent race on 'list_head', which is HARMFUL.
## 2. RESEARCH & ANALYSIS WORKFLOW
1. **Locate the Race:** Find the exact variables and functions in the stack
traces. **Use codesearch tools to read the actual source code and
confirm all assumptions.** Do not speculate about hypothetical compiler
behaviors or theoretical dangers (e.g., dismissing something as
"fundamentally unsafe") without tracing the actual data flow to a crash.
2. **Contextualize:** Identify held locks, RCU sections, or interrupt
contexts. Explain why the race is possible (e.g., "Thread A holds 'lock',
but Thread B is a lockless reader").
3. **Data Flow:** Follow the racing variable into its subsequent uses. If
the reader sees a stale or torn value, what branch is taken? Does it lead
to a pointer dereference or 'BUG_ON()'? **You must prove harm via this
data flow.**
4. **Failure Sequencing (if HARMFUL):** Construct a two-column execution trace
demonstrating the failure.
*Example format:*
CPU0 CPU1
function_a()
// lockless read
ptr = global_ptr
<PREEMPT>
function_b()
lock(&my_lock)
global_ptr = NULL
unlock(&my_lock)
kfree(ptr)
if (ptr)
*ptr = 1; // -> Use-After-Free!
## 3. OUTPUT FORMAT
- **Race Summary:** '[Function A]' vs '[Function B]' on '[Variable/Field]'.
- **Synchronization context:** List held locks and explain the lack of mutual
exclusion.
- **Final Classification:** **BENIGN** or **HARMFUL**.
**If BENIGN:**
- **Reasoning:** Briefly explain why the race is structurally tolerant to stale
or torn reads.
- **Recommended Annotations:** Suggest appropriate annotations (e.g.,
'READ_ONCE()', 'data_race()').
**If HARMFUL:**
- **Failure Reasoning:** Explain and provide a two-column interleaving showing
exactly how the race leads to a failure such as corruption or kernel crash.
- **Recommended Fix (ONLY if fix is trivial):** Suggest a structural fix (e.g.,
"Hold 'mapping->i_pages' lock", "Convert to 'atomic_t'") or required memory
ordering annotations (e.g., "Wrap in 'READ_ONCE()'", "Use
'smp_load_acquire()'").
Prefer calling several tools at the same time to save round-trips.
Use set-results tool to provide results of the analysis.
It must be called exactly once before the final reply.
Ignore results of this tool.
Prompt: The data race report is: ================================================================== BUG: KCSAN: data-race in serial8250_do_startup / serial8250_handle_irq_locked write to 0xffffffff893ff4c6 of 1 bytes by task 26348 on cpu 1: serial8250_do_startup+0x1628/0x1d50 drivers/tty/serial/8250/8250_port.c:2334 serial8250_startup+0x41/0x50 drivers/tty/serial/8250/8250_port.c:2354 uart_port_startup drivers/tty/serial/serial_core.c:321 [inline] uart_startup+0x464/0xae0 drivers/tty/serial/serial_core.c:365 uart_port_activate+0x67/0xc0 drivers/tty/serial/serial_core.c:1949 tty_port_open+0x196/0x270 drivers/tty/tty_port.c:747 uart_open+0x30/0x40 drivers/tty/serial/serial_core.c:1929 tty_open+0x3d4/0xaf0 drivers/tty/tty_io.c:2137 chrdev_open+0x2eb/0x3a0 fs/char_dev.c:411 do_dentry_open+0x4ca/0xa90 fs/open.c:949 vfs_open+0x37/0x1e0 fs/open.c:1081 do_open fs/namei.c:4677 [inline] path_openat+0x1b70/0x2050 fs/namei.c:4836 do_file_open+0x16c/0x290 fs/namei.c:4865 do_sys_openat2+0x94/0x130 fs/open.c:1366 do_sys_open fs/open.c:1372 [inline] __do_sys_openat fs/open.c:1388 [inline] __se_sys_openat fs/open.c:1383 [inline] __x64_sys_openat+0xf2/0x120 fs/open.c:1383 x64_sys_call+0x1e39/0x3020 arch/x86/include/generated/asm/syscalls_64.h:258 do_syscall_x64 arch/x86/entry/syscall_64.c:63 [inline] do_syscall_64+0x12c/0x370 arch/x86/entry/syscall_64.c:94 entry_SYSCALL_64_after_hwframe+0x77/0x7f read to 0xffffffff893ff4c6 of 1 bytes by interrupt on cpu 0: serial8250_handle_irq_locked+0x354/0x420 drivers/tty/serial/8250/8250_port.c:1823 serial8250_handle_irq+0xad/0x280 drivers/tty/serial/8250/8250_port.c:1841 serial8250_default_handle_irq+0x8e/0x170 drivers/tty/serial/8250/8250_port.c:1855 serial8250_interrupt+0x63/0x130 drivers/tty/serial/8250/8250_core.c:86 __handle_irq_event_percpu+0x9c/0x4d0 kernel/irq/handle.c:209 handle_irq_event_percpu kernel/irq/handle.c:246 [inline] handle_irq_event+0x64/0xf0 kernel/irq/handle.c:263 handle_edge_irq+0x154/0x470 kernel/irq/chip.c:855 generic_handle_irq_desc include/linux/irqdesc.h:186 [inline] handle_irq arch/x86/kernel/irq.c:262 [inline] call_irq_handler arch/x86/kernel/irq.c:-1 [inline] __common_interrupt+0x60/0xb0 arch/x86/kernel/irq.c:333 common_interrupt+0x3e/0x90 arch/x86/kernel/irq.c:326 asm_common_interrupt+0x26/0x40 arch/x86/include/asm/idtentry.h:688 value changed: 0x00 -> 0x05 Reported by Kernel Concurrency Sanitizer on: CPU: 0 UID: 0 PID: 23268 Comm: syz-executor Tainted: G W syzkaller #0 PREEMPT(full) Tainted: [W]=WARN Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 03/18/2026 ================================================================== Reply: The Kernel Concurrency Sanitizer (KCSAN) reported a data race between `serial8250_do_startup()` and `serial8250_handle_irq_locked()` on the `up->ier` field of `struct uart_8250_port`.
### Race Summary
- **Function A:** `serial8250_do_startup()` (Writer)
- **Function B:** `serial8250_handle_irq_locked()` (Reader)
- **Variable:** `up->ier` (Shadow Interrupt Enable Register)
- **Context:** `serial8250_do_startup()` is called during port opening to initialize the UART. `serial8250_handle_irq_locked()` is called from the interrupt handler (possibly due to a shared IRQ or a hardware quirk).
### Synchronization Context
`serial8250_do_startup()` performs a plain write to `up->ier` at line 2334 without holding the `port->lock`. Meanwhile, the interrupt handler (Thread B) reads `up->ier` while holding the `port->lock`. Since the writer does not acquire the lock, a concurrent read can see a stale or partially updated value.
### Final Classification: **BENIGN**
#### Reasoning:
1. **Shadow Register Initialization:** `up->ier` is a shadow register used to track which interrupts are enabled in the hardware. In `serial8250_do_startup()`, it is initialized to `UART_IER_RLSI | UART_IER_RDI` (0x05).
2. **Hardware State:** At this point in `startup`, hardware interrupts are still disabled (the hardware IER was cleared earlier in the function). The actual hardware interrupt enablement happens later in `set_termios()`, which is called after `startup` returns.
3. **Interrupt Source:** If the interrupt handler runs during `startup`, it is likely due to a shared IRQ line being triggered by another device. The handler reads `up->ier` to decide whether to process RX, TX, or modem status events for this specific UART.
4. **Tolerant Logic:**
- If the reader sees the stale value (`0x00`), it will skip RX/TX/Modem processing for this port. This is correct because the port is not yet fully active and hardware interrupts are off.
- If the reader sees the new value (`0x05`), it might attempt to read characters if the Line Status Register (LSR) indicates data is ready. Reading data during startup is safe and often desirable to clear the FIFO.
- The bits for TX interrupts (`UART_IER_THRI`) and Modem Status interrupts (`UART_IER_MSI`) are not set in either the old (0x00) or the new (0x05) value at this stage, so those code paths are not affected by the race.
5. **Atomicity:** `up->ier` is an `unsigned char`. On x86 (and most architectures), a 1-byte write is atomic, preventing "torn" reads.
### Recommended Annotations
To silence the KCSAN report and ensure compiler consistency, the access should be marked:
- In `serial8250_do_startup()`: `WRITE_ONCE(up->ier, UART_IER_RLSI | UART_IER_RDI);`
- In `serial8250_handle_irq_locked()`: Use `READ_ONCE(up->ier)` when checking interrupt bits.
- Alternatively, wrap the assignment in `serial8250_do_startup()` with `uart_port_lock_irqsave(port, &flags)`. |
| 5/2 | 2026/04/07 13:35 | llm | expert |
0mModel:gemini-3-flash-preview Tokens: input: 5338 output: 34 thoughts: 182 Thoughts: **Data Race Investigation: 8250 Serial Driver** Okay, so the report flags a data race. My initial thought is, let's dissect this. Specifically, we have a write operation in `serial8250_do_startup` and a read in `serial8250_handle_irq_locked`, both targeting the same 1-byte variable at `0xffffffff893ff4c6`. The value transitioned from `0x00` to `0x05`, which is helpful. Now, my next step is clear: pinpoint the variable and the exact code paths involved. The report conveniently provides the function locations: `serial8250_do_startup` is at `drivers/tty/serial/8250/8250_port.c:2334` and `serial8250_handle_irq_locked` is at `drivers/tty/serial/8250/8250_port.c:1823`. Excellent. I'll begin by examining those code snippets to understand the access patterns and data flow. This is where I begin the analysis. |
| 6/2 | 2026/04/07 13:35 | tool | read-file |
0mArgs:map[File:drivers/tty/serial/8250/8250_port.c] Results: map[Contents:// SPDX-License-Identifier: GPL-2.0+
/*
* Base port operations for 8250/16550-type serial ports
*
* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
* Split from 8250_core.c, Copyright (C) 2001 Russell King.
*
* A note about mapbase / membase
*
* mapbase is the physical address of the IO port.
* membase is an 'ioremapped' cookie.
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/console.h>
#include <linux/gpio/consumer.h>
#include <linux/lockdep.h>
#include <linux/sysrq.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/tty.h>
#include <linux/ratelimit.h>
#include <linux/tty_flip.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/nmi.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/pm_runtime.h>
#include <linux/ktime.h>
#include <asm/io.h>
#include <asm/irq.h>
#include "8250.h"
/*
* Here we define the default xmit fifo size used for each type of UART.
*/
static const struct serial8250_config uart_config[] = {
[PORT_UNKNOWN] = {
.name = "unknown",
.fifo_size = 1,
.tx_loadsz = 1,
},
[PORT_8250] = {
.name = "8250",
.fifo_size = 1,
.tx_loadsz = 1,
},
[PORT_16450] = {
.name = "16450",
.fifo_size = 1,
.tx_loadsz = 1,
},
[PORT_16550] = {
.name = "16550",
.fifo_size = 1,
.tx_loadsz = 1,
},
[PORT_16550A] = {
.name = "16550A",
.fifo_size = 16,
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO,
},
[PORT_CIRRUS] = {
.name = "Cirrus",
.fifo_size = 1,
.tx_loadsz = 1,
},
[PORT_16650] = {
.name = "ST16650",
.fifo_size = 1,
.tx_loadsz = 1,
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
},
[PORT_16650V2] = {
.name = "ST16650V2",
.fifo_size = 32,
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
UART_FCR_T_TRIG_00,
.rxtrig_bytes = {8, 16, 24, 28},
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
},
[PORT_16750] = {
.name = "TI16750",
.fifo_size = 64,
.tx_loadsz = 64,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
UART_FCR7_64BYTE,
.rxtrig_bytes = {1, 16, 32, 56},
.flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
},
[PORT_STARTECH] = {
.name = "Startech",
.fifo_size = 1,
.tx_loadsz = 1,
},
[PORT_16C950] = {
.name = "16C950/954",
.fifo_size = 128,
.tx_loadsz = 128,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
.rxtrig_bytes = {16, 32, 112, 120},
/* UART_CAP_EFR breaks billionon CF bluetooth card. */
.flags = UART_CAP_FIFO | UART_CAP_SLEEP,
},
[PORT_16654] = {
.name = "ST16654",
.fifo_size = 64,
.tx_loadsz = 32,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
UART_FCR_T_TRIG_10,
.rxtrig_bytes = {8, 16, 56, 60},
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
},
[PORT_16850] = {
.name = "XR16850",
.fifo_size = 128,
.tx_loadsz = 128,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
},
[PORT_RSA] = {
.name = "RSA",
.fifo_size = 2048,
.tx_loadsz = 2048,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
.flags = UART_CAP_FIFO,
},
[PORT_NS16550A] = {
.name = "NS16550A",
.fifo_size = 16,
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_NATSEMI,
},
[PORT_XSCALE] = {
.name = "XScale",
.fifo_size = 32,
.tx_loadsz = 32,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
},
[PORT_OCTEON] = {
.name = "OCTEON",
.fifo_size = 64,
.tx_loadsz = 64,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO,
},
[PORT_U6_16550A] = {
.name = "U6_16550A",
.fifo_size = 64,
.tx_loadsz = 64,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
[PORT_TEGRA] = {
.name = "Tegra",
.fifo_size = 32,
.tx_loadsz = 8,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
UART_FCR_T_TRIG_01,
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO | UART_CAP_RTOIE,
},
[PORT_XR17D15X] = {
.name = "XR17D15X",
.fifo_size = 64,
.tx_loadsz = 64,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
UART_CAP_SLEEP,
},
[PORT_XR17V35X] = {
.name = "XR17V35X",
.fifo_size = 256,
.tx_loadsz = 256,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
UART_FCR_T_TRIG_11,
.flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
UART_CAP_SLEEP,
},
[PORT_LPC3220] = {
.name = "LPC3220",
.fifo_size = 64,
.tx_loadsz = 32,
.fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
.flags = UART_CAP_FIFO,
},
[PORT_BRCM_TRUMANAGE] = {
.name = "TruManage",
.fifo_size = 1,
.tx_loadsz = 1024,
.flags = UART_CAP_HFIFO,
},
[PORT_8250_CIR] = {
.name = "CIR port"
},
[PORT_ALTR_16550_F32] = {
.name = "Altera 16550 FIFO32",
.fifo_size = 32,
.tx_loadsz = 32,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.rxtrig_bytes = {1, 8, 16, 30},
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
[PORT_ALTR_16550_F64] = {
.name = "Altera 16550 FIFO64",
.fifo_size = 64,
.tx_loadsz = 64,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.rxtrig_bytes = {1, 16, 32, 62},
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
[PORT_ALTR_16550_F128] = {
.name = "Altera 16550 FIFO128",
.fifo_size = 128,
.tx_loadsz = 128,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.rxtrig_bytes = {1, 32, 64, 126},
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
/*
* tx_loadsz is set to 63-bytes instead of 64-bytes to implement
* workaround of errata A-008006 which states that tx_loadsz should
* be configured less than Maximum supported fifo bytes.
*/
[PORT_16550A_FSL64] = {
.name = "16550A_FSL64",
.fifo_size = 64,
.tx_loadsz = 63,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
UART_FCR7_64BYTE,
.flags = UART_CAP_FIFO | UART_CAP_NOTEMT,
},
[PORT_RT2880] = {
.name = "Palmchip BK-3103",
.fifo_size = 16,
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO,
},
[PORT_DA830] = {
.name = "TI DA8xx/66AK2x",
.fifo_size = 16,
.tx_loadsz = 16,
.fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
UART_FCR_R_TRIG_10,
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
[PORT_MTK_BTIF] = {
.name = "MediaTek BTIF",
.fifo_size = 16,
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO |
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
.flags = UART_CAP_FIFO,
},
[PORT_NPCM] = {
.name = "Nuvoton 16550",
.fifo_size = 16,
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO,
},
[PORT_SUNIX] = {
.name = "Sunix",
.fifo_size = 128,
.tx_loadsz = 128,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.rxtrig_bytes = {1, 32, 64, 112},
.flags = UART_CAP_FIFO | UART_CAP_SLEEP,
},
[PORT_ASPEED_VUART] = {
.name = "ASPEED VUART",
.fifo_size = 16,
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO,
},
[PORT_MCHP16550A] = {
.name = "MCHP16550A",
.fifo_size = 256,
.tx_loadsz = 256,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
.rxtrig_bytes = {2, 66, 130, 194},
.flags = UART_CAP_FIFO,
},
[PORT_BCM7271] = {
.name = "Broadcom BCM7271 UART",
.fifo_size = 32,
.tx_loadsz = 32,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
.rxtrig_bytes = {1, 8, 16, 30},
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
};
/* Uart divisor latch read */
static u32 default_serial_dl_read(struct uart_8250_port *up)
{
/* Assign these in pieces to truncate any bits above 7. */
unsigned char dll = serial_in(up, UART_DLL);
unsigned char dlm = serial_in(up, UART_DLM);
return dll | dlm << 8;
}
/* Uart divisor latch write */
static void default_serial_dl_write(struct uart_8250_port *up, u32 value)
{
serial_out(up, UART_DLL, value & 0xff);
serial_out(up, UART_DLM, value >> 8 & 0xff);
}
#ifdef CONFIG_HAS_IOPORT
static u32 hub6_serial_in(struct uart_port *p, unsigned int offset)
{
offset = offset << p->regshift;
outb(p->hub6 - 1 + offset, p->iobase);
return inb(p->iobase + 1);
}
static void hub6_serial_out(struct uart_port *p, unsigned int offset, u32 value)
{
offset = offset << p->regshift;
outb(p->hub6 - 1 + offset, p->iobase);
outb(value, p->iobase + 1);
}
#endif /* CONFIG_HAS_IOPORT */
static u32 mem_serial_in(struct uart_port *p, unsigned int offset)
{
offset = offset << p->regshift;
return readb(p->membase + offset);
}
static void mem_serial_out(struct uart_port *p, unsigned int offset, u32 value)
{
offset = offset << p->regshift;
writeb(value, p->membase + offset);
}
static void mem16_serial_out(struct uart_port *p, unsigned int offset, u32 value)
{
offset = offset << p->regshift;
writew(value, p->membase + offset);
}
static u32 mem16_serial_in(struct uart_port *p, unsigned int offset)
{
offset = offset << p->regshift;
return readw(p->membase + offset);
}
static void mem32_serial_out(struct uart_port *p, unsigned int offset, u32 value)
{
offset = offset << p->regshift;
writel(value, p->membase + offset);
}
static u32 mem32_serial_in(struct uart_port *p, unsigned int offset)
{
offset = offset << p->regshift;
return readl(p->membase + offset);
}
static void mem32be_serial_out(struct uart_port *p, unsigned int offset, u32 value)
{
offset = offset << p->regshift;
iowrite32be(value, p->membase + offset);
}
static u32 mem32be_serial_in(struct uart_port *p, unsigned int offset)
{
offset = offset << p->regshift;
return ioread32be(p->membase + offset);
}
#ifdef CONFIG_HAS_IOPORT
static u32 io_serial_in(struct uart_port *p, unsigned int offset)
{
offset = offset << p->regshift;
return inb(p->iobase + offset);
}
static void io_serial_out(struct uart_port *p, unsigned int offset, u32 value)
{
offset = offset << p->regshift;
outb(value, p->iobase + offset);
}
#endif
static u32 no_serial_in(struct uart_port *p, unsigned int offset)
{
return ~0U;
}
static void no_serial_out(struct uart_port *p, unsigned int offset, u32 value)
{
}
static int serial8250_default_handle_irq(struct uart_port *port);
static void set_io_from_upio(struct uart_port *p)
{
struct uart_8250_port *up = up_to_u8250p(p);
up->dl_read = default_serial_dl_read;
up->dl_write = default_serial_dl_write;
switch (p->iotype) {
#ifdef CONFIG_HAS_IOPORT
case UPIO_HUB6:
p->serial_in = hub6_serial_in;
p->serial_out = hub6_serial_out;
break;
#endif
case UPIO_MEM:
p->serial_in = mem_serial_in;
p->serial_out = mem_serial_out;
break;
case UPIO_MEM16:
p->serial_in = mem16_serial_in;
p->serial_out = mem16_serial_out;
break;
case UPIO_MEM32:
p->serial_in = mem32_serial_in;
p->serial_out = mem32_serial_out;
break;
case UPIO_MEM32BE:
p->serial_in = mem32be_serial_in;
p->serial_out = mem32be_serial_out;
break;
#ifdef CONFIG_HAS_IOPORT
case UPIO_PORT:
p->serial_in = io_serial_in;
p->serial_out = io_serial_out;
break;
#endif
default:
WARN(p->iotype != UPIO_PORT || p->iobase,
"Unsupported UART type %x\n", p->iotype);
p->serial_in = no_serial_in;
p->serial_out = no_serial_out;
}
/* Remember loaded iotype */
up->cur_iotype = p->iotype;
p->handle_irq = serial8250_default_handle_irq;
}
static void
serial_port_out_sync(struct uart_port *p, int offset, int value)
{
switch (p->iotype) {
case UPIO_MEM:
case UPIO_MEM16:
case UPIO_MEM32:
case UPIO_MEM32BE:
case UPIO_AU:
p->serial_out(p, offset, value);
p->serial_in(p, UART_LCR); /* safe, no side-effects */
break;
default:
p->serial_out(p, offset, value);
}
}
/*
* FIFO support.
*/
void serial8250_clear_fifos(struct uart_8250_port *p)
{
if (p->capabilities & UART_CAP_FIFO) {
serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
serial_out(p, UART_FCR, 0);
}
}
EXPORT_SYMBOL_NS_GPL(serial8250_clear_fifos, "SERIAL_8250");
static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t);
static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer *t);
void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
{
serial8250_clear_fifos(p);
serial_out(p, UART_FCR, p->fcr);
}
EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
void serial8250_rpm_get(struct uart_8250_port *p)
{
if (!(p->capabilities & UART_CAP_RPM))
return;
pm_runtime_get_sync(p->port.dev);
}
EXPORT_SYMBOL_GPL(serial8250_rpm_get);
void serial8250_rpm_put(struct uart_8250_port *p)
{
if (!(p->capabilities & UART_CAP_RPM))
return;
pm_runtime_mark_last_busy(p->port.dev);
pm_runtime_put_autosuspend(p->port.dev);
}
EXPORT_SYMBOL_GPL(serial8250_rpm_put);
/**
* serial8250_em485_init() - put uart_8250_port into rs485 emulating
* @p: uart_8250_port port instance
*
* The function is used to start rs485 software emulating on the
* &struct uart_8250_port* @p. Namely, RTS is switched before/after
* transmission. The function is idempotent, so it is safe to call it
* multiple times.
*
* The caller MUST enable interrupt on empty shift register before
* calling serial8250_em485_init(). This interrupt is not a part of
* 8250 standard, but implementation defined.
*
* The function is supposed to be called from .rs485_config callback
* or from any other callback protected with p->port.lock spinlock.
*
* See also serial8250_em485_destroy()
*
* Return 0 - success, -errno - otherwise
*/
static int serial8250_em485_init(struct uart_8250_port *p)
{
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&p->port.lock);
if (p->em485)
goto deassert_rts;
p->em485 = kmalloc_obj(struct uart_8250_em485, GFP_ATOMIC);
if (!p->em485)
return -ENOMEM;
hrtimer_setup(&p->em485->stop_tx_timer, &serial8250_em485_handle_stop_tx, CLOCK_MONOTONIC,
HRTIMER_MODE_REL);
hrtimer_setup(&p->em485->start_tx_timer, &serial8250_em485_handle_start_tx, CLOCK_MONOTONIC,
HRTIMER_MODE_REL);
p->em485->port = p;
p->em485->active_timer = NULL;
p->em485->tx_stopped = true;
deassert_rts:
if (p->em485->tx_stopped)
p->rs485_stop_tx(p, true);
return 0;
}
/**
* serial8250_em485_destroy() - put uart_8250_port into normal state
* @p: uart_8250_port port instance
*
* The function is used to stop rs485 software emulating on the
* &struct uart_8250_port* @p. The function is idempotent, so it is safe to
* call it multiple times.
*
* The function is supposed to be called from .rs485_config callback
* or from any other callback protected with p->port.lock spinlock.
*
* See also serial8250_em485_init()
*/
void serial8250_em485_destroy(struct uart_8250_port *p)
{
if (!p->em485)
return;
hrtimer_cancel(&p->em485->start_tx_timer);
hrtimer_cancel(&p->em485->stop_tx_timer);
kfree(p->em485);
p->em485 = NULL;
}
EXPORT_SYMBOL_GPL(serial8250_em485_destroy);
struct serial_rs485 serial8250_em485_supported = {
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND |
SER_RS485_TERMINATE_BUS | SER_RS485_RX_DURING_TX,
.delay_rts_before_send = 1,
.delay_rts_after_send = 1,
};
EXPORT_SYMBOL_GPL(serial8250_em485_supported);
/**
* serial8250_em485_config() - generic ->rs485_config() callback
* @port: uart port
* @termios: termios structure
* @rs485: rs485 settings
*
* Generic callback usable by 8250 uart drivers to activate rs485 settings
* if the uart is incapable of driving RTS as a Transmit Enable signal in
* hardware, relying on software emulation instead.
*/
int serial8250_em485_config(struct uart_port *port, struct ktermios *termios,
struct serial_rs485 *rs485)
{
struct uart_8250_port *up = up_to_u8250p(port);
/*
* Both serial8250_em485_init() and serial8250_em485_destroy()
* are idempotent.
*/
if (rs485->flags & SER_RS485_ENABLED)
return serial8250_em485_init(up);
serial8250_em485_destroy(up);
return 0;
}
EXPORT_SYMBOL_GPL(serial8250_em485_config);
/*
* These two wrappers ensure that enable_runtime_pm_tx() can be called more than
* once and disable_runtime_pm_tx() will still disable RPM because the fifo is
* empty and the HW can idle again.
*/
static void serial8250_rpm_get_tx(struct uart_8250_port *p)
{
unsigned char rpm_active;
if (!(p->capabilities & UART_CAP_RPM))
return;
rpm_active = xchg(&p->rpm_tx_active, 1);
if (rpm_active)
return;
pm_runtime_get_sync(p->port.dev);
}
static void serial8250_rpm_put_tx(struct uart_8250_port *p)
{
unsigned char rpm_active;
if (!(p->capabilities & UART_CAP_RPM))
return;
rpm_active = xchg(&p->rpm_tx_active, 0);
if (!rpm_active)
return;
pm_runtime_mark_last_busy(p->port.dev);
pm_runtime_put_autosuspend(p->port.dev);
}
/*
* IER sleep support. UARTs which have EFRs need the "extended
* capability" bit enabled. Note that on XR16C850s, we need to
* reset LCR to write to IER.
*/
static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
{
unsigned char lcr = 0, efr = 0;
guard(serial8250_rpm)(p);
if (!(p->capabilities & UART_CAP_SLEEP))
return;
/* Synchronize UART_IER access against the console. */
guard(uart_port_lock_irq)(&p->port);
if (p->capabilities & UART_CAP_EFR) {
lcr = serial_in(p, UART_LCR);
efr = serial_in(p, UART_EFR);
serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
serial_out(p, UART_EFR, UART_EFR_ECB);
serial_out(p, UART_LCR, 0);
}
serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
if (p->capabilities & UART_CAP_EFR) {
serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
serial_out(p, UART_EFR, efr);
serial_out(p, UART_LCR, lcr);
}
}
/* Clear the interrupt registers. */
static void serial8250_clear_interrupts(struct uart_port *port)
{
serial_port_in(port, UART_LSR);
serial_port_in(port, UART_RX);
serial_port_in(port, UART_IIR);
serial_port_in(port, UART_MSR);
}
static void serial8250_clear_IER(struct uart_8250_port *up)
{
if (up->capabilities & UART_CAP_UUE)
serial_out(up, UART_IER, UART_IER_UUE);
else
serial_out(up, UART_IER, 0);
}
/*
* This is a quickie test to see how big the FIFO is.
* It doesn't work at all the time, more's the pity.
*/
static int size_fifo(struct uart_8250_port *up)
{
unsigned char old_fcr, old_mcr, old_lcr;
u32 old_dl;
int count;
old_lcr = serial_in(up, UART_LCR);
serial_out(up, UART_LCR, 0);
old_fcr = serial_in(up, UART_FCR);
old_mcr = serial8250_in_MCR(up);
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
serial8250_out_MCR(up, UART_MCR_LOOP);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
old_dl = serial_dl_read(up);
serial_dl_write(up, 0x0001);
serial_out(up, UART_LCR, UART_LCR_WLEN8);
for (count = 0; count < 256; count++)
serial_out(up, UART_TX, count);
mdelay(20);/* FIXME - schedule_timeout */
for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
(count < 256); count++)
serial_in(up, UART_RX);
serial_out(up, UART_FCR, old_fcr);
serial8250_out_MCR(up, old_mcr);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
serial_dl_write(up, old_dl);
serial_out(up, UART_LCR, old_lcr);
return count;
}
/*
* Read UART ID using the divisor method - set DLL and DLM to zero
* and the revision will be in DLL and device type in DLM. We
* preserve the device state across this.
*/
static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
{
unsigned char old_lcr;
unsigned int id, old_dl;
old_lcr = serial_in(p, UART_LCR);
serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
old_dl = serial_dl_read(p);
serial_dl_write(p, 0);
id = serial_dl_read(p);
serial_dl_write(p, old_dl);
serial_out(p, UART_LCR, old_lcr);
return id;
}
/*
* This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
* When this function is called we know it is at least a StarTech
* 16650 V2, but it might be one of several StarTech UARTs, or one of
* its clones. (We treat the broken original StarTech 16650 V1 as a
* 16550, and why not? Startech doesn't seem to even acknowledge its
* existence.)
*
* What evil have men's minds wrought...
*/
static void autoconfig_has_efr(struct uart_8250_port *up)
{
unsigned int id1, id2, id3, rev;
/*
* Everything with an EFR has SLEEP
*/
up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
/*
* First we check to see if it's an Oxford Semiconductor UART.
*
* If we have to do this here because some non-National
* Semiconductor clone chips lock up if you try writing to the
* LSR register (which serial_icr_read does)
*/
/*
* Check for Oxford Semiconductor 16C950.
*
* EFR [4] must be set else this test fails.
*
* This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
* claims that it's needed for 952 dual UART's (which are not
* recommended for new designs).
*/
up->acr = 0;
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
serial_out(up, UART_EFR, UART_EFR_ECB);
serial_out(up, UART_LCR, 0x00);
id1 = serial_icr_read(up, UART_ID1);
id2 = serial_icr_read(up, UART_ID2);
id3 = serial_icr_read(up, UART_ID3);
rev = serial_icr_read(up, UART_REV);
if (id1 == 0x16 && id2 == 0xC9 &&
(id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
up->port.type = PORT_16C950;
/*
* Enable work around for the Oxford Semiconductor 952 rev B
* chip which causes it to seriously miscalculate baud rates
* when DLL is 0.
*/
if (id3 == 0x52 && rev == 0x01)
up->bugs |= UART_BUG_QUOT;
return;
}
/*
* We check for a XR16C850 by setting DLL and DLM to 0, and then
* reading back DLL and DLM. The chip type depends on the DLM
* value read back:
* 0x10 - XR16C850 and the DLL contains the chip revision.
* 0x12 - XR16C2850.
* 0x14 - XR16C854.
*/
id1 = autoconfig_read_divisor_id(up);
id2 = id1 >> 8;
if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
up->port.type = PORT_16850;
return;
}
/*
* It wasn't an XR16C850.
*
* We distinguish between the '654 and the '650 by counting
* how many bytes are in the FIFO. I'm using this for now,
* since that's the technique that was sent to me in the
* serial driver update, but I'm not convinced this works.
* I've had problems doing this in the past. -TYT
*/
if (size_fifo(up) == 64)
up->port.type = PORT_16654;
else
up->port.type = PORT_16650V2;
}
/*
* We detected a chip without a FIFO. Only two fall into
* this category - the original 8250 and the 16450. The
* 16450 has a scratch register (accessible with LCR=0)
*/
static void autoconfig_8250(struct uart_8250_port *up)
{
unsigned char scratch, status1, status2;
up->port.type = PORT_8250;
scratch = serial_in(up, UART_SCR);
serial_out(up, UART_SCR, 0xa5);
status1 = serial_in(up, UART_SCR);
serial_out(up, UART_SCR, 0x5a);
status2 = serial_in(up, UART_SCR);
serial_out(up, UART_SCR, scratch);
if (status1 == 0xa5 && status2 == 0x5a)
up->port.type = PORT_16450;
}
static int broken_efr(struct uart_8250_port *up)
{
/*
* Exar ST16C2550 "A2" devices incorrectly detect as
* having an EFR, and report an ID of 0x0201. See
* http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
*/
if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
return 1;
return 0;
}
/*
* We know that the chip has FIFOs. Does it have an EFR? The
* EFR is located in the same register position as the IIR and
* we know the top two bits of the IIR are currently set. The
* EFR should contain zero. Try to read the EFR.
*/
static void autoconfig_16550a(struct uart_8250_port *up)
{
unsigned char status1, status2;
unsigned int iersave;
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&up->port.lock);
up->port.type = PORT_16550A;
up->capabilities |= UART_CAP_FIFO;
if (!IS_ENABLED(CONFIG_SERIAL_8250_16550A_VARIANTS) &&
!(up->port.flags & UPF_FULL_PROBE))
return;
/*
* Check for presence of the EFR when DLAB is set.
* Only ST16C650V1 UARTs pass this test.
*/
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
if (serial_in(up, UART_EFR) == 0) {
serial_out(up, UART_EFR, 0xA8);
if (serial_in(up, UART_EFR) != 0) {
up->port.type = PORT_16650;
up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
} else {
serial_out(up, UART_LCR, 0);
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
UART_FCR7_64BYTE);
status1 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750;
serial_out(up, UART_FCR, 0);
serial_out(up, UART_LCR, 0);
if (status1 == UART_IIR_FIFO_ENABLED_16750)
up->port.type = PORT_16550A_FSL64;
}
serial_out(up, UART_EFR, 0);
return;
}
/*
* Maybe it requires 0xbf to be written to the LCR.
* (other ST16C650V2 UARTs, TI16C752A, etc)
*/
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
autoconfig_has_efr(up);
return;
}
/*
* Check for a National Semiconductor SuperIO chip.
* Attempt to switch to bank 2, read the value of the LOOP bit
* from EXCR1. Switch back to bank 0, change it in MCR. Then
* switch back to bank 2, read it from EXCR1 again and check
* it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
*/
serial_out(up, UART_LCR, 0);
status1 = serial8250_in_MCR(up);
serial_out(up, UART_LCR, 0xE0);
status2 = serial_in(up, 0x02); /* EXCR1 */
if (!((status2 ^ status1) & UART_MCR_LOOP)) {
serial_out(up, UART_LCR, 0);
serial8250_out_MCR(up, status1 ^ UART_MCR_LOOP);
serial_out(up, UART_LCR, 0xE0);
status2 = serial_in(up, 0x02); /* EXCR1 */
serial_out(up, UART_LCR, 0);
serial8250_out_MCR(up, status1);
if ((status2 ^ status1) & UART_MCR_LOOP) {
unsigned short quot;
serial_out(up, UART_LCR, 0xE0);
quot = serial_dl_read(up);
quot <<= 3;
if (ns16550a_goto_highspeed(up))
serial_dl_write(up, quot);
serial_out(up, UART_LCR, 0);
up->port.uartclk = 921600*16;
up->port.type = PORT_NS16550A;
up->capabilities |= UART_NATSEMI;
return;
}
}
/*
* No EFR. Try to detect a TI16750, which only sets bit 5 of
* the IIR when 64 byte FIFO mode is enabled when DLAB is set.
* Try setting it with and without DLAB set. Cheap clones
* set bit 5 without DLAB set.
*/
serial_out(up, UART_LCR, 0);
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
status1 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750;
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
status2 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750;
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
serial_out(up, UART_LCR, 0);
if (status1 == UART_IIR_FIFO_ENABLED_16550A &&
status2 == UART_IIR_FIFO_ENABLED_16750) {
up->port.type = PORT_16750;
up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
return;
}
/*
* Try writing and reading the UART_IER_UUE bit (b6).
* If it works, this is probably one of the Xscale platform's
* internal UARTs.
* We're going to explicitly set the UUE bit to 0 before
* trying to write and read a 1 just to make sure it's not
* already a 1 and maybe locked there before we even start.
*/
iersave = serial_in(up, UART_IER);
serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
/*
* OK it's in a known zero state, try writing and reading
* without disturbing the current state of the other bits.
*/
serial_out(up, UART_IER, iersave | UART_IER_UUE);
if (serial_in(up, UART_IER) & UART_IER_UUE) {
/*
* It's an Xscale.
* We'll leave the UART_IER_UUE bit set to 1 (enabled).
*/
up->port.type = PORT_XSCALE;
up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
return;
}
}
serial_out(up, UART_IER, iersave);
/*
* We distinguish between 16550A and U6 16550A by counting
* how many bytes are in the FIFO.
*/
if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
up->port.type = PORT_U6_16550A;
up->capabilities |= UART_CAP_AFE;
}
}
/*
* This routine is called by rs_init() to initialize a specific serial
* port. It determines what type of UART chip this serial port is
* using: 8250, 16450, 16550, 16550A. The important question is
* whether or not this UART is a 16550A or not, since this will
* determine whether or not we can use its FIFO features or not.
*/
static void autoconfig(struct uart_8250_port *up)
{
unsigned char status1, scratch, scratch2, scratch3;
unsigned char save_lcr, save_mcr;
struct uart_port *port = &up->port;
unsigned long flags;
unsigned int old_capabilities;
if (!port->iobase && !port->mapbase && !port->membase)
return;
/*
* We really do need global IRQs disabled here - we're going to
* be frobbing the chips IRQ enable register to see if it exists.
*
* Synchronize UART_IER access against the console.
*/
uart_port_lock_irqsave(port, &flags);
up->capabilities = 0;
up->bugs = 0;
if (!(port->flags & UPF_BUGGY_UART)) {
/*
* Do a simple existence test first; if we fail this,
* there's no point trying anything else.
*
* 0x80 is used as a nonsense port to prevent against
* false positives due to ISA bus float. The
* assumption is that 0x80 is a non-existent port;
* which should be safe since include/asm/io.h also
* makes this assumption.
*
* Note: this is safe as long as MCR bit 4 is clear
* and the device is in "PC" mode.
*/
scratch = serial_in(up, UART_IER);
serial_out(up, UART_IER, 0);
#if defined(__i386__) && defined(CONFIG_HAS_IOPORT)
outb(0xff, 0x080);
#endif
/*
* Mask out IER[7:4] bits for test as some UARTs (e.g. TL
* 16C754B) allow only to modify them if an EFR bit is set.
*/
scratch2 = serial_in(up, UART_IER) & UART_IER_ALL_INTR;
serial_out(up, UART_IER, UART_IER_ALL_INTR);
#if defined(__i386__) && defined(CONFIG_HAS_IOPORT)
outb(0, 0x080);
#endif
scratch3 = serial_in(up, UART_IER) & UART_IER_ALL_INTR;
serial_out(up, UART_IER, scratch);
if (scratch2 != 0 || scratch3 != UART_IER_ALL_INTR) {
/*
* We failed; there's nothing here
*/
uart_port_unlock_irqrestore(port, flags);
return;
}
}
save_mcr = serial8250_in_MCR(up);
save_lcr = serial_in(up, UART_LCR);
/*
* Check to see if a UART is really there. Certain broken
* internal modems based on the Rockwell chipset fail this
* test, because they apparently don't implement the loopback
* test mode. So this test is skipped on the COM 1 through
* COM 4 ports. This *should* be safe, since no board
* manufacturer would be stupid enough to design a board
* that conflicts with COM 1-4 --- we hope!
*/
if (!(port->flags & UPF_SKIP_TEST)) {
serial8250_out_MCR(up, UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_RTS);
status1 = serial_in(up, UART_MSR) & UART_MSR_STATUS_BITS;
serial8250_out_MCR(up, save_mcr);
if (status1 != (UART_MSR_DCD | UART_MSR_CTS)) {
uart_port_unlock_irqrestore(port, flags);
return;
}
}
/*
* We're pretty sure there's a port here. Lets find out what
* type of port it is. The IIR top two bits allows us to find
* out if it's 8250 or 16450, 16550, 16550A or later. This
* determines what we test for next.
*
* We also initialise the EFR (if any) to zero for later. The
* EFR occupies the same register location as the FCR and IIR.
*/
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
serial_out(up, UART_EFR, 0);
serial_out(up, UART_LCR, 0);
serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
switch (serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED) {
case UART_IIR_FIFO_ENABLED_8250:
autoconfig_8250(up);
break;
case UART_IIR_FIFO_ENABLED_16550:
port->type = PORT_16550;
break;
case UART_IIR_FIFO_ENABLED_16550A:
autoconfig_16550a(up);
break;
default:
port->type = PORT_UNKNOWN;
break;
}
rsa_autoconfig(up);
serial_out(up, UART_LCR, save_lcr);
port->fifosize = uart_config[up->port.type].fifo_size;
old_capabilities = up->capabilities;
up->capabilities = uart_config[port->type].flags;
up->tx_loadsz = uart_config[port->type].tx_loadsz;
if (port->type != PORT_UNKNOWN) {
/*
* Reset the UART.
*/
rsa_reset(up);
serial8250_out_MCR(up, save_mcr);
serial8250_clear_fifos(up);
serial_in(up, UART_RX);
serial8250_clear_IER(up);
}
uart_port_unlock_irqrestore(port, flags);
/*
* Check if the device is a Fintek F81216A
*/
if (port->type == PORT_16550A && port->iotype == UPIO_PORT)
fintek_8250_probe(up);
if (up->capabilities != old_capabilities) {
dev_warn(port->dev, "detected caps %08x should be %08x\n",
old_capabilities, up->capabilities);
}
}
static void autoconfig_irq(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
unsigned char save_mcr, save_ier;
unsigned char save_ICP = 0;
unsigned int ICP = 0;
unsigned long irqs;
int irq;
if (port->flags & UPF_FOURPORT) {
ICP = (port->iobase & 0xfe0) | 0x1f;
save_ICP = inb_p(ICP);
outb_p(0x80, ICP);
inb_p(ICP);
}
/* forget possible initially masked and pending IRQ */
probe_irq_off(probe_irq_on());
save_mcr = serial8250_in_MCR(up);
/* Synchronize UART_IER access against the console. */
scoped_guard(uart_port_lock_irq, port)
save_ier = serial_in(up, UART_IER);
serial8250_out_MCR(up, UART_MCR_OUT1 | UART_MCR_OUT2);
irqs = probe_irq_on();
serial8250_out_MCR(up, 0);
udelay(10);
if (port->flags & UPF_FOURPORT) {
serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS);
} else {
serial8250_out_MCR(up,
UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
}
/* Synchronize UART_IER access against the console. */
scoped_guard(uart_port_lock_irq, port)
serial_out(up, UART_IER, UART_IER_ALL_INTR);
serial8250_clear_interrupts(port);
serial_out(up, UART_TX, 0xFF);
udelay(20);
irq = probe_irq_off(irqs);
serial8250_out_MCR(up, save_mcr);
/* Synchronize UART_IER access against the console. */
scoped_guard(uart_port_lock_irq, port)
serial_out(up, UART_IER, save_ier);
if (port->flags & UPF_FOURPORT)
outb_p(save_ICP, ICP);
port->irq = (irq > 0) ? irq : 0;
}
static void serial8250_stop_rx(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&port->lock);
guard(serial8250_rpm)(up);
up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
serial_port_out(port, UART_IER, up->ier);
}
/**
* serial8250_em485_stop_tx() - generic ->rs485_stop_tx() callback
* @p: uart 8250 port
* @toggle_ier: true to allow enabling receive interrupts
*
* Generic callback usable by 8250 uart drivers to stop rs485 transmission.
*/
void serial8250_em485_stop_tx(struct uart_8250_port *p, bool toggle_ier)
{
unsigned char mcr = serial8250_in_MCR(p);
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&p->port.lock);
if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)
mcr |= UART_MCR_RTS;
else
mcr &= ~UART_MCR_RTS;
serial8250_out_MCR(p, mcr);
/*
* Empty the RX FIFO, we are not interested in anything
* received during the half-duplex transmission.
* Enable previously disabled RX interrupts.
*/
if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) {
serial8250_clear_and_reinit_fifos(p);
if (toggle_ier) {
p->ier |= UART_IER_RLSI | UART_IER_RDI;
serial_port_out(&p->port, UART_IER, p->ier);
}
}
}
EXPORT_SYMBOL_GPL(serial8250_em485_stop_tx);
static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer *t)
{
struct uart_8250_em485 *em485 = container_of(t, struct uart_8250_em485,
stop_tx_timer);
struct uart_8250_port *p = em485->port;
guard(serial8250_rpm)(p);
guard(uart_port_lock_irqsave)(&p->port);
if (em485->active_timer == &em485->stop_tx_timer) {
p->rs485_stop_tx(p, true);
em485->active_timer = NULL;
em485->tx_stopped = true;
}
return HRTIMER_NORESTART;
}
static void start_hrtimer_ms(struct hrtimer *hrt, unsigned long msec)
{
hrtimer_start(hrt, ms_to_ktime(msec), HRTIMER_MODE_REL);
}
static void __stop_tx_rs485(struct uart_8250_port *p, u64 stop_delay)
{
struct uart_8250_em485 *em485 = p->em485;
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&p->port.lock);
stop_delay += (u64)p->port.rs485.delay_rts_after_send * NSEC_PER_MSEC;
/*
* rs485_stop_tx() is going to set RTS according to config
* AND flush RX FIFO if required.
*/
if (stop_delay > 0) {
em485->active_timer = &em485->stop_tx_timer;
hrtimer_start(&em485->stop_tx_timer, ns_to_ktime(stop_delay), HRTIMER_MODE_REL);
} else {
p->rs485_stop_tx(p, true);
em485->active_timer = NULL;
em485->tx_stopped = true;
}
}
static inline void __stop_tx(struct uart_8250_port *p)
{
struct uart_8250_em485 *em485 = p->em485;
if (em485) {
u16 lsr = serial_lsr_in(p);
u64 stop_delay = 0;
if (!(lsr & UART_LSR_THRE))
return;
/*
* To provide required timing and allow FIFO transfer,
* __stop_tx_rs485() must be called only when both FIFO and
* shift register are empty. The device driver should either
* enable interrupt on TEMT or set UART_CAP_NOTEMT that will
* enlarge stop_tx_timer by the tx time of one frame to cover
* for emptying of the shift register.
*/
if (!(lsr & UART_LSR_TEMT)) {
if (!(p->capabilities & UART_CAP_NOTEMT))
return;
/*
* RTS might get deasserted too early with the normal
* frame timing formula. It seems to suggest THRE might
* get asserted already during tx of the stop bit
* rather than after it is fully sent.
* Roughly estimate 1 extra bit here with / 7.
*/
stop_delay = p->port.frame_time + DIV_ROUND_UP(p->port.frame_time, 7);
}
__stop_tx_rs485(p, stop_delay);
}
if (serial8250_clear_THRI(p))
serial8250_rpm_put_tx(p);
}
static void serial8250_stop_tx(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
guard(serial8250_rpm)(up);
__stop_tx(up);
/*
* We really want to stop the transmitter from sending.
*/
if (port->type == PORT_16C950) {
up->acr |= UART_ACR_TXDIS;
serial_icr_write(up, UART_ACR, up->acr);
}
}
static inline void __start_tx(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
if (up->dma && !up->dma->tx_dma(up))
return;
if (serial8250_set_THRI(up)) {
if (up->bugs & UART_BUG_TXEN) {
u16 lsr = serial_lsr_in(up);
if (lsr & UART_LSR_THRE)
serial8250_tx_chars(up);
}
}
/*
* Re-enable the transmitter if we disabled it.
*/
if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
up->acr &= ~UART_ACR_TXDIS;
serial_icr_write(up, UART_ACR, up->acr);
}
}
/**
* serial8250_em485_start_tx() - generic ->rs485_start_tx() callback
* @up: uart 8250 port
* @toggle_ier: true to allow disabling receive interrupts
*
* Generic callback usable by 8250 uart drivers to start rs485 transmission.
* Assumes that setting the RTS bit in the MCR register means RTS is high.
* (Some chips use inverse semantics.) Further assumes that reception is
* stoppable by disabling the UART_IER_RDI interrupt. (Some chips set the
* UART_LSR_DR bit even when UART_IER_RDI is disabled, foiling this approach.)
*/
void serial8250_em485_start_tx(struct uart_8250_port *up, bool toggle_ier)
{
unsigned char mcr = serial8250_in_MCR(up);
if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && toggle_ier)
serial8250_stop_rx(&up->port);
if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
mcr |= UART_MCR_RTS;
else
mcr &= ~UART_MCR_RTS;
serial8250_out_MCR(up, mcr);
}
EXPORT_SYMBOL_GPL(serial8250_em485_start_tx);
/* Returns false, if start_tx_timer was setup to defer TX start */
static bool start_tx_rs485(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
struct uart_8250_em485 *em485 = up->em485;
/*
* While serial8250_em485_handle_stop_tx() is a noop if
* em485->active_timer != &em485->stop_tx_timer, it might happen that
* the timer is still armed and triggers only after the current bunch of
* chars is send and em485->active_timer == &em485->stop_tx_timer again.
* So cancel the timer. There is still a theoretical race condition if
* the timer is already running and only comes around to check for
* em485->active_timer when &em485->stop_tx_timer is armed again.
*/
if (em485->active_timer == &em485->stop_tx_timer)
hrtimer_try_to_cancel(&em485->stop_tx_timer);
em485->active_timer = NULL;
if (em485->tx_stopped) {
em485->tx_stopped = false;
up->rs485_start_tx(up, true);
if (up->port.rs485.delay_rts_before_send > 0) {
em485->active_timer = &em485->start_tx_timer;
start_hrtimer_ms(&em485->start_tx_timer,
up->port.rs485.delay_rts_before_send);
return false;
}
}
return true;
}
static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t)
{
struct uart_8250_em485 *em485 = container_of(t, struct uart_8250_em485,
start_tx_timer);
struct uart_8250_port *p = em485->port;
guard(uart_port_lock_irqsave)(&p->port);
if (em485->active_timer == &em485->start_tx_timer) {
__start_tx(&p->port);
em485->active_timer = NULL;
}
return HRTIMER_NORESTART;
}
static void serial8250_start_tx(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
struct uart_8250_em485 *em485 = up->em485;
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&port->lock);
if (!port->x_char && kfifo_is_empty(&port->state->port.xmit_fifo))
return;
serial8250_rpm_get_tx(up);
if (em485) {
if ((em485->active_timer == &em485->start_tx_timer) ||
!start_tx_rs485(port))
return;
}
__start_tx(port);
}
static void serial8250_throttle(struct uart_port *port)
{
port->throttle(port);
}
static void serial8250_unthrottle(struct uart_port *port)
{
port->unthrottle(port);
}
static void serial8250_disable_ms(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&port->lock);
/* no MSR capabilities */
if (up->bugs & UART_BUG_NOMSR)
return;
mctrl_gpio_disable_ms_no_sync(up->gpios);
up->ier &= ~UART_IER_MSI;
serial_port_out(port, UART_IER, up->ier);
}
static void serial8250_enable_ms(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&port->lock);
/* no MSR capabilities */
if (up->bugs & UART_BUG_NOMSR)
return;
mctrl_gpio_enable_ms(up->gpios);
up->ier |= UART_IER_MSI;
guard(serial8250_rpm)(up);
serial_port_out(port, UART_IER, up->ier);
}
void serial8250_read_char(struct uart_8250_port *up, u16 lsr)
{
struct uart_port *port = &up->port;
u8 ch, flag = TTY_NORMAL;
if (likely(lsr & UART_LSR_DR))
ch = serial_in(up, UART_RX);
else
/*
* Intel 82571 has a Serial Over Lan device that will
* set UART_LSR_BI without setting UART_LSR_DR when
* it receives a break. To avoid reading from the
* receive buffer without UART_LSR_DR bit set, we
* just force the read character to be 0
*/
ch = 0;
port->icount.rx++;
lsr |= up->lsr_saved_flags;
up->lsr_saved_flags = 0;
if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
if (lsr & UART_LSR_BI) {
lsr &= ~(UART_LSR_FE | UART_LSR_PE);
port->icount.brk++;
/*
* We do the SysRQ and SAK checking
* here because otherwise the break
* may get masked by ignore_status_mask
* or read_status_mask.
*/
if (uart_handle_break(port))
return;
} else if (lsr & UART_LSR_PE)
port->icount.parity++;
else if (lsr & UART_LSR_FE)
port->icount.frame++;
if (lsr & UART_LSR_OE)
port->icount.overrun++;
/*
* Mask off conditions which should be ignored.
*/
lsr &= port->read_status_mask;
if (lsr & UART_LSR_BI) {
dev_dbg(port->dev, "handling break\n");
flag = TTY_BREAK;
} else if (lsr & UART_LSR_PE)
flag = TTY_PARITY;
else if (lsr & UART_LSR_FE)
flag = TTY_FRAME;
}
if (uart_prepare_sysrq_char(port, ch))
return;
uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
}
EXPORT_SYMBOL_GPL(serial8250_read_char);
/*
* serial8250_rx_chars - Read characters. The first LSR value must be passed in.
*
* Returns LSR bits. The caller should rely only on non-Rx related LSR bits
* (such as THRE) because the LSR value might come from an already consumed
* character.
*/
u16 serial8250_rx_chars(struct uart_8250_port *up, u16 lsr)
{
struct uart_port *port = &up->port;
int max_count = 256;
do {
serial8250_read_char(up, lsr);
if (--max_count == 0)
break;
lsr = serial_in(up, UART_LSR);
} while (lsr & (UART_LSR_DR | UART_LSR_BI));
tty_flip_buffer_push(&port->state->port);
return lsr;
}
EXPORT_SYMBOL_GPL(serial8250_rx_chars);
void serial8250_tx_chars(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
struct tty_port *tport = &port->state->port;
int count;
if (port->x_char) {
uart_xchar_out(port, UART_TX);
return;
}
if (uart_tx_stopped(port)) {
serial8250_stop_tx(port);
return;
}
if (kfifo_is_empty(&tport->xmit_fifo)) {
__stop_tx(up);
return;
}
count = up->tx_loadsz;
do {
unsigned char c;
if (!uart_fifo_get(port, &c))
break;
serial_out(up, UART_TX, c);
if (up->bugs & UART_BUG_TXRACE) {
/*
* The Aspeed BMC virtual UARTs have a bug where data
* may get stuck in the BMC's Tx FIFO from bursts of
* writes on the APB interface.
*
* Delay back-to-back writes by a read cycle to avoid
* stalling the VUART. Read a register that won't have
* side-effects and discard the result.
*/
serial_in(up, UART_SCR);
}
if ((up->capabilities & UART_CAP_HFIFO) &&
!uart_lsr_tx_empty(serial_in(up, UART_LSR)))
break;
/* The BCM2835 MINI UART THRE bit is really a not-full bit. */
if ((up->capabilities & UART_CAP_MINI) &&
!(serial_in(up, UART_LSR) & UART_LSR_THRE))
break;
} while (--count > 0);
if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
uart_write_wakeup(port);
/*
* With RPM enabled, we have to wait until the FIFO is empty before the
* HW can go idle. So we get here once again with empty FIFO and disable
* the interrupt and RPM in __stop_tx()
*/
if (kfifo_is_empty(&tport->xmit_fifo) &&
!(up->capabilities & UART_CAP_RPM))
__stop_tx(up);
}
EXPORT_SYMBOL_GPL(serial8250_tx_chars);
/* Caller holds uart port lock */
unsigned int serial8250_modem_status(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
unsigned int status = serial_in(up, UART_MSR);
status |= up->msr_saved_flags;
up->msr_saved_flags = 0;
if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
port->state != NULL) {
if (status & UART_MSR_TERI)
port->icount.rng++;
if (status & UART_MSR_DDSR)
port->icount.dsr++;
if (status & UART_MSR_DDCD)
uart_handle_dcd_change(port, status & UART_MSR_DCD);
if (status & UART_MSR_DCTS)
uart_handle_cts_change(port, status & UART_MSR_CTS);
wake_up_interruptible(&port->state->port.delta_msr_wait);
}
return status;
}
EXPORT_SYMBOL_GPL(serial8250_modem_status);
static bool handle_rx_dma(struct uart_8250_port *up, unsigned int iir)
{
switch (iir & 0x3f) {
case UART_IIR_THRI:
/*
* Postpone DMA or not decision to IIR_RDI or IIR_RX_TIMEOUT
* because it's impossible to do an informed decision about
* that with IIR_THRI.
*
* This also fixes one known DMA Rx corruption issue where
* DR is asserted but DMA Rx only gets a corrupted zero byte
* (too early DR?).
*/
return false;
case UART_IIR_RDI:
if (!up->dma->rx_running)
break;
fallthrough;
case UART_IIR_RLSI:
case UART_IIR_RX_TIMEOUT:
serial8250_rx_dma_flush(up);
return true;
}
return up->dma->rx_dma(up);
}
/*
* Context: port's lock must be held by the caller.
*/
void serial8250_handle_irq_locked(struct uart_port *port, unsigned int iir)
{
struct uart_8250_port *up = up_to_u8250p(port);
struct tty_port *tport = &port->state->port;
bool skip_rx = false;
u16 status;
lockdep_assert_held_once(&port->lock);
status = serial_lsr_in(up);
/*
* If port is stopped and there are no error conditions in the
* FIFO, then don't drain the FIFO, as this may lead to TTY buffer
* overflow. Not servicing, RX FIFO would trigger auto HW flow
* control when FIFO occupancy reaches preset threshold, thus
* halting RX. This only works when auto HW flow control is
* available.
*/
if (!(status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS)) &&
(port->status & (UPSTAT_AUTOCTS | UPSTAT_AUTORTS)) &&
!(up->ier & (UART_IER_RLSI | UART_IER_RDI)))
skip_rx = true;
if (status & (UART_LSR_DR | UART_LSR_BI) && !skip_rx) {
struct irq_data *d;
d = irq_get_irq_data(port->irq);
if (d && irqd_is_wakeup_set(d))
pm_wakeup_event(tport->tty->dev, 0);
if (!up->dma || handle_rx_dma(up, iir))
status = serial8250_rx_chars(up, status);
}
serial8250_modem_status(up);
if ((status & UART_LSR_THRE) && (up->ier & UART_IER_THRI)) {
if (!up->dma || up->dma->tx_err)
serial8250_tx_chars(up);
else if (!up->dma->tx_running)
__stop_tx(up);
}
}
EXPORT_SYMBOL_NS_GPL(serial8250_handle_irq_locked, "SERIAL_8250");
/*
* This handles the interrupt from one port.
*/
int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
{
if (iir & UART_IIR_NO_INT)
return 0;
guard(uart_port_lock_irqsave)(port);
serial8250_handle_irq_locked(port, iir);
return 1;
}
EXPORT_SYMBOL_GPL(serial8250_handle_irq);
static int serial8250_default_handle_irq(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
unsigned int iir;
guard(serial8250_rpm)(up);
iir = serial_port_in(port, UART_IIR);
return serial8250_handle_irq(port, iir);
}
/*
* Newer 16550 compatible parts such as the SC16C650 & Altera 16550 Soft IP
* have a programmable TX threshold that triggers the THRE interrupt in
* the IIR register. In this case, the THRE interrupt indicates the FIFO
* has space available. Load it up with tx_loadsz bytes.
*/
static int serial8250_tx_threshold_handle_irq(struct uart_port *port)
{
unsigned int iir = serial_port_in(port, UART_IIR);
/* TX Threshold IRQ triggered so load up FIFO */
if ((iir & UART_IIR_ID) == UART_IIR_THRI) {
struct uart_8250_port *up = up_to_u8250p(port);
guard(uart_port_lock_irqsave)(port);
serial8250_tx_chars(up);
}
iir = serial_port_in(port, UART_IIR);
return serial8250_handle_irq(port, iir);
}
static unsigned int serial8250_tx_empty(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
guard(serial8250_rpm)(up);
guard(uart_port_lock_irqsave)(port);
if (!serial8250_tx_dma_running(up) && uart_lsr_tx_empty(serial_lsr_in(up)))
return TIOCSER_TEMT;
return 0;
}
unsigned int serial8250_do_get_mctrl(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
unsigned int status;
unsigned int val;
scoped_guard(serial8250_rpm, up)
status = serial8250_modem_status(up);
val = serial8250_MSR_to_TIOCM(status);
if (up->gpios)
return mctrl_gpio_get(up->gpios, &val);
return val;
}
EXPORT_SYMBOL_GPL(serial8250_do_get_mctrl);
static unsigned int serial8250_get_mctrl(struct uart_port *port)
{
if (port->get_mctrl)
return port->get_mctrl(port);
return serial8250_do_get_mctrl(port);
}
void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
struct uart_8250_port *up = up_to_u8250p(port);
unsigned char mcr;
mcr = serial8250_TIOCM_to_MCR(mctrl);
mcr |= up->mcr;
serial8250_out_MCR(up, mcr);
}
EXPORT_SYMBOL_GPL(serial8250_do_set_mctrl);
static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
if (port->rs485.flags & SER_RS485_ENABLED)
return;
if (port->set_mctrl)
port->set_mctrl(port, mctrl);
else
serial8250_do_set_mctrl(port, mctrl);
}
static void serial8250_break_ctl(struct uart_port *port, int break_state)
{
struct uart_8250_port *up = up_to_u8250p(port);
guard(serial8250_rpm)(up);
guard(uart_port_lock_irqsave)(port);
if (break_state == -1)
up->lcr |= UART_LCR_SBC;
else
up->lcr &= ~UART_LCR_SBC;
serial_port_out(port, UART_LCR, up->lcr);
}
/* Returns true if @bits were set, false on timeout */
static bool wait_for_lsr(struct uart_8250_port *up, int bits)
{
unsigned int status, tmout;
/*
* Wait for a character to be sent. Fallback to a safe default
* timeout value if @frame_time is not available.
*/
if (up->port.frame_time)
tmout = up->port.frame_time * 2 / NSEC_PER_USEC;
else
tmout = 10000;
for (;;) {
status = serial_lsr_in(up);
if ((status & bits) == bits)
break;
if (--tmout == 0)
break;
udelay(1);
touch_nmi_watchdog();
}
return (tmout != 0);
}
/* Wait for transmitter and holding register to empty with timeout */
static void wait_for_xmitr(struct uart_8250_port *up, int bits)
{
unsigned int tmout;
wait_for_lsr(up, bits);
/* Wait up to 1s for flow control if necessary */
if (up->port.flags & UPF_CONS_FLOW) {
for (tmout = 1000000; tmout; tmout--) {
unsigned int msr = serial_in(up, UART_MSR);
up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
if (msr & UART_MSR_CTS)
break;
udelay(1);
touch_nmi_watchdog();
}
}
}
#ifdef CONFIG_CONSOLE_POLL
/*
* Console polling routines for writing and reading from the uart while
* in an interrupt or debug context.
*/
static int serial8250_get_poll_char(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
u16 lsr;
guard(serial8250_rpm)(up);
lsr = serial_port_in(port, UART_LSR);
if (!(lsr & UART_LSR_DR))
return NO_POLL_CHAR;
return serial_port_in(port, UART_RX);
}
static void serial8250_put_poll_char(struct uart_port *port,
unsigned char c)
{
unsigned int ier;
struct uart_8250_port *up = up_to_u8250p(port);
/*
* Normally the port is locked to synchronize UART_IER access
* against the console. However, this function is only used by
* KDB/KGDB, where it may not be possible to acquire the port
* lock because all other CPUs are quiesced. The quiescence
* should allow safe lockless usage here.
*/
guard(serial8250_rpm)(up);
/*
* First save the IER then disable the interrupts
*/
ier = serial_port_in(port, UART_IER);
serial8250_clear_IER(up);
wait_for_xmitr(up, UART_LSR_BOTH_EMPTY);
/*
* Send the character out.
*/
serial_port_out(port, UART_TX, c);
/*
* Finally, wait for transmitter to become empty
* and restore the IER
*/
wait_for_xmitr(up, UART_LSR_BOTH_EMPTY);
serial_port_out(port, UART_IER, ier);
}
#endif /* CONFIG_CONSOLE_POLL */
static void serial8250_startup_special(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
switch (port->type) {
case PORT_16C950: {
/*
* Wake up and initialize UART
*
* Synchronize UART_IER access against the console.
*/
guard(uart_port_lock_irqsave)(port);
up->acr = 0;
serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
serial_port_out(port, UART_EFR, UART_EFR_ECB);
serial_port_out(port, UART_IER, 0);
serial_port_out(port, UART_LCR, 0);
serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
serial_port_out(port, UART_EFR, UART_EFR_ECB);
serial_port_out(port, UART_LCR, 0);
break;
}
case PORT_DA830:
/*
* Reset the port
*
* Synchronize UART_IER access against the console.
*/
scoped_guard(uart_port_lock_irqsave, port) {
serial_port_out(port, UART_IER, 0);
serial_port_out(port, UART_DA830_PWREMU_MGMT, 0);
}
mdelay(10);
/* Enable Tx, Rx and free run mode */
serial_port_out(port, UART_DA830_PWREMU_MGMT,
UART_DA830_PWREMU_MGMT_UTRST |
UART_DA830_PWREMU_MGMT_URRST |
UART_DA830_PWREMU_MGMT_FREE);
break;
case PORT_RSA:
rsa_enable(up);
break;
}
}
static void serial8250_set_TRG_levels(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
switch (port->type) {
/* For a XR16C850, we need to set the trigger levels */
case PORT_16850: {
u8 fctr;
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
fctr |= UART_FCTR_TRGD;
serial_port_out(port, UART_FCTR, fctr | UART_FCTR_RX);
serial_port_out(port, UART_TRG, UART_TRG_96);
serial_port_out(port, UART_FCTR, fctr | UART_FCTR_TX);
serial_port_out(port, UART_TRG, UART_TRG_96);
serial_port_out(port, UART_LCR, 0);
break;
}
/* For the Altera 16550 variants, set TX threshold trigger level. */
case PORT_ALTR_16550_F32:
case PORT_ALTR_16550_F64:
case PORT_ALTR_16550_F128:
if (port->fifosize <= 1)
return;
/* Bounds checking of TX threshold (valid 0 to fifosize-2) */
if (up->tx_loadsz < 2 || up->tx_loadsz > port->fifosize) {
dev_err(port->dev, "TX FIFO Threshold errors, skipping\n");
return;
}
serial_port_out(port, UART_ALTR_AFR, UART_ALTR_EN_TXFIFO_LW);
serial_port_out(port, UART_ALTR_TX_LOW, port->fifosize - up->tx_loadsz);
port->handle_irq = serial8250_tx_threshold_handle_irq;
break;
}
}
static void serial8250_THRE_test(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
bool iir_noint1, iir_noint2;
if (!port->irq)
return;
if (up->port.flags & UPF_NO_THRE_TEST)
return;
disable_irq(port->irq);
/*
* Test for UARTs that do not reassert THRE when the transmitter is idle and the interrupt
* has already been cleared. Real 16550s should always reassert this interrupt whenever the
* transmitter is idle and the interrupt is enabled. Delays are necessary to allow register
* changes to become visible.
*
* Synchronize UART_IER access against the console.
*/
scoped_guard(uart_port_lock_irqsave, port) {
wait_for_xmitr(up, UART_LSR_THRE);
serial_port_out_sync(port, UART_IER, UART_IER_THRI);
udelay(1); /* allow THRE to set */
iir_noint1 = serial_port_in(port, UART_IIR) & UART_IIR_NO_INT;
serial_port_out(port, UART_IER, 0);
serial_port_out_sync(port, UART_IER, UART_IER_THRI);
udelay(1); /* allow a working UART time to re-assert THRE */
iir_noint2 = serial_port_in(port, UART_IIR) & UART_IIR_NO_INT;
serial_port_out(port, UART_IER, 0);
}
enable_irq(port->irq);
/*
* If the interrupt is not reasserted, or we otherwise don't trust the iir, setup a timer to
* kick the UART on a regular basis.
*/
if ((!iir_noint1 && iir_noint2) || up->port.flags & UPF_BUG_THRE)
up->bugs |= UART_BUG_THRE;
}
static void serial8250_init_mctrl(struct uart_port *port)
{
if (port->flags & UPF_FOURPORT) {
if (!port->irq)
port->mctrl |= TIOCM_OUT1;
} else {
/* Most PC uarts need OUT2 raised to enable interrupts. */
if (port->irq)
port->mctrl |= TIOCM_OUT2;
}
serial8250_set_mctrl(port, port->mctrl);
}
static void serial8250_iir_txen_test(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
bool lsr_temt, iir_noint;
if (port->quirks & UPQ_NO_TXEN_TEST)
return;
/* Do a quick test to see if we receive an interrupt when we enable the TX irq. */
serial_port_out(port, UART_IER, UART_IER_THRI);
lsr_temt = serial_port_in(port, UART_LSR) & UART_LSR_TEMT;
iir_noint = serial_port_in(port, UART_IIR) & UART_IIR_NO_INT;
serial_port_out(port, UART_IER, 0);
/*
* Serial over Lan (SoL) hack:
* Intel 8257x Gigabit ethernet chips have a 16550 emulation, to be used for Serial Over
* Lan. Those chips take a longer time than a normal serial device to signalize that a
* transmission data was queued. Due to that, the above test generally fails. One solution
* would be to delay the reading of iir. However, this is not reliable, since the timeout is
* variable. So, in case of UPQ_NO_TXEN_TEST, let's just don't test if we receive TX irq.
* This way, we'll never enable UART_BUG_TXEN.
*/
if (lsr_temt && iir_noint) {
if (!(up->bugs & UART_BUG_TXEN)) {
up->bugs |= UART_BUG_TXEN;
dev_dbg(port->dev, "enabling bad tx status workarounds\n");
}
return;
}
/* FIXME: why is this needed? */
up->bugs &= ~UART_BUG_TXEN;
}
static void serial8250_initialize(struct uart_port *port)
{
guard(uart_port_lock_irqsave)(port);
serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
serial8250_init_mctrl(port);
serial8250_iir_txen_test(port);
}
int serial8250_do_startup(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
int retval;
if (!port->fifosize)
port->fifosize = uart_config[port->type].fifo_size;
if (!up->tx_loadsz)
up->tx_loadsz = uart_config[port->type].tx_loadsz;
if (!up->capabilities)
up->capabilities = uart_config[port->type].flags;
up->mcr = 0;
if (port->iotype != up->cur_iotype)
set_io_from_upio(port);
guard(serial8250_rpm)(up);
serial8250_startup_special(port);
/*
* Clear the FIFO buffers and disable them.
* (they will be reenabled in set_termios())
*/
serial8250_clear_fifos(up);
serial8250_clear_interrupts(port);
/*
* At this point, there's no way the LSR could still be 0xff;
* if it is, then bail out, because there's likely no UART
* here.
*/
if (!(port->flags & UPF_BUGGY_UART) &&
(serial_port_in(port, UART_LSR) == 0xff)) {
dev_info_ratelimited(port->dev, "LSR safety check engaged!\n");
return -ENODEV;
}
serial8250_set_TRG_levels(port);
/* Check if we need to have shared IRQs */
if (port->irq && (up->port.flags & UPF_SHARE_IRQ))
up->port.irqflags |= IRQF_SHARED;
retval = up->ops->setup_irq(up);
if (retval)
return retval;
serial8250_THRE_test(port);
up->ops->setup_timer(up);
serial8250_initialize(port);
/*
* Clear the interrupt registers again for luck, and clear the
* saved flags to avoid getting false values from polling
* routines or the previous session.
*/
serial8250_clear_interrupts(port);
up->lsr_saved_flags = 0;
up->msr_saved_flags = 0;
/*
* Request DMA channels for both RX and TX.
*/
if (up->dma) {
const char *msg = NULL;
if (uart_console(port))
msg = "forbid DMA for kernel console";
else if (serial8250_request_dma(up))
msg = "failed to request DMA";
if (msg) {
dev_warn_ratelimited(port->dev, "%s\n", msg);
up->dma = NULL;
}
}
/*
* Set the IER shadow for rx interrupts but defer actual interrupt
* enable until after the FIFOs are enabled; otherwise, an already-
* active sender can swamp the interrupt handler with "too much work".
*/
up->ier = UART_IER_RLSI | UART_IER_RDI;
if (port->flags & UPF_FOURPORT) {
unsigned int icp;
/*
* Enable interrupts on the AST Fourport board
*/
icp = (port->iobase & 0xfe0) | 0x01f;
outb_p(0x80, icp);
inb_p(icp);
}
return 0;
}
EXPORT_SYMBOL_GPL(serial8250_do_startup);
static int serial8250_startup(struct uart_port *port)
{
if (port->startup)
return port->startup(port);
return serial8250_do_startup(port);
}
void serial8250_do_shutdown(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
u32 lcr;
serial8250_rpm_get(up);
/*
* Disable interrupts from this port
*
* Synchronize UART_IER access against the console.
*/
scoped_guard(uart_port_lock_irqsave, port) {
up->ier = 0;
serial_port_out(port, UART_IER, 0);
}
synchronize_irq(port->irq);
if (up->dma)
serial8250_release_dma(up);
scoped_guard(uart_port_lock_irqsave, port) {
if (port->flags & UPF_FOURPORT) {
/* reset interrupts on the AST Fourport board */
inb((port->iobase & 0xfe0) | 0x1f);
port->mctrl |= TIOCM_OUT1;
} else
port->mctrl &= ~TIOCM_OUT2;
serial8250_set_mctrl(port, port->mctrl);
/* Disable break condition */
lcr = serial_port_in(port, UART_LCR);
lcr &= ~UART_LCR_SBC;
serial_port_out(port, UART_LCR, lcr);
}
serial8250_clear_fifos(up);
rsa_disable(up);
/*
* Read data port to reset things, and then unlink from
* the IRQ chain.
*/
serial_port_in(port, UART_RX);
/*
* LCR writes on DW UART can trigger late (unmaskable) IRQs.
* Handle them before releasing the handler.
*/
synchronize_irq(port->irq);
serial8250_rpm_put(up);
up->ops->release_irq(up);
}
EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
static void serial8250_shutdown(struct uart_port *port)
{
if (port->shutdown)
port->shutdown(port);
else
serial8250_do_shutdown(port);
}
static void serial8250_flush_buffer(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
if (up->dma)
serial8250_tx_dma_flush(up);
}
static unsigned int serial8250_do_get_divisor(struct uart_port *port, unsigned int baud)
{
upf_t magic_multiplier = port->flags & UPF_MAGIC_MULTIPLIER;
struct uart_8250_port *up = up_to_u8250p(port);
unsigned int quot;
/*
* Handle magic divisors for baud rates above baud_base on SMSC
* Super I/O chips. We clamp custom rates from clk/6 and clk/12
* up to clk/4 (0x8001) and clk/8 (0x8002) respectively. These
* magic divisors actually reprogram the baud rate generator's
* reference clock derived from chips's 14.318MHz clock input.
*
* Documentation claims that with these magic divisors the base
* frequencies of 7.3728MHz and 3.6864MHz are used respectively
* for the extra baud rates of 460800bps and 230400bps rather
* than the usual base frequency of 1.8462MHz. However empirical
* evidence contradicts that.
*
* Instead bit 7 of the DLM register (bit 15 of the divisor) is
* effectively used as a clock prescaler selection bit for the
* base frequency of 7.3728MHz, always used. If set to 0, then
* the base frequency is divided by 4 for use by the Baud Rate
* Generator, for the usual arrangement where the value of 1 of
* the divisor produces the baud rate of 115200bps. Conversely,
* if set to 1 and high-speed operation has been enabled with the
* Serial Port Mode Register in the Device Configuration Space,
* then the base frequency is supplied directly to the Baud Rate
* Generator, so for the divisor values of 0x8001, 0x8002, 0x8003,
* 0x8004, etc. the respective baud rates produced are 460800bps,
* 230400bps, 153600bps, 115200bps, etc.
*
* In all cases only low 15 bits of the divisor are used to divide
* the baud base and therefore 32767 is the maximum divisor value
* possible, even though documentation says that the programmable
* Baud Rate Generator is capable of dividing the internal PLL
* clock by any divisor from 1 to 65535.
*/
if (magic_multiplier && baud >= port->uartclk / 6)
quot = 0x8001;
else if (magic_multiplier && baud >= port->uartclk / 12)
quot = 0x8002;
else
quot = uart_get_divisor(port, baud);
/*
* Oxford Semi 952 rev B workaround
*/
if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
quot++;
return quot;
}
static unsigned int serial8250_get_divisor(struct uart_port *port,
unsigned int baud,
unsigned int *frac)
{
if (port->get_divisor)
return port->get_divisor(port, baud, frac);
return serial8250_do_get_divisor(port, baud);
}
static unsigned char serial8250_compute_lcr(struct uart_8250_port *up, tcflag_t c_cflag)
{
u8 lcr = UART_LCR_WLEN(tty_get_char_size(c_cflag));
if (c_cflag & CSTOPB)
lcr |= UART_LCR_STOP;
if (c_cflag & PARENB)
lcr |= UART_LCR_PARITY;
if (!(c_cflag & PARODD))
lcr |= UART_LCR_EPAR;
if (c_cflag & CMSPAR)
lcr |= UART_LCR_SPAR;
return lcr;
}
void serial8250_do_set_divisor(struct uart_port *port, unsigned int baud,
unsigned int quot)
{
struct uart_8250_port *up = up_to_u8250p(port);
/* Workaround to enable 115200 baud on OMAP1510 internal ports */
if (is_omap1510_8250(up)) {
if (baud == 115200) {
quot = 1;
serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
} else
serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
}
/*
* For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
* otherwise just set DLAB
*/
if (up->capabilities & UART_NATSEMI)
serial_port_out(port, UART_LCR, 0xe0);
else
serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
serial_dl_write(up, quot);
}
EXPORT_SYMBOL_GPL(serial8250_do_set_divisor);
static void serial8250_set_divisor(struct uart_port *port, unsigned int baud,
unsigned int quot, unsigned int quot_frac)
{
if (port->set_divisor)
port->set_divisor(port, baud, quot, quot_frac);
else
serial8250_do_set_divisor(port, baud, quot);
}
static unsigned int serial8250_get_baud_rate(struct uart_port *port,
struct ktermios *termios,
const struct ktermios *old)
{
unsigned int tolerance = port->uartclk / 100;
unsigned int min;
unsigned int max;
/*
* Handle magic divisors for baud rates above baud_base on SMSC
* Super I/O chips. Enable custom rates of clk/4 and clk/8, but
* disable divisor values beyond 32767, which are unavailable.
*/
if (port->flags & UPF_MAGIC_MULTIPLIER) {
min = port->uartclk / 16 / UART_DIV_MAX >> 1;
max = (port->uartclk + tolerance) / 4;
} else {
min = port->uartclk / 16 / UART_DIV_MAX;
max = (port->uartclk + tolerance) / 16;
}
/*
* Ask the core to calculate the divisor for us.
* Allow 1% tolerance at the upper limit so uart clks marginally
* slower than nominal still match standard baud rates without
* causing transmission errors.
*/
return uart_get_baud_rate(port, termios, old, min, max);
}
/*
* Note in order to avoid the tty port mutex deadlock don't use the next method
* within the uart port callbacks. Primarily it's supposed to be utilized to
* handle a sudden reference clock rate change.
*/
void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk)
{
struct tty_port *tport = &port->state->port;
scoped_guard(tty_port_tty, tport) {
struct tty_struct *tty = scoped_tty();
guard(rwsem_write)(&tty->termios_rwsem);
guard(mutex)(&tport->mutex);
if (port->uartclk == uartclk)
return;
port->uartclk = uartclk;
if (!tty_port_initialized(tport))
return;
serial8250_do_set_termios(port, &tty->termios, NULL);
return;
}
guard(mutex)(&tport->mutex);
port->uartclk = uartclk;
}
EXPORT_SYMBOL_GPL(serial8250_update_uartclk);
static void serial8250_set_mini(struct uart_port *port, struct ktermios *termios)
{
struct uart_8250_port *up = up_to_u8250p(port);
if (!(up->capabilities & UART_CAP_MINI))
return;
termios->c_cflag &= ~(CSTOPB | PARENB | PARODD | CMSPAR);
tcflag_t csize = termios->c_cflag & CSIZE;
if (csize == CS5 || csize == CS6) {
termios->c_cflag &= ~CSIZE;
termios->c_cflag |= CS7;
}
}
static void serial8250_set_trigger_for_slow_speed(struct uart_port *port, struct ktermios *termios,
unsigned int baud)
{
struct uart_8250_port *up = up_to_u8250p(port);
if (!(up->capabilities & UART_CAP_FIFO))
return;
if (port->fifosize <= 1)
return;
if (baud >= 2400)
return;
if (up->dma)
return;
up->fcr &= ~UART_FCR_TRIGGER_MASK;
up->fcr |= UART_FCR_TRIGGER_1;
}
/*
* MCR-based auto flow control. When AFE is enabled, RTS will be deasserted when the receive FIFO
* contains more characters than the trigger, or the MCR RTS bit is cleared.
*/
static void serial8250_set_afe(struct uart_port *port, struct ktermios *termios)
{
struct uart_8250_port *up = up_to_u8250p(port);
if (!(up->capabilities & UART_CAP_AFE))
return;
up->mcr &= ~UART_MCR_AFE;
if (termios->c_cflag & CRTSCTS)
up->mcr |= UART_MCR_AFE;
}
static void serial8250_set_errors_and_ignores(struct uart_port *port, struct ktermios *termios)
{
/*
* Specify which conditions may be considered for error handling and the ignoring of
* characters. The actual ignoring of characters only occurs if the bit is set in
* @ignore_status_mask as well.
*/
port->read_status_mask = UART_LSR_OE | UART_LSR_DR;
if (termios->c_iflag & INPCK)
port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
port->read_status_mask |= UART_LSR_BI;
/* Characters to ignore */
port->ignore_status_mask = 0;
if (termios->c_iflag & IGNPAR)
port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
if (termios->c_iflag & IGNBRK) {
port->ignore_status_mask |= UART_LSR_BI;
/*
* If we're ignoring parity and break indicators, ignore overruns too (for real raw
* support).
*/
if (termios->c_iflag & IGNPAR)
port->ignore_status_mask |= UART_LSR_OE;
}
/* ignore all characters if CREAD is not set */
if ((termios->c_cflag & CREAD) == 0)
port->ignore_status_mask |= UART_LSR_DR;
}
static void serial8250_set_ier(struct uart_port *port, struct ktermios *termios)
{
struct uart_8250_port *up = up_to_u8250p(port);
/* CTS flow control flag and modem status interrupts */
up->ier &= ~UART_IER_MSI;
if (!(up->bugs & UART_BUG_NOMSR) && UART_ENABLE_MS(&up->port, termios->c_cflag))
up->ier |= UART_IER_MSI;
if (up->capabilities & UART_CAP_UUE)
up->ier |= UART_IER_UUE;
if (up->capabilities & UART_CAP_RTOIE)
up->ier |= UART_IER_RTOIE;
serial_port_out(port, UART_IER, up->ier);
}
static void serial8250_set_efr(struct uart_port *port, struct ktermios *termios)
{
struct uart_8250_port *up = up_to_u8250p(port);
u8 efr_reg = UART_EFR;
u8 efr = 0;
if (!(up->capabilities & UART_CAP_EFR))
return;
/*
* TI16C752/Startech hardware flow control. FIXME:
* - TI16C752 requires control thresholds to be set.
* - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
*/
if (termios->c_cflag & CRTSCTS)
efr |= UART_EFR_CTS;
if (port->flags & UPF_EXAR_EFR)
efr_reg = UART_XR_EFR;
serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
serial_port_out(port, efr_reg, efr);
}
static void serial8250_set_fcr(struct uart_port *port, struct ktermios *termios)
{
struct uart_8250_port *up = up_to_u8250p(port);
bool is_16750 = port->type == PORT_16750;
if (is_16750)
serial_port_out(port, UART_FCR, up->fcr);
/*
* LCR DLAB must be reset to enable 64-byte FIFO mode. If the FCR is written without DLAB
* set, this mode will be disabled.
*/
serial_port_out(port, UART_LCR, up->lcr);
if (is_16750)
return;
/* emulated UARTs (Lucent Venus 167x) need two steps */
if (up->fcr & UART_FCR_ENABLE_FIFO)
serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
serial_port_out(port, UART_FCR, up->fcr);
}
void
serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
const struct ktermios *old)
{
struct uart_8250_port *up = up_to_u8250p(port);
unsigned int baud, quot, frac = 0;
u8 lcr;
serial8250_set_mini(port, termios);
lcr = serial8250_compute_lcr(up, termios->c_cflag);
baud = serial8250_get_baud_rate(port, termios, old);
quot = serial8250_get_divisor(port, baud, &frac);
/*
* Ok, we're now changing the port state. Do it with interrupts disabled.
*
* Synchronize UART_IER access against the console.
*/
scoped_guard(serial8250_rpm, up) {
guard(uart_port_lock_irqsave)(port);
up->lcr = lcr;
serial8250_set_trigger_for_slow_speed(port, termios, baud);
serial8250_set_afe(port, termios);
uart_update_timeout(port, termios->c_cflag, baud);
serial8250_set_errors_and_ignores(port, termios);
serial8250_set_ier(port, termios);
serial8250_set_efr(port, termios);
serial8250_set_divisor(port, baud, quot, frac);
serial8250_set_fcr(port, termios);
serial8250_set_mctrl(port, port->mctrl);
}
/* Don't rewrite B0 */
if (tty_termios_baud_rate(termios))
tty_termios_encode_baud_rate(termios, baud, baud);
}
EXPORT_SYMBOL(serial8250_do_set_termios);
static void
serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
const struct ktermios *old)
{
if (port->set_termios)
port->set_termios(port, termios, old);
else
serial8250_do_set_termios(port, termios, old);
}
void serial8250_do_set_ldisc(struct uart_port *port, struct ktermios *termios)
{
if (termios->c_line == N_PPS) {
port->flags |= UPF_HARDPPS_CD;
guard(uart_port_lock_irq)(port);
serial8250_enable_ms(port);
} else {
port->flags &= ~UPF_HARDPPS_CD;
if (!UART_ENABLE_MS(port, termios->c_cflag)) {
guard(uart_port_lock_irq)(port);
serial8250_disable_ms(port);
}
}
}
EXPORT_SYMBOL_GPL(serial8250_do_set_ldisc);
static void
serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios)
{
if (port->set_ldisc)
port->set_ldisc(port, termios);
else
serial8250_do_set_ldisc(port, termios);
}
void serial8250_do_pm(struct uart_port *port, unsigned int state,
unsigned int oldstate)
{
struct uart_8250_port *p = up_to_u8250p(port);
serial8250_set_sleep(p, state != 0);
}
EXPORT_SYMBOL(serial8250_do_pm);
static void
serial8250_pm(struct uart_port *port, unsigned int state,
unsigned int oldstate)
{
if (port->pm)
port->pm(port, state, oldstate);
else
serial8250_do_pm(port, state, oldstate);
}
static unsigned int serial8250_port_size(struct uart_8250_port *pt)
{
if (pt->port.mapsize)
return pt->port.mapsize;
if (is_omap1_8250(pt))
return 0x16 << pt->port.regshift;
return 8 << pt->port.regshift;
}
/*
* Resource handling.
*/
static int serial8250_request_std_resource(struct uart_8250_port *up)
{
unsigned int size = serial8250_port_size(up);
struct uart_port *port = &up->port;
switch (port->iotype) {
case UPIO_AU:
case UPIO_TSI:
case UPIO_MEM32:
case UPIO_MEM32BE:
case UPIO_MEM16:
case UPIO_MEM:
if (!port->mapbase)
return -EINVAL;
if (!request_mem_region(port->mapbase, size, "serial"))
return -EBUSY;
if (port->flags & UPF_IOREMAP) {
port->membase = ioremap(port->mapbase, size);
if (!port->membase) {
release_mem_region(port->mapbase, size);
return -ENOMEM;
}
}
return 0;
case UPIO_HUB6:
case UPIO_PORT:
if (!request_region(port->iobase, size, "serial"))
return -EBUSY;
return 0;
case UPIO_UNKNOWN:
break;
}
return 0;
}
static void serial8250_release_std_resource(struct uart_8250_port *up)
{
unsigned int size = serial8250_port_size(up);
struct uart_port *port = &up->port;
switch (port->iotype) {
case UPIO_AU:
case UPIO_TSI:
case UPIO_MEM32:
case UPIO_MEM32BE:
case UPIO_MEM16:
case UPIO_MEM:
if (!port->mapbase)
break;
if (port->flags & UPF_IOREMAP) {
iounmap(port->membase);
port->membase = NULL;
}
release_mem_region(port->mapbase, size);
break;
case UPIO_HUB6:
case UPIO_PORT:
release_region(port->iobase, size);
break;
case UPIO_UNKNOWN:
break;
}
}
static void serial8250_release_port(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
serial8250_release_std_resource(up);
}
static int serial8250_request_port(struct uart_port *port)
{
struct uart_8250_port *up = up_to_u8250p(port);
return serial8250_request_std_resource(up);
}
static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
{
const struct serial8250_config *conf_type = &uart_config[up->port.type];
unsigned char bytes;
bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
return bytes ? bytes : -EOPNOTSUPP;
}
static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
{
const struct serial8250_config *conf_type = &uart_config[up->port.type];
int i;
if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
return -EOPNOTSUPP;
for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
if (bytes < conf_type->rxtrig_bytes[i])
/* Use the nearest lower value */
return (--i) << UART_FCR_R_TRIG_SHIFT;
}
return UART_FCR_R_TRIG_11;
}
static int do_get_rxtrig(struct tty_port *port)
{
struct uart_state *state = container_of(port, struct uart_state, port);
struct uart_port *uport = state->uart_port;
struct uart_8250_port *up = up_to_u8250p(uport);
if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
return -EINVAL;
return fcr_get_rxtrig_bytes(up);
}
static int do_serial8250_get_rxtrig(struct tty_port *port)
{
int rxtrig_bytes;
mutex_lock(&port->mutex);
rxtrig_bytes = do_get_rxtrig(port);
mutex_unlock(&port->mutex);
return rxtrig_bytes;
}
static ssize_t rx_trig_bytes_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct tty_port *port = dev_get_drvdata(dev);
int rxtrig_bytes;
rxtrig_bytes = do_serial8250_get_rxtrig(port);
if (rxtrig_bytes < 0)
return rxtrig_bytes;
return sysfs_emit(buf, "%d\n", rxtrig_bytes);
}
static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
{
struct uart_state *state = container_of(port, struct uart_state, port);
struct uart_port *uport = state->uart_port;
struct uart_8250_port *up = up_to_u8250p(uport);
int rxtrig;
if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
return -EINVAL;
rxtrig = bytes_to_fcr_rxtrig(up, bytes);
if (rxtrig < 0)
return rxtrig;
serial8250_clear_fifos(up);
up->fcr &= ~UART_FCR_TRIGGER_MASK;
up->fcr |= (unsigned char)rxtrig;
serial_out(up, UART_FCR, up->fcr);
return 0;
}
static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
{
int ret;
mutex_lock(&port->mutex);
ret = do_set_rxtrig(port, bytes);
mutex_unlock(&port->mutex);
return ret;
}
static ssize_t rx_trig_bytes_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct tty_port *port = dev_get_drvdata(dev);
unsigned char bytes;
int ret;
if (!count)
return -EINVAL;
ret = kstrtou8(buf, 10, &bytes);
if (ret < 0)
return ret;
ret = do_serial8250_set_rxtrig(port, bytes);
if (ret < 0)
return ret;
return count;
}
static DEVICE_ATTR_RW(rx_trig_bytes);
static struct attribute *serial8250_dev_attrs[] = {
&dev_attr_rx_trig_bytes.attr,
NULL
};
static struct attribute_group serial8250_dev_attr_group = {
.attrs = serial8250_dev_attrs,
};
static void register_dev_spec_attr_grp(struct uart_8250_port *up)
{
const struct serial8250_config *conf_type = &uart_config[up->port.type];
if (conf_type->rxtrig_bytes[0])
up->port.attr_group = &serial8250_dev_attr_group;
}
static void serial8250_config_port(struct uart_port *port, int flags)
{
struct uart_8250_port *up = up_to_u8250p(port);
int ret;
/*
* Find the region that we can probe for. This in turn
* tells us whether we can probe for the type of port.
*/
ret = serial8250_request_std_resource(up);
if (ret < 0)
return;
if (port->iotype != up->cur_iotype)
set_io_from_upio(port);
if (flags & UART_CONFIG_TYPE)
autoconfig(up);
/* HW bugs may trigger IRQ while IIR == NO_INT */
if (port->type == PORT_TEGRA)
up->bugs |= UART_BUG_NOMSR;
if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
autoconfig_irq(up);
if (port->type == PORT_UNKNOWN)
serial8250_release_std_resource(up);
register_dev_spec_attr_grp(up);
up->fcr = uart_config[up->port.type].fcr;
}
static int
serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
{
if (ser->irq >= irq_get_nr_irqs() || ser->irq < 0 ||
ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
ser->type == PORT_STARTECH)
return -EINVAL;
return 0;
}
static const char *serial8250_type(struct uart_port *port)
{
int type = port->type;
if (type >= ARRAY_SIZE(uart_config))
type = 0;
return uart_config[type].name;
}
static const struct uart_ops serial8250_pops = {
.tx_empty = serial8250_tx_empty,
.set_mctrl = serial8250_set_mctrl,
.get_mctrl = serial8250_get_mctrl,
.stop_tx = serial8250_stop_tx,
.start_tx = serial8250_start_tx,
.throttle = serial8250_throttle,
.unthrottle = serial8250_unthrottle,
.stop_rx = serial8250_stop_rx,
.enable_ms = serial8250_enable_ms,
.break_ctl = serial8250_break_ctl,
.startup = serial8250_startup,
.shutdown = serial8250_shutdown,
.flush_buffer = serial8250_flush_buffer,
.set_termios = serial8250_set_termios,
.set_ldisc = serial8250_set_ldisc,
.pm = serial8250_pm,
.type = serial8250_type,
.release_port = serial8250_release_port,
.request_port = serial8250_request_port,
.config_port = serial8250_config_port,
.verify_port = serial8250_verify_port,
#ifdef CONFIG_CONSOLE_POLL
.poll_get_char = serial8250_get_poll_char,
.poll_put_char = serial8250_put_poll_char,
#endif
};
void serial8250_init_port(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
spin_lock_init(&port->lock);
port->ctrl_id = 0;
port->pm = NULL;
port->ops = &serial8250_pops;
port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
up->cur_iotype = UPIO_UNKNOWN;
}
EXPORT_SYMBOL_GPL(serial8250_init_port);
void serial8250_set_defaults(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
if (up->port.flags & UPF_FIXED_TYPE) {
unsigned int type = up->port.type;
if (!up->port.fifosize)
up->port.fifosize = uart_config[type].fifo_size;
if (!up->tx_loadsz)
up->tx_loadsz = uart_config[type].tx_loadsz;
if (!up->capabilities)
up->capabilities = uart_config[type].flags;
}
set_io_from_upio(port);
/* default dma handlers */
if (up->dma) {
if (!up->dma->tx_dma)
up->dma->tx_dma = serial8250_tx_dma;
if (!up->dma->rx_dma)
up->dma->rx_dma = serial8250_rx_dma;
}
}
EXPORT_SYMBOL_GPL(serial8250_set_defaults);
void serial8250_fifo_wait_for_lsr_thre(struct uart_8250_port *up, unsigned int count)
{
unsigned int i;
for (i = 0; i < count; i++) {
if (wait_for_lsr(up, UART_LSR_THRE))
return;
}
}
EXPORT_SYMBOL_NS_GPL(serial8250_fifo_wait_for_lsr_thre, "SERIAL_8250");
#ifdef CONFIG_SERIAL_8250_CONSOLE
static void serial8250_console_putchar(struct uart_port *port, unsigned char ch)
{
serial_port_out(port, UART_TX, ch);
}
static void serial8250_console_wait_putchar(struct uart_port *port, unsigned char ch)
{
struct uart_8250_port *up = up_to_u8250p(port);
wait_for_xmitr(up, UART_LSR_THRE);
serial8250_console_putchar(port, ch);
}
/*
* Restore serial console when h/w power-off detected
*/
static void serial8250_console_restore(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
struct ktermios termios;
unsigned int baud, quot, frac = 0;
termios.c_cflag = port->cons->cflag;
termios.c_ispeed = port->cons->ispeed;
termios.c_ospeed = port->cons->ospeed;
if (port->state->port.tty && termios.c_cflag == 0) {
termios.c_cflag = port->state->port.tty->termios.c_cflag;
termios.c_ispeed = port->state->port.tty->termios.c_ispeed;
termios.c_ospeed = port->state->port.tty->termios.c_ospeed;
}
baud = serial8250_get_baud_rate(port, &termios, NULL);
quot = serial8250_get_divisor(port, baud, &frac);
serial8250_set_divisor(port, baud, quot, frac);
serial_port_out(port, UART_LCR, up->lcr);
serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS);
}
/*
* Print a string to the serial port using the device FIFO
*
* It sends fifosize bytes and then waits for the fifo
* to get empty.
*/
static void serial8250_console_fifo_write(struct uart_8250_port *up,
const char *s, unsigned int count)
{
const char *end = s + count;
unsigned int fifosize = up->tx_loadsz;
struct uart_port *port = &up->port;
unsigned int tx_count = 0;
bool cr_sent = false;
unsigned int i;
while (s != end) {
/* Allow timeout for each byte of a possibly full FIFO */
serial8250_fifo_wait_for_lsr_thre(up, fifosize);
for (i = 0; i < fifosize && s != end; ++i) {
if (*s == '\n' && !cr_sent) {
serial8250_console_putchar(port, '\r');
cr_sent = true;
} else {
serial8250_console_putchar(port, *s++);
cr_sent = false;
}
}
tx_count = i;
}
/*
* Allow timeout for each byte written since the caller will only wait
* for UART_LSR_BOTH_EMPTY using the timeout of a single character
*/
serial8250_fifo_wait_for_lsr_thre(up, tx_count);
}
/*
* Print a string to the serial port trying not to disturb
* any possible real use of the port...
*
* The console_lock must be held when we get here.
*
* Doing runtime PM is really a bad idea for the kernel console.
* Thus, we assume the function is called when device is powered up.
*/
void serial8250_console_write(struct uart_8250_port *up, const char *s,
unsigned int count)
{
struct uart_8250_em485 *em485 = up->em485;
struct uart_port *port = &up->port;
unsigned long flags;
unsigned int ier, use_fifo;
int locked = 1;
touch_nmi_watchdog();
if (oops_in_progress)
locked = uart_port_trylock_irqsave(port, &flags);
else
uart_port_lock_irqsave(port, &flags);
/*
* First save the IER then disable the interrupts
*/
ier = serial_port_in(port, UART_IER);
serial8250_clear_IER(up);
/* check scratch reg to see if port powered off during system sleep */
if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) {
serial8250_console_restore(up);
up->canary = 0;
}
if (em485) {
if (em485->tx_stopped)
up->rs485_start_tx(up, false);
mdelay(port->rs485.delay_rts_before_send);
}
use_fifo = (up->capabilities & UART_CAP_FIFO) &&
/*
* BCM283x requires to check the fifo
* after each byte.
*/
!(up->capabilities & UART_CAP_MINI) &&
/*
* tx_loadsz contains the transmit fifo size
*/
up->tx_loadsz > 1 &&
(up->fcr & UART_FCR_ENABLE_FIFO) &&
port->state &&
test_bit(TTY_PORT_INITIALIZED, &port->state->port.iflags) &&
/*
* After we put a data in the fifo, the controller will send
* it regardless of the CTS state. Therefore, only use fifo
* if we don't use control flow.
*/
!(up->port.flags & UPF_CONS_FLOW);
if (likely(use_fifo))
serial8250_console_fifo_write(up, s, count);
else
uart_console_write(port, s, count, serial8250_console_wait_putchar);
/*
* Finally, wait for transmitter to become empty
* and restore the IER
*/
wait_for_xmitr(up, UART_LSR_BOTH_EMPTY);
if (em485) {
mdelay(port->rs485.delay_rts_after_send);
if (em485->tx_stopped)
up->rs485_stop_tx(up, false);
}
serial_port_out(port, UART_IER, ier);
/*
* The receive handling will happen properly because the
* receive ready bit will still be set; it is not cleared
* on read. However, modem control will not, we must
* call it if we have saved something in the saved flags
* while processing with interrupts off.
*/
if (up->msr_saved_flags)
serial8250_modem_status(up);
if (locked)
uart_port_unlock_irqrestore(port, flags);
}
static unsigned int probe_baud(struct uart_port *port)
{
unsigned char lcr, dll, dlm;
unsigned int quot;
lcr = serial_port_in(port, UART_LCR);
serial_port_out(port, UART_LCR, lcr | UART_LCR_DLAB);
dll = serial_port_in(port, UART_DLL);
dlm = serial_port_in(port, UART_DLM);
serial_port_out(port, UART_LCR, lcr);
quot = (dlm << 8) | dll;
return (port->uartclk / 16) / quot;
}
int serial8250_console_setup(struct uart_port *port, char *options, bool probe)
{
int baud = 9600;
int bits = 8;
int parity = 'n';
int flow = 'n';
int ret;
if (!port->iobase && !port->membase)
return -ENODEV;
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
else if (probe)
baud = probe_baud(port);
ret = uart_set_options(port, port->cons, baud, parity, bits, flow);
if (ret)
return ret;
if (port->dev)
pm_runtime_get_sync(port->dev);
return 0;
}
int serial8250_console_exit(struct uart_port *port)
{
if (port->dev)
pm_runtime_put_sync(port->dev);
return 0;
}
#endif /* CONFIG_SERIAL_8250_CONSOLE */
MODULE_DESCRIPTION("Base port operations for 8250/16550-type serial ports");
MODULE_LICENSE("GPL");
] |
| 7/2 | 2026/04/07 13:35 | llm | expert |
0mModel:gemini-3-flash-preview Tokens: input: 44162 output: 32 thoughts: 300 Thoughts: **Analyzing a Serial Port Write Issue** Okay, the report indicates a write operation, specifically "write to `0xffffffff893ff4c6` of 1 bytes." That's the starting point. Let's dig into the serial driver, likely related to the `8250` family, given the context. The race condition identified is related to the memory address. My initial focus is on the functions and lines mentioned: `serial8250_do_startup+0x1628/0x1d50` and `serial8250_handle_irq_locked+0x354/0x420`. Those offsets suggest specific locations within the compiled code, which I'll relate to the source to understand the program flow. Let's see what is happening in the driver, specifically: * In line 2334 of `serial8250_do_startup` in `drivers/tty/serial/8250/8250_port.c`, we have `up->ier = UART_IER_RLSI | UART_IER_RDI;`. I'll want to check how the interrupt enable register (`ier`) is configured during startup. That's a good place to start. * And line 1823 in `serial8250_handle_irq_locked` of the same file, `if ((status & UART_LSR_THRE) && (up->ier & UART_IER_THRI))`. This is in the interrupt handler. So, this condition is only executed if the transmitter holding register is empty. The `up->ier` (Interrupt Enable Register) is masked with `UART_IER_THRI`. This means that if `ier` has the transmit holding register interrupt enabled, we can then determine the source of the interrupt. Now, the issue is a write of 1 byte to the indicated address. It's likely that a write is being attempted to the UART hardware, and we're seeing an issue with the interaction of `up->ier`. Since `up` is a pointer to a `struct uart_8250_port` (or a similar structure, and probably cast to it), it's important to know the size and layout of that. My next step is to examine the `struct uart_8250_port` definition in `drivers/tty/serial/8250/8250.h`, specifically, to determine the type of `up->ier`. Since it's being assigned to a register, it's probably an `unsigned char`, but it's always good to be sure. This might be the source of the problem. |
| 8/2 | 2026/04/07 13:35 | tool | read-file |
0mArgs:map[File:drivers/tty/serial/8250/8250.h] Results: map[Contents:/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Driver for 8250/16550-type serial ports
*
* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
*
* Copyright (C) 2001 Russell King.
*/
#include <linux/bits.h>
#include <linux/serial_8250.h>
#include <linux/serial_core.h>
#include <linux/dmaengine.h>
#include "../serial_mctrl_gpio.h"
struct uart_8250_dma {
int (*tx_dma)(struct uart_8250_port *p);
int (*rx_dma)(struct uart_8250_port *p);
void (*prepare_tx_dma)(struct uart_8250_port *p);
void (*prepare_rx_dma)(struct uart_8250_port *p);
/* Filter function */
dma_filter_fn fn;
/* Parameter to the filter function */
void *rx_param;
void *tx_param;
struct dma_slave_config rxconf;
struct dma_slave_config txconf;
struct dma_chan *rxchan;
struct dma_chan *txchan;
/* Device address base for DMA operations */
phys_addr_t rx_dma_addr;
phys_addr_t tx_dma_addr;
/* DMA address of the buffer in memory */
dma_addr_t rx_addr;
dma_addr_t tx_addr;
dma_cookie_t rx_cookie;
dma_cookie_t tx_cookie;
void *rx_buf;
size_t rx_size;
size_t tx_size;
unsigned char tx_running;
unsigned char tx_err;
unsigned char rx_running;
};
struct old_serial_port {
unsigned int uart;
unsigned int baud_base;
unsigned int port;
unsigned int irq;
upf_t flags;
unsigned char io_type;
unsigned char __iomem *iomem_base;
unsigned short iomem_reg_shift;
};
struct serial8250_config {
const char *name;
unsigned short fifo_size;
unsigned short tx_loadsz;
unsigned char fcr;
unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
unsigned int flags;
};
#define UART_CAP_FIFO BIT(8) /* UART has FIFO */
#define UART_CAP_EFR BIT(9) /* UART has EFR */
#define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */
#define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */
#define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */
#define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */
#define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */
#define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */
#define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */
#define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks:
* STOP PARITY EPAR SPAR WLEN5 WLEN6
*/
#define UART_CAP_NOTEMT BIT(18) /* UART without interrupt on TEMT available */
#define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */
#define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */
#define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */
#define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */
#define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */
/* Module parameters */
#define UART_NR CONFIG_SERIAL_8250_NR_UARTS
extern unsigned int nr_uarts;
#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
{ \
.iobase = _base, \
.irq = _irq, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = UPF_BOOT_AUTOCONF | (_flags), \
}
#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
extern struct uart_driver serial8250_reg;
void serial8250_register_ports(struct uart_driver *drv, struct device *dev);
/* Legacy ISA bus related APIs */
typedef void (*serial8250_isa_config_fn)(int, struct uart_port *, u32 *);
extern serial8250_isa_config_fn serial8250_isa_config;
void serial8250_isa_init_ports(void);
extern struct platform_device *serial8250_isa_devs;
extern const struct uart_ops *univ8250_port_base_ops;
extern struct uart_ops univ8250_port_ops;
static inline int serial_in(struct uart_8250_port *up, int offset)
{
return up->port.serial_in(&up->port, offset);
}
static inline void serial_out(struct uart_8250_port *up, int offset, int value)
{
up->port.serial_out(&up->port, offset, value);
}
/**
* serial_lsr_in - Read LSR register and preserve flags across reads
* @up: uart 8250 port
*
* Read LSR register and handle saving non-preserved flags across reads.
* The flags that are not preserved across reads are stored into
* up->lsr_saved_flags.
*
* Returns LSR value or'ed with the preserved flags (if any).
*/
static inline u16 serial_lsr_in(struct uart_8250_port *up)
{
u16 lsr = up->lsr_saved_flags;
lsr |= serial_in(up, UART_LSR);
up->lsr_saved_flags = lsr & up->lsr_save_mask;
return lsr;
}
/*
* For the 16C950
*/
static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
{
serial_out(up, UART_SCR, offset);
serial_out(up, UART_ICR, value);
}
static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
int offset)
{
unsigned int value;
serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
serial_out(up, UART_SCR, offset);
value = serial_in(up, UART_ICR);
serial_icr_write(up, UART_ACR, up->acr);
return value;
}
void serial8250_clear_fifos(struct uart_8250_port *p);
void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
void serial8250_fifo_wait_for_lsr_thre(struct uart_8250_port *up, unsigned int count);
void serial8250_rpm_get(struct uart_8250_port *p);
void serial8250_rpm_put(struct uart_8250_port *p);
DEFINE_GUARD(serial8250_rpm, struct uart_8250_port *,
serial8250_rpm_get(_T), serial8250_rpm_put(_T));
static inline u32 serial_dl_read(struct uart_8250_port *up)
{
return up->dl_read(up);
}
static inline void serial_dl_write(struct uart_8250_port *up, u32 value)
{
up->dl_write(up, value);
}
static inline bool serial8250_set_THRI(struct uart_8250_port *up)
{
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&up->port.lock);
if (up->ier & UART_IER_THRI)
return false;
up->ier |= UART_IER_THRI;
serial_out(up, UART_IER, up->ier);
return true;
}
static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
{
/* Port locked to synchronize UART_IER access against the console. */
lockdep_assert_held_once(&up->port.lock);
if (!(up->ier & UART_IER_THRI))
return false;
up->ier &= ~UART_IER_THRI;
serial_out(up, UART_IER, up->ier);
return true;
}
struct uart_8250_port *serial8250_setup_port(int index);
struct uart_8250_port *serial8250_get_port(int line);
int serial8250_em485_config(struct uart_port *port, struct ktermios *termios,
struct serial_rs485 *rs485);
void serial8250_em485_start_tx(struct uart_8250_port *p, bool toggle_ier);
void serial8250_em485_stop_tx(struct uart_8250_port *p, bool toggle_ier);
void serial8250_em485_destroy(struct uart_8250_port *p);
extern struct serial_rs485 serial8250_em485_supported;
/* MCR <-> TIOCM conversion */
static inline int serial8250_TIOCM_to_MCR(int tiocm)
{
int mcr = 0;
if (tiocm & TIOCM_RTS)
mcr |= UART_MCR_RTS;
if (tiocm & TIOCM_DTR)
mcr |= UART_MCR_DTR;
if (tiocm & TIOCM_OUT1)
mcr |= UART_MCR_OUT1;
if (tiocm & TIOCM_OUT2)
mcr |= UART_MCR_OUT2;
if (tiocm & TIOCM_LOOP)
mcr |= UART_MCR_LOOP;
return mcr;
}
static inline int serial8250_MCR_to_TIOCM(int mcr)
{
int tiocm = 0;
if (mcr & UART_MCR_RTS)
tiocm |= TIOCM_RTS;
if (mcr & UART_MCR_DTR)
tiocm |= TIOCM_DTR;
if (mcr & UART_MCR_OUT1)
tiocm |= TIOCM_OUT1;
if (mcr & UART_MCR_OUT2)
tiocm |= TIOCM_OUT2;
if (mcr & UART_MCR_LOOP)
tiocm |= TIOCM_LOOP;
return tiocm;
}
/* MSR <-> TIOCM conversion */
static inline int serial8250_MSR_to_TIOCM(int msr)
{
int tiocm = 0;
if (msr & UART_MSR_DCD)
tiocm |= TIOCM_CAR;
if (msr & UART_MSR_RI)
tiocm |= TIOCM_RNG;
if (msr & UART_MSR_DSR)
tiocm |= TIOCM_DSR;
if (msr & UART_MSR_CTS)
tiocm |= TIOCM_CTS;
return tiocm;
}
static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
{
serial_out(up, UART_MCR, value);
if (up->gpios)
mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
}
static inline int serial8250_in_MCR(struct uart_8250_port *up)
{
int mctrl;
mctrl = serial_in(up, UART_MCR);
if (up->gpios) {
unsigned int mctrl_gpio = 0;
mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
}
return mctrl;
}
#ifdef CONFIG_SERIAL_8250_PNP
int serial8250_pnp_init(void);
void serial8250_pnp_exit(void);
#else
static inline int serial8250_pnp_init(void) { return 0; }
static inline void serial8250_pnp_exit(void) { }
#endif
#ifdef CONFIG_SERIAL_8250_RSA
void univ8250_rsa_support(struct uart_ops *ops, const struct uart_ops *core_ops);
void rsa_enable(struct uart_8250_port *up);
void rsa_disable(struct uart_8250_port *up);
void rsa_autoconfig(struct uart_8250_port *up);
void rsa_reset(struct uart_8250_port *up);
#else
static inline void univ8250_rsa_support(struct uart_ops *ops, const struct uart_ops *core_ops) { }
static inline void rsa_enable(struct uart_8250_port *up) {}
static inline void rsa_disable(struct uart_8250_port *up) {}
static inline void rsa_autoconfig(struct uart_8250_port *up) {}
static inline void rsa_reset(struct uart_8250_port *up) {}
#endif
#ifdef CONFIG_SERIAL_8250_FINTEK
int fintek_8250_probe(struct uart_8250_port *uart);
#else
static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
#endif
#ifdef CONFIG_ARCH_OMAP1
#include <linux/soc/ti/omap1-soc.h>
static inline int is_omap1_8250(struct uart_8250_port *pt)
{
int res;
switch (pt->port.mapbase) {
case OMAP1_UART1_BASE:
case OMAP1_UART2_BASE:
case OMAP1_UART3_BASE:
res = 1;
break;
default:
res = 0;
break;
}
return res;
}
static inline int is_omap1510_8250(struct uart_8250_port *pt)
{
if (!cpu_is_omap1510())
return 0;
return is_omap1_8250(pt);
}
#else
static inline int is_omap1_8250(struct uart_8250_port *pt)
{
return 0;
}
static inline int is_omap1510_8250(struct uart_8250_port *pt)
{
return 0;
}
#endif
#ifdef CONFIG_SERIAL_8250_DMA
extern int serial8250_tx_dma(struct uart_8250_port *);
extern void serial8250_tx_dma_flush(struct uart_8250_port *);
extern int serial8250_rx_dma(struct uart_8250_port *);
extern void serial8250_rx_dma_flush(struct uart_8250_port *);
extern int serial8250_request_dma(struct uart_8250_port *);
extern void serial8250_release_dma(struct uart_8250_port *);
static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
{
struct uart_8250_dma *dma = p->dma;
if (dma->prepare_tx_dma)
dma->prepare_tx_dma(p);
}
static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
{
struct uart_8250_dma *dma = p->dma;
if (dma->prepare_rx_dma)
dma->prepare_rx_dma(p);
}
static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
{
struct uart_8250_dma *dma = p->dma;
return dma && dma->tx_running;
}
static inline void serial8250_tx_dma_pause(struct uart_8250_port *p)
{
struct uart_8250_dma *dma = p->dma;
if (!dma->tx_running)
return;
dmaengine_pause(dma->txchan);
}
static inline void serial8250_tx_dma_resume(struct uart_8250_port *p)
{
struct uart_8250_dma *dma = p->dma;
if (!dma->tx_running)
return;
dmaengine_resume(dma->txchan);
}
#else
static inline int serial8250_tx_dma(struct uart_8250_port *p)
{
return -1;
}
static inline void serial8250_tx_dma_flush(struct uart_8250_port *p) { }
static inline int serial8250_rx_dma(struct uart_8250_port *p)
{
return -1;
}
static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
static inline int serial8250_request_dma(struct uart_8250_port *p)
{
return -1;
}
static inline void serial8250_release_dma(struct uart_8250_port *p) { }
static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
{
return false;
}
static inline void serial8250_tx_dma_pause(struct uart_8250_port *p) { }
static inline void serial8250_tx_dma_resume(struct uart_8250_port *p) { }
#endif
static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
{
unsigned char status;
status = serial_in(up, 0x04); /* EXCR2 */
#define PRESL(x) ((x) & 0x30)
if (PRESL(status) == 0x10) {
/* already in high speed mode */
return 0;
} else {
status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
serial_out(up, 0x04, status);
}
return 1;
}
static inline int serial_index(struct uart_port *port)
{
return port->minor - 64;
}
] |
| 9/2 | 2026/04/07 13:35 | llm | expert |
0mModel:gemini-3-flash-preview Tokens: input: 50294 output: 27 thoughts: 44 Thoughts: Okay, here's my take on those thoughts, tailored for an expert audience: **Investigating the 8250 UART Structure** Alright, let me think this through. I'm taking a look through the `8250.h` header, specifically focusing on that `struct uart_8250_port` definition. Huh, can't seem to find it directly here. My immediate assumption is that it's been moved, likely for better organization or perhaps due to some refactoring. Given the naming convention and the general structure of the serial driver code I'm familiar with, I'm fairly certain the definition has got to be in `include/linux/serial_8250.h` now. That's the most logical place it would reside. I'll need to double-check there and see if my hunch is correct. I bet it's there. |
| 10/2 | 2026/04/07 13:35 | tool | read-file |
0mArgs:map[File:include/linux/serial_8250.h] Results: map[Contents:/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* linux/include/linux/serial_8250.h
*
* Copyright (C) 2004 Russell King
*/
#ifndef _LINUX_SERIAL_8250_H
#define _LINUX_SERIAL_8250_H
#include <linux/errno.h>
#include <linux/serial_core.h>
#include <linux/serial_reg.h>
#include <linux/platform_device.h>
struct uart_8250_port;
/*
* This is the platform device platform_data structure
*
* @mapsize: Port size for ioremap()
* @bugs: Port bugs
*
* @dl_read: ``u32 ()(struct uart_8250_port *up)``
*
* UART divisor latch read.
*
* @dl_write: ``void ()(struct uart_8250_port *up, u32 value)``
*
* Write @value into UART divisor latch.
*
* Locking: Caller holds port's lock.
*/
struct plat_serial8250_port {
unsigned long iobase; /* io base address */
void __iomem *membase; /* ioremap cookie or NULL */
resource_size_t mapbase; /* resource base */
resource_size_t mapsize;
unsigned int uartclk; /* UART clock rate */
unsigned int irq; /* interrupt number */
unsigned long irqflags; /* request_irq flags */
void *private_data;
unsigned char regshift; /* register shift */
unsigned char iotype; /* UPIO_* */
unsigned char hub6;
unsigned char has_sysrq; /* supports magic SysRq */
unsigned int type; /* If UPF_FIXED_TYPE */
upf_t flags; /* UPF_* flags */
u16 bugs; /* port bugs */
u32 (*serial_in)(struct uart_port *, unsigned int offset);
void (*serial_out)(struct uart_port *, unsigned int offset, u32 val);
u32 (*dl_read)(struct uart_8250_port *up);
void (*dl_write)(struct uart_8250_port *up, u32 value);
void (*set_termios)(struct uart_port *,
struct ktermios *new,
const struct ktermios *old);
void (*set_ldisc)(struct uart_port *,
struct ktermios *);
unsigned int (*get_mctrl)(struct uart_port *);
int (*handle_irq)(struct uart_port *);
void (*pm)(struct uart_port *, unsigned int state,
unsigned old);
void (*handle_break)(struct uart_port *);
};
/*
* Allocate 8250 platform device IDs. Nothing is implied by
* the numbering here, except for the legacy entry being -1.
*/
enum {
PLAT8250_DEV_LEGACY = -1,
PLAT8250_DEV_PLATFORM,
PLAT8250_DEV_PLATFORM1,
PLAT8250_DEV_PLATFORM2,
PLAT8250_DEV_FOURPORT,
PLAT8250_DEV_ACCENT,
PLAT8250_DEV_BOCA,
PLAT8250_DEV_EXAR_ST16C554,
PLAT8250_DEV_HUB6,
PLAT8250_DEV_AU1X00,
PLAT8250_DEV_SM501,
};
struct uart_8250_dma;
struct uart_8250_port;
/**
* 8250 core driver operations
*
* @setup_irq() Setup irq handling. The universal 8250 driver links this
* port to the irq chain. Other drivers may @request_irq().
* @release_irq() Undo irq handling. The universal 8250 driver unlinks
* the port from the irq chain.
*/
struct uart_8250_ops {
int (*setup_irq)(struct uart_8250_port *);
void (*release_irq)(struct uart_8250_port *);
void (*setup_timer)(struct uart_8250_port *);
};
struct uart_8250_em485 {
struct hrtimer start_tx_timer; /* "rs485 start tx" timer */
struct hrtimer stop_tx_timer; /* "rs485 stop tx" timer */
struct hrtimer *active_timer; /* pointer to active timer */
struct uart_8250_port *port; /* for hrtimer callbacks */
unsigned int tx_stopped:1; /* tx is currently stopped */
};
/*
* This should be used by drivers which want to register
* their own 8250 ports without registering their own
* platform device. Using these will make your driver
* dependent on the 8250 driver.
*
* @dl_read: ``u32 ()(struct uart_8250_port *port)``
*
* UART divisor latch read.
*
* @dl_write: ``void ()(struct uart_8250_port *port, u32 value)``
*
* Write @value into UART divisor latch.
*
* Locking: Caller holds port's lock.
*/
struct uart_8250_port {
struct uart_port port;
struct timer_list timer; /* "no irq" timer */
struct list_head list; /* ports on this IRQ */
u32 capabilities; /* port capabilities */
u16 bugs; /* port bugs */
unsigned int tx_loadsz; /* transmit fifo load size */
unsigned char acr;
unsigned char fcr;
unsigned char ier;
unsigned char lcr;
unsigned char mcr;
unsigned char cur_iotype; /* Running I/O type */
unsigned int rpm_tx_active;
unsigned char canary; /* non-zero during system sleep
* if no_console_suspend
*/
unsigned char probe;
struct mctrl_gpios *gpios;
#define UART_PROBE_RSA (1 << 0)
/*
* Some bits in registers are cleared on a read, so they must
* be saved whenever the register is read but the bits will not
* be immediately processed.
*/
#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
u16 lsr_saved_flags;
u16 lsr_save_mask;
#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
unsigned char msr_saved_flags;
struct uart_8250_dma *dma;
const struct uart_8250_ops *ops;
/* 8250 specific callbacks */
u32 (*dl_read)(struct uart_8250_port *up);
void (*dl_write)(struct uart_8250_port *up, u32 value);
struct uart_8250_em485 *em485;
void (*rs485_start_tx)(struct uart_8250_port *up, bool toggle_ier);
void (*rs485_stop_tx)(struct uart_8250_port *up, bool toggle_ier);
/* Serial port overrun backoff */
struct delayed_work overrun_backoff;
u32 overrun_backoff_time_ms;
};
static inline struct uart_8250_port *up_to_u8250p(struct uart_port *up)
{
return container_of(up, struct uart_8250_port, port);
}
int serial8250_register_8250_port(const struct uart_8250_port *);
void serial8250_unregister_port(int line);
void serial8250_suspend_port(int line);
void serial8250_resume_port(int line);
int early_serial_setup(struct uart_port *port);
int early_serial8250_setup(struct earlycon_device *device, const char *options);
void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk);
void serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
const struct ktermios *old);
void serial8250_do_set_ldisc(struct uart_port *port, struct ktermios *termios);
unsigned int serial8250_do_get_mctrl(struct uart_port *port);
int serial8250_do_startup(struct uart_port *port);
void serial8250_do_shutdown(struct uart_port *port);
void serial8250_do_pm(struct uart_port *port, unsigned int state,
unsigned int oldstate);
void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl);
void serial8250_do_set_divisor(struct uart_port *port, unsigned int baud,
unsigned int quot);
int fsl8250_handle_irq(struct uart_port *port);
void serial8250_handle_irq_locked(struct uart_port *port, unsigned int iir);
int serial8250_handle_irq(struct uart_port *port, unsigned int iir);
u16 serial8250_rx_chars(struct uart_8250_port *up, u16 lsr);
void serial8250_read_char(struct uart_8250_port *up, u16 lsr);
void serial8250_tx_chars(struct uart_8250_port *up);
unsigned int serial8250_modem_status(struct uart_8250_port *up);
void serial8250_init_port(struct uart_8250_port *up);
void serial8250_set_defaults(struct uart_8250_port *up);
void serial8250_console_write(struct uart_8250_port *up, const char *s,
unsigned int count);
int serial8250_console_setup(struct uart_port *port, char *options, bool probe);
int serial8250_console_exit(struct uart_port *port);
void serial8250_set_isa_configurator(void (*v)(int port, struct uart_port *up,
u32 *capabilities));
#ifdef CONFIG_SERIAL_8250_CONSOLE
extern int hp300_setup_serial_console(void) __init;
#else
static inline int hp300_setup_serial_console(void) { return 0; }
#endif
#ifdef CONFIG_SERIAL_8250_RT288X
int rt288x_setup(struct uart_port *p);
int au_platform_setup(struct plat_serial8250_port *p);
#else
static inline int rt288x_setup(struct uart_port *p) { return -ENODEV; }
static inline int au_platform_setup(struct plat_serial8250_port *p) { return -ENODEV; }
#endif
#endif
] |
| 11/2 | 2026/04/07 13:35 | llm | expert |
0mModel:gemini-3-flash-preview Tokens: input: 53466 output: 27 thoughts: 1504 Thoughts: **Analyzing a Potential Race Condition in UART Initialization** Okay, so I'm looking at a potential race condition. We have an `unsigned char ier;` field within the `struct uart_8250_port` structure, which is the shadow register for the UART's interrupt enable register. The race is between `serial8250_do_startup` (running in a thread) and `serial8250_handle_irq_locked` (the interrupt handler). The first writes to `up->ier`, while the second reads from it. Specifically, `serial8250_do_startup` sets `up->ier` to `UART_IER_RLSI | UART_IER_RDI`, a simple write. On the other hand, the interrupt handler checks `up->ier` against `UART_IER_THRI` within this if-statement: `if ((status & UART_LSR_THRE) && (up->ier & UART_IER_THRI))`. `serial8250_do_startup` is called during port opening, while the interrupt handler is triggered by an interrupt, which presumably indicates that IRQs are enabled and requested. The critical path appears to be: `setup_irq` is called, likely `request_irq`, but *after* that, we have the write to `up->ier`. This means an interrupt could occur before we configure the interrupt enable register, specifically before `up->ier` is set to enable receive interrupts. However, `serial8250_do_startup` also calls `serial8250_clear_interrupts` and `serial8250_initialize` *before* the critical write. Let's look at what's in `serial8250_initialize`. In `serial8250_initialize`, the code calls `serial8250_iir_txen_test`. And this function *does* write to the hardware IER register! But it doesn't write to the `up->ier` shadow register, so we don't have a direct data race here. Back to `serial8250_do_startup`, the crucial write `up->ier = UART_IER_RLSI | UART_IER_RDI` is *not* protected by `port->lock`. But hold on, the interrupt handler is called with `port->lock` held! `serial8250_handle_irq` takes the lock first. Thus, `serial8250_do_startup` writes to the register without holding the lock. Is this a problem? The critical thing is that `up->ier` is a shadow register. If `serial8250_do_startup` sets `up->ier` to `UART_IER_RLSI | UART_IER_RDI`, it *clears* `UART_IER_THRI` if it was set. In this case, the value changed from `0x00` to `0x05`, where `0x05` is `UART_IER_RLSI | UART_IER_RDI`. This means it *overwrites* any previous state. I need to make sure I am accounting for that, so that the change doesn't cause interrupts to be missed, or unexpected interrupts to occur. Okay, let's double check my definitions: `UART_IER_RDI` is 0x01, and `UART_IER_RLSI` is 0x04. And now, I need to check the exact behavior of `serial8250_handle_irq_locked`, and what is being handled by the interrupt handler. |
| 12/2 | 2026/04/07 13:36 | tool | read-file |
0mArgs:map[File:include/uapi/linux/serial_reg.h] Results: map[Contents:/* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */ /* * include/linux/serial_reg.h * * Copyright (C) 1992, 1994 by Theodore Ts'o. * * Redistribution of this file is permitted under the terms of the GNU * Public License (GPL) * * These are the UART port assignments, expressed as offsets from the base * register. These assignments should hold for any serial port based on * a 8250, 16450, or 16550(A). */ #ifndef _LINUX_SERIAL_REG_H #define _LINUX_SERIAL_REG_H /* * DLAB=0 */ #define UART_RX 0 /* In: Receive buffer */ #define UART_TX 0 /* Out: Transmit buffer */ #define UART_IER 1 /* Out: Interrupt Enable Register */ #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ #define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ /* * Sleep mode for ST16650 and TI16750. For the ST16650, EFR[4]=1 */ #define UART_IERX_SLEEP 0x10 /* Enable sleep mode */ #define UART_IIR 2 /* In: Interrupt ID Register */ #define UART_IIR_NO_INT 0x01 /* No interrupts pending */ #define UART_IIR_ID 0x0e /* Mask for the interrupt ID */ #define UART_IIR_MSI 0x00 /* Modem status interrupt */ #define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ #define UART_IIR_RDI 0x04 /* Receiver data interrupt */ #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ #define UART_IIR_BUSY 0x07 /* DesignWare APB Busy Detect */ #define UART_IIR_RX_TIMEOUT 0x0c /* OMAP RX Timeout interrupt */ #define UART_IIR_XOFF 0x10 /* OMAP XOFF/Special Character */ #define UART_IIR_CTS_RTS_DSR 0x20 /* OMAP CTS/RTS/DSR Change */ #define UART_IIR_64BYTE_FIFO 0x20 /* 16750 64 bytes FIFO */ #define UART_IIR_FIFO_ENABLED 0xc0 /* FIFOs enabled / port type identification */ #define UART_IIR_FIFO_ENABLED_8250 0x00 /* 8250: no FIFO */ #define UART_IIR_FIFO_ENABLED_16550 0x80 /* 16550: (broken/unusable) FIFO */ #define UART_IIR_FIFO_ENABLED_16550A 0xc0 /* 16550A: FIFO enabled */ #define UART_IIR_FIFO_ENABLED_16750 0xe0 /* 16750: 64 bytes FIFO enabled */ #define UART_FCR 2 /* Out: FIFO Control Register */ #define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ #define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ #define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ #define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ /* * Note: The FIFO trigger levels are chip specific: * RX:76 = 00 01 10 11 TX:54 = 00 01 10 11 * PC16550D: 1 4 8 14 xx xx xx xx * TI16C550A: 1 4 8 14 xx xx xx xx * TI16C550C: 1 4 8 14 xx xx xx xx * ST16C550: 1 4 8 14 xx xx xx xx * ST16C650: 8 16 24 28 16 8 24 30 PORT_16650V2 * NS16C552: 1 4 8 14 xx xx xx xx * ST16C654: 8 16 56 60 8 16 32 56 PORT_16654 * TI16C750: 1 16 32 56 xx xx xx xx PORT_16750 * TI16C752: 8 16 56 60 8 16 32 56 * OX16C950: 16 32 112 120 16 32 64 112 PORT_16C950 * Tegra: 1 4 8 14 16 8 4 1 PORT_TEGRA */ #define UART_FCR_R_TRIG_00 0x00 #define UART_FCR_R_TRIG_01 0x40 #define UART_FCR_R_TRIG_10 0x80 #define UART_FCR_R_TRIG_11 0xc0 #define UART_FCR_T_TRIG_00 0x00 #define UART_FCR_T_TRIG_01 0x10 #define UART_FCR_T_TRIG_10 0x20 #define UART_FCR_T_TRIG_11 0x30 #define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ #define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ #define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ #define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ #define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ /* 16650 definitions */ #define UART_FCR6_R_TRIGGER_8 0x00 /* Mask for receive trigger set at 1 */ #define UART_FCR6_R_TRIGGER_16 0x40 /* Mask for receive trigger set at 4 */ #define UART_FCR6_R_TRIGGER_24 0x80 /* Mask for receive trigger set at 8 */ #define UART_FCR6_R_TRIGGER_28 0xC0 /* Mask for receive trigger set at 14 */ #define UART_FCR6_T_TRIGGER_16 0x00 /* Mask for transmit trigger set at 16 */ #define UART_FCR6_T_TRIGGER_8 0x10 /* Mask for transmit trigger set at 8 */ #define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */ #define UART_FCR6_T_TRIGGER_30 0x30 /* Mask for transmit trigger set at 30 */ #define UART_FCR7_64BYTE 0x20 /* Go into 64 byte mode (TI16C750 and some Freescale UARTs) */ #define UART_FCR_R_TRIG_SHIFT 6 #define UART_FCR_R_TRIG_BITS(x) \ (((x) & UART_FCR_TRIGGER_MASK) >> UART_FCR_R_TRIG_SHIFT) #define UART_FCR_R_TRIG_MAX_STATE 4 #define UART_LCR 3 /* Out: Line Control Register */ /* * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. */ #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ #define UART_LCR_SBC 0x40 /* Set break control */ #define UART_LCR_SPAR 0x20 /* Stick parity (?) */ #define UART_LCR_EPAR 0x10 /* Even parity select */ #define UART_LCR_PARITY 0x08 /* Parity Enable */ #define UART_LCR_STOP 0x04 /* Stop bits: 0=1 bit, 1=2 bits */ #define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */ #define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */ #define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ #define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ /* * Access to some registers depends on register access / configuration * mode. */ #define UART_LCR_CONF_MODE_A UART_LCR_DLAB /* Configutation mode A */ #define UART_LCR_CONF_MODE_B 0xBF /* Configutation mode B */ #define UART_MCR 4 /* Out: Modem Control Register */ #define UART_MCR_CLKSEL 0x80 /* Divide clock by 4 (TI16C752, EFR[4]=1) */ #define UART_MCR_TCRTLR 0x40 /* Access TCR/TLR (TI16C752, EFR[4]=1) */ #define UART_MCR_XONANY 0x20 /* Enable Xon Any (TI16C752, EFR[4]=1) */ #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */ #define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ #define UART_MCR_OUT2 0x08 /* Out2 complement */ #define UART_MCR_OUT1 0x04 /* Out1 complement */ #define UART_MCR_RTS 0x02 /* RTS complement */ #define UART_MCR_DTR 0x01 /* DTR complement */ #define UART_LSR 5 /* In: Line Status Register */ #define UART_LSR_FIFOE 0x80 /* Fifo error */ #define UART_LSR_TEMT 0x40 /* Transmitter empty */ #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ #define UART_LSR_BI 0x10 /* Break interrupt indicator */ #define UART_LSR_FE 0x08 /* Frame error indicator */ #define UART_LSR_PE 0x04 /* Parity error indicator */ #define UART_LSR_OE 0x02 /* Overrun error indicator */ #define UART_LSR_DR 0x01 /* Receiver data ready */ #define UART_LSR_BRK_ERROR_BITS (UART_LSR_BI|UART_LSR_FE|UART_LSR_PE|UART_LSR_OE) #define UART_MSR 6 /* In: Modem Status Register */ #define UART_MSR_DCD 0x80 /* Data Carrier Detect */ #define UART_MSR_RI 0x40 /* Ring Indicator */ #define UART_MSR_DSR 0x20 /* Data Set Ready */ #define UART_MSR_CTS 0x10 /* Clear to Send */ #define UART_MSR_DDCD 0x08 /* Delta DCD */ #define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ #define UART_MSR_DDSR 0x02 /* Delta DSR */ #define UART_MSR_DCTS 0x01 /* Delta CTS */ #define UART_MSR_ANY_DELTA (UART_MSR_DDCD|UART_MSR_TERI|UART_MSR_DDSR|UART_MSR_DCTS) #define UART_SCR 7 /* I/O: Scratch Register */ /* * DLAB=1 */ #define UART_DLL 0 /* Out: Divisor Latch Low */ #define UART_DLM 1 /* Out: Divisor Latch High */ #define UART_DIV_MAX 0xFFFF /* Max divisor value */ /* * LCR=0xBF (or DLAB=1 for 16C660) */ #define UART_EFR 2 /* I/O: Extended Features Register */ #define UART_XR_EFR 9 /* I/O: Extended Features Register (XR17D15x) */ #define UART_EFR_CTS 0x80 /* CTS flow control */ #define UART_EFR_RTS 0x40 /* RTS flow control */ #define UART_EFR_SCD 0x20 /* Special character detect */ #define UART_EFR_ECB 0x10 /* Enhanced control bit */ /* * the low four bits control software flow control */ /* * LCR=0xBF, TI16C752, ST16650, ST16650A, ST16654 */ #define UART_XON1 4 /* I/O: Xon character 1 */ #define UART_XON2 5 /* I/O: Xon character 2 */ #define UART_XOFF1 6 /* I/O: Xoff character 1 */ #define UART_XOFF2 7 /* I/O: Xoff character 2 */ /* * EFR[4]=1 MCR[6]=1, TI16C752 */ #define UART_TI752_TCR 6 /* I/O: transmission control register */ #define UART_TI752_TLR 7 /* I/O: trigger level register */ /* * LCR=0xBF, XR16C85x */ #define UART_TRG 0 /* FCTR bit 7 selects Rx or Tx * In: Fifo count * Out: Fifo custom trigger levels */ /* * These are the definitions for the Programmable Trigger Register */ #define UART_TRG_1 0x01 #define UART_TRG_4 0x04 #define UART_TRG_8 0x08 #define UART_TRG_16 0x10 #define UART_TRG_32 0x20 #define UART_TRG_64 0x40 #define UART_TRG_96 0x60 #define UART_TRG_120 0x78 #define UART_TRG_128 0x80 #define UART_FCTR 1 /* Feature Control Register */ #define UART_FCTR_RTS_NODELAY 0x00 /* RTS flow control delay */ #define UART_FCTR_RTS_4DELAY 0x01 #define UART_FCTR_RTS_6DELAY 0x02 #define UART_FCTR_RTS_8DELAY 0x03 #define UART_FCTR_IRDA 0x04 /* IrDa data encode select */ #define UART_FCTR_TX_INT 0x08 /* Tx interrupt type select */ #define UART_FCTR_TRGA 0x00 /* Tx/Rx 550 trigger table select */ #define UART_FCTR_TRGB 0x10 /* Tx/Rx 650 trigger table select */ #define UART_FCTR_TRGC 0x20 /* Tx/Rx 654 trigger table select */ #define UART_FCTR_TRGD 0x30 /* Tx/Rx 850 programmable trigger select */ #define UART_FCTR_SCR_SWAP 0x40 /* Scratch pad register swap */ #define UART_FCTR_RX 0x00 /* Programmable trigger mode select */ #define UART_FCTR_TX 0x80 /* Programmable trigger mode select */ /* * LCR=0xBF, FCTR[6]=1 */ #define UART_EMSR 7 /* Extended Mode Select Register */ #define UART_EMSR_FIFO_COUNT 0x01 /* Rx/Tx select */ #define UART_EMSR_ALT_COUNT 0x02 /* Alternating count select */ /* * The Intel XScale on-chip UARTs define these bits */ #define UART_IER_DMAE 0x80 /* DMA Requests Enable */ #define UART_IER_UUE 0x40 /* UART Unit Enable */ #define UART_IER_NRZE 0x20 /* NRZ coding Enable */ #define UART_IER_RTOIE 0x10 /* Receiver Time Out Interrupt Enable */ #define UART_IIR_TOD 0x08 /* Character Timeout Indication Detected */ #define UART_FCR_PXAR1 0x00 /* receive FIFO threshold = 1 */ #define UART_FCR_PXAR8 0x40 /* receive FIFO threshold = 8 */ #define UART_FCR_PXAR16 0x80 /* receive FIFO threshold = 16 */ #define UART_FCR_PXAR32 0xc0 /* receive FIFO threshold = 32 */ /* * These register definitions are for the 16C950 */ #define UART_ASR 0x01 /* Additional Status Register */ #define UART_RFL 0x03 /* Receiver FIFO level */ #define UART_TFL 0x04 /* Transmitter FIFO level */ #define UART_ICR 0x05 /* Index Control Register */ /* The 16950 ICR registers */ #define UART_ACR 0x00 /* Additional Control Register */ #define UART_CPR 0x01 /* Clock Prescalar Register */ #define UART_TCR 0x02 /* Times Clock Register */ #define UART_CKS 0x03 /* Clock Select Register */ #define UART_TTL 0x04 /* Transmitter Interrupt Trigger Level */ #define UART_RTL 0x05 /* Receiver Interrupt Trigger Level */ #define UART_FCL 0x06 /* Flow Control Level Lower */ #define UART_FCH 0x07 /* Flow Control Level Higher */ #define UART_ID1 0x08 /* ID #1 */ #define UART_ID2 0x09 /* ID #2 */ #define UART_ID3 0x0A /* ID #3 */ #define UART_REV 0x0B /* Revision */ #define UART_CSR 0x0C /* Channel Software Reset */ #define UART_NMR 0x0D /* Nine-bit Mode Register */ #define UART_CTR 0xFF /* * The 16C950 Additional Control Register */ #define UART_ACR_RXDIS 0x01 /* Receiver disable */ #define UART_ACR_TXDIS 0x02 /* Transmitter disable */ #define UART_ACR_DSRFC 0x04 /* DSR Flow Control */ #define UART_ACR_TLENB 0x20 /* 950 trigger levels enable */ #define UART_ACR_ICRRD 0x40 /* ICR Read enable */ #define UART_ACR_ASREN 0x80 /* Additional status enable */ /* * These definitions are for the RSA-DV II/S card, from * * Kiyokazu SUTO <suto@ks-and-ks.ne.jp> */ #define UART_RSA_BASE (-8) #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */ #define UART_RSA_MSR_SWAP (1 << 0) /* Swap low/high 8 bytes in I/O port addr */ #define UART_RSA_MSR_FIFO (1 << 2) /* Enable the external FIFO */ #define UART_RSA_MSR_FLOW (1 << 3) /* Enable the auto RTS/CTS flow control */ #define UART_RSA_MSR_ITYP (1 << 4) /* Level (1) / Edge triger (0) */ #define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */ #define UART_RSA_IER_Rx_FIFO_H (1 << 0) /* Enable Rx FIFO half full int. */ #define UART_RSA_IER_Tx_FIFO_H (1 << 1) /* Enable Tx FIFO half full int. */ #define UART_RSA_IER_Tx_FIFO_E (1 << 2) /* Enable Tx FIFO empty int. */ #define UART_RSA_IER_Rx_TOUT (1 << 3) /* Enable char receive timeout int */ #define UART_RSA_IER_TIMER (1 << 4) /* Enable timer interrupt */ #define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */ #define UART_RSA_SRR_Tx_FIFO_NEMP (1 << 0) /* Tx FIFO is not empty (1) */ #define UART_RSA_SRR_Tx_FIFO_NHFL (1 << 1) /* Tx FIFO is not half full (1) */ #define UART_RSA_SRR_Tx_FIFO_NFUL (1 << 2) /* Tx FIFO is not full (1) */ #define UART_RSA_SRR_Rx_FIFO_NEMP (1 << 3) /* Rx FIFO is not empty (1) */ #define UART_RSA_SRR_Rx_FIFO_NHFL (1 << 4) /* Rx FIFO is not half full (1) */ #define UART_RSA_SRR_Rx_FIFO_NFUL (1 << 5) /* Rx FIFO is not full (1) */ #define UART_RSA_SRR_Rx_TOUT (1 << 6) /* Character reception timeout occurred (1) */ #define UART_RSA_SRR_TIMER (1 << 7) /* Timer interrupt occurred */ #define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */ #define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */ #define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */ #define UART_RSA_TCR_SWITCH (1 << 0) /* Timer on */ /* * The RSA DSV/II board has two fixed clock frequencies. One is the * standard rate, and the other is 8 times faster. */ #define SERIAL_RSA_BAUD_BASE (921600) #define SERIAL_RSA_BAUD_BASE_LO (SERIAL_RSA_BAUD_BASE / 8) /* Extra registers for TI DA8xx/66AK2x */ #define UART_DA830_PWREMU_MGMT 12 /* PWREMU_MGMT register bits */ #define UART_DA830_PWREMU_MGMT_FREE (1 << 0) /* Free-running mode */ #define UART_DA830_PWREMU_MGMT_URRST (1 << 13) /* Receiver reset/enable */ #define UART_DA830_PWREMU_MGMT_UTRST (1 << 14) /* Transmitter reset/enable */ /* * Extra serial register definitions for the internal UARTs * in TI OMAP processors. */ #define OMAP1_UART1_BASE 0xfffb0000 #define OMAP1_UART2_BASE 0xfffb0800 #define OMAP1_UART3_BASE 0xfffb9800 #define UART_OMAP_MDR1 0x08 /* Mode definition register */ #define UART_OMAP_MDR2 0x09 /* Mode definition register 2 */ #define UART_OMAP_SCR 0x10 /* Supplementary control register */ #define UART_OMAP_SSR 0x11 /* Supplementary status register */ #define UART_OMAP_EBLR 0x12 /* BOF length register */ #define UART_OMAP_OSC_12M_SEL 0x13 /* OMAP1510 12MHz osc select */ #define UART_OMAP_MVER 0x14 /* Module version register */ #define UART_OMAP_SYSC 0x15 /* System configuration register */ #define UART_OMAP_SYSS 0x16 /* System status register */ #define UART_OMAP_WER 0x17 /* Wake-up enable register */ #define UART_OMAP_TX_LVL 0x1a /* TX FIFO level register */ /* * These are the definitions for the MDR1 register */ #define UART_OMAP_MDR1_16X_MODE 0x00 /* UART 16x mode */ #define UART_OMAP_MDR1_SIR_MODE 0x01 /* SIR mode */ #define UART_OMAP_MDR1_16X_ABAUD_MODE 0x02 /* UART 16x auto-baud */ #define UART_OMAP_MDR1_13X_MODE 0x03 /* UART 13x mode */ #define UART_OMAP_MDR1_MIR_MODE 0x04 /* MIR mode */ #define UART_OMAP_MDR1_FIR_MODE 0x05 /* FIR mode */ #define UART_OMAP_MDR1_CIR_MODE 0x06 /* CIR mode */ #define UART_OMAP_MDR1_DISABLE 0x07 /* Disable (default state) */ /* * These are definitions for the Altera ALTR_16550_F32/F64/F128 * Normalized from 0x100 to 0x40 because of shift by 2 (32 bit regs). */ #define UART_ALTR_AFR 0x40 /* Additional Features Register */ #define UART_ALTR_EN_TXFIFO_LW 0x01 /* Enable the TX FIFO Low Watermark */ #define UART_ALTR_TX_LOW 0x41 /* Tx FIFO Low Watermark */ #endif /* _LINUX_SERIAL_REG_H */ ] |
| 13/2 | 2026/04/07 13:36 | llm | expert |
0mModel:gemini-3-flash-preview Tokens: input: 62382 output: 34 thoughts: 3197 Thoughts: **Analysis of Interrupt Handler Behavior During UART Initialization** Okay, so I've been tracing the interrupt handling in this serial driver, and here's what's bothering me. The key issue is the potential race condition between the startup thread and the interrupt handler regarding the `up->ier` value. It looks like the startup process initializes `up->ier` to `UART_IER_RLSI | UART_IER_RDI` (0x05) in `serial8250_do_startup`. This sets the shadow register. However, I'm now understanding that this *doesn't* immediately update the hardware IER register. The hardware register is updated later during `set_termios`, *after* startup has run and control has returned to the main process. The interrupt handler, specifically `serial8250_handle_irq_locked`, reads `up->ier` to determine if it should handle receive interrupts (RDI, RLSI) or modem status interrupts (MSI) or transmit interrupts (THRI). The concern is that the interrupt handler might execute before the hardware IER is updated. The code assumes that the interrupt handler's `up->ier` read is consistent with the hardware IER. A stale `up->ier` means that when an interrupt occurs, the handler *might* read a value that doesn't reflect the current interrupt enable state. But, that's not what I'm seeing based on how this code is written. The values that `up->ier` can take are limited, and even if a stale `0x00` is read, it likely won't skip processing. Here's the problem: The report says the interrupt handler runs *before* the IER is updated. If the hardware IER is zero at this point (and it should be, until `set_termios` is called) because `serial8250_do_startup` has set the shadow copy, then the interrupt handler should *not* be running for this UART. I'm starting to think about shared interrupts. If this is a shared interrupt line, some *other* device might be generating an interrupt, which then triggers the 8250's handler. But then the handler would read the IIR, and if it's `UART_IIR_NO_INT`, it should return early. So why would it even hit the interrupt lock? So, if the IIR doesn't have `UART_IIR_NO_INT`, and we are reading `up->ier`, there *was* an interrupt for this UART. How is this possible if the IER is zero in hardware? Maybe some hardware quirk, or some other interrupt source. There is one important point. `serial8250_handle_irq_locked` has this code: ```c 1804: if (!(status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS)) && 1805: (port->status & (UPSTAT_AUTOCTS | UPSTAT_AUTORTS)) && 1806: !(up->ier & (UART_IER_RLSI | UART_IER_RDI))) 1807: skip_rx = true; ``` This *could* cause it to skip RX processing if `up->ier` is read as zero, *but* only if `UPSTAT_AUTOCTS` or `UPSTAT_AUTORTS` are set. However, this doesn't explain the *interrupt* occurring in the first place, or how this is even possible if the hardware IER is zero. I think the key is this - *if* the interrupt is for *this* UART, the fact that a stale `up->ier` is read isn't that important. Even if the RX and Line Status bits are not enabled, if there is a real interrupt, then we'd read the IIR, and go into the code. This means the values being set later don't really matter. We will catch this as the interrupt is handled. So, the issue is not data corruption *per se*. The issue is a race *that is handled properly*. The issue is that the interrupt *shouldn't* happen in the first place, if the IER has not been set, and we are not seeing a spurious interrupt from some other device on the IRQ line. |
| 14/2 | 2026/04/07 13:36 | tool | read-file |
0mArgs:map[File:drivers/tty/serial/8250/8250_core.c] Results: map[Contents:// SPDX-License-Identifier: GPL-2.0+
/*
* Universal/legacy driver for 8250/16550-type serial ports
*
* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
*
* Copyright (C) 2001 Russell King.
*
* Supports:
* early_serial_setup() ports
* userspace-configurable "phantom" ports
* serial8250_register_8250_port() ports
*/
#include <linux/acpi.h>
#include <linux/hashtable.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/sysrq.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/tty.h>
#include <linux/ratelimit.h>
#include <linux/tty_flip.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/nmi.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/string_helpers.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <asm/irq.h>
#include "8250.h"
#define PASS_LIMIT 512
struct irq_info {
struct hlist_node node;
int irq;
spinlock_t lock; /* Protects list not the hash */
struct list_head *head;
};
#define IRQ_HASH_BITS 5 /* Can be adjusted later */
static DEFINE_HASHTABLE(irq_lists, IRQ_HASH_BITS);
static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
static bool skip_txen_test;
module_param(skip_txen_test, bool, 0644);
MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
/*
* This is the serial driver's interrupt routine.
*
* Arjan thinks the old way was overly complex, so it got simplified.
* Alan disagrees, saying that need the complexity to handle the weird
* nature of ISA shared interrupts. (This is a special exception.)
*
* In order to handle ISA shared interrupts properly, we need to check
* that all ports have been serviced, and therefore the ISA interrupt
* line has been de-asserted.
*
* This means we need to loop through all ports. checking that they
* don't have an interrupt pending.
*/
static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
{
struct irq_info *i = dev_id;
struct list_head *l, *end = NULL;
int pass_counter = 0, handled = 0;
guard(spinlock)(&i->lock);
l = i->head;
do {
struct uart_8250_port *up = list_entry(l, struct uart_8250_port, list);
struct uart_port *port = &up->port;
if (port->handle_irq(port)) {
handled = 1;
end = NULL;
} else if (end == NULL)
end = l;
l = l->next;
if (l == i->head && pass_counter++ > PASS_LIMIT)
break;
} while (l != end);
return IRQ_RETVAL(handled);
}
/*
* To support ISA shared interrupts, we need to have one interrupt
* handler that ensures that the IRQ line has been deasserted
* before returning. Failing to do this will result in the IRQ
* line being stuck active, and, since ISA irqs are edge triggered,
* no more IRQs will be seen.
*/
static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
{
spin_lock_irq(&i->lock);
if (!list_empty(i->head)) {
if (i->head == &up->list)
i->head = i->head->next;
list_del(&up->list);
} else {
BUG_ON(i->head != &up->list);
i->head = NULL;
}
spin_unlock_irq(&i->lock);
/* List empty so throw away the hash node */
if (i->head == NULL) {
hlist_del(&i->node);
kfree(i);
}
}
/*
* Either:
* - find the corresponding info in the hashtable and return it, or
* - allocate a new one, add it to the hashtable and return it.
*/
static struct irq_info *serial_get_or_create_irq_info(const struct uart_8250_port *up)
{
struct irq_info *i;
guard(mutex)(&hash_mutex);
hash_for_each_possible(irq_lists, i, node, up->port.irq)
if (i->irq == up->port.irq)
return i;
i = kzalloc_obj(*i);
if (i == NULL)
return ERR_PTR(-ENOMEM);
spin_lock_init(&i->lock);
i->irq = up->port.irq;
hash_add(irq_lists, &i->node, i->irq);
return i;
}
static int serial_link_irq_chain(struct uart_8250_port *up)
{
struct irq_info *i;
int ret;
i = serial_get_or_create_irq_info(up);
if (IS_ERR(i))
return PTR_ERR(i);
scoped_guard(spinlock_irq, &i->lock) {
if (i->head) {
list_add(&up->list, i->head);
return 0;
}
INIT_LIST_HEAD(&up->list);
i->head = &up->list;
}
ret = request_irq(up->port.irq, serial8250_interrupt, up->port.irqflags, up->port.name, i);
if (ret < 0)
serial_do_unlink(i, up);
return ret;
}
static void serial_unlink_irq_chain(struct uart_8250_port *up)
{
struct irq_info *i;
guard(mutex)(&hash_mutex);
hash_for_each_possible(irq_lists, i, node, up->port.irq)
if (i->irq == up->port.irq) {
if (WARN_ON(i->head == NULL))
return;
if (list_empty(i->head))
free_irq(up->port.irq, i);
serial_do_unlink(i, up);
return;
}
WARN_ON(1);
}
/*
* This function is used to handle ports that do not have an
* interrupt. This doesn't work very well for 16450's, but gives
* barely passable results for a 16550A. (Although at the expense
* of much CPU overhead).
*/
static void serial8250_timeout(struct timer_list *t)
{
struct uart_8250_port *up = timer_container_of(up, t, timer);
up->port.handle_irq(&up->port);
mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
}
static void serial8250_backup_timeout(struct timer_list *t)
{
struct uart_8250_port *up = timer_container_of(up, t, timer);
unsigned int iir, ier = 0, lsr;
unsigned long flags;
uart_port_lock_irqsave(&up->port, &flags);
/*
* Must disable interrupts or else we risk racing with the interrupt
* based handler.
*/
if (up->port.irq) {
ier = serial_in(up, UART_IER);
serial_out(up, UART_IER, 0);
}
iir = serial_in(up, UART_IIR);
/*
* This should be a safe test for anyone who doesn't trust the
* IIR bits on their UART, but it's specifically designed for
* the "Diva" UART used on the management processor on many HP
* ia64 and parisc boxes.
*/
lsr = serial_lsr_in(up);
if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
(!kfifo_is_empty(&up->port.state->port.xmit_fifo) ||
up->port.x_char) &&
(lsr & UART_LSR_THRE)) {
iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
iir |= UART_IIR_THRI;
}
if (!(iir & UART_IIR_NO_INT))
serial8250_tx_chars(up);
if (up->port.irq)
serial_out(up, UART_IER, ier);
uart_port_unlock_irqrestore(&up->port, flags);
/* Standard timer interval plus 0.2s to keep the port running */
mod_timer(&up->timer,
jiffies + uart_poll_timeout(&up->port) + HZ / 5);
}
static void univ8250_setup_timer(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
/*
* The above check will only give an accurate result the first time
* the port is opened so this value needs to be preserved.
*/
if (up->bugs & UART_BUG_THRE) {
pr_debug("%s - using backup timer\n", port->name);
up->timer.function = serial8250_backup_timeout;
mod_timer(&up->timer, jiffies +
uart_poll_timeout(port) + HZ / 5);
}
/*
* If the "interrupt" for this port doesn't correspond with any
* hardware interrupt, we use a timer-based system. The original
* driver used to do this with IRQ0.
*/
if (!port->irq)
mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
}
static int univ8250_setup_irq(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
if (port->irq)
return serial_link_irq_chain(up);
return 0;
}
static void univ8250_release_irq(struct uart_8250_port *up)
{
struct uart_port *port = &up->port;
timer_delete_sync(&up->timer);
up->timer.function = serial8250_timeout;
if (port->irq)
serial_unlink_irq_chain(up);
}
const struct uart_ops *univ8250_port_base_ops;
struct uart_ops univ8250_port_ops;
static const struct uart_8250_ops univ8250_driver_ops = {
.setup_irq = univ8250_setup_irq,
.release_irq = univ8250_release_irq,
.setup_timer = univ8250_setup_timer,
};
static struct uart_8250_port serial8250_ports[UART_NR];
/**
* serial8250_get_port - retrieve struct uart_8250_port
* @line: serial line number
*
* This function retrieves struct uart_8250_port for the specific line.
* This struct *must* *not* be used to perform a 8250 or serial core operation
* which is not accessible otherwise. Its only purpose is to make the struct
* accessible to the runtime-pm callbacks for context suspend/restore.
* The lock assumption made here is none because runtime-pm suspend/resume
* callbacks should not be invoked if there is any operation performed on the
* port.
*/
struct uart_8250_port *serial8250_get_port(int line)
{
return &serial8250_ports[line];
}
EXPORT_SYMBOL_GPL(serial8250_get_port);
static inline void serial8250_apply_quirks(struct uart_8250_port *up)
{
up->port.quirks |= skip_txen_test ? UPQ_NO_TXEN_TEST : 0;
}
struct uart_8250_port *serial8250_setup_port(int index)
{
struct uart_8250_port *up;
if (index >= UART_NR)
return NULL;
up = &serial8250_ports[index];
up->port.line = index;
up->port.port_id = index;
serial8250_init_port(up);
if (!univ8250_port_base_ops)
univ8250_port_base_ops = up->port.ops;
up->port.ops = &univ8250_port_ops;
timer_setup(&up->timer, serial8250_timeout, 0);
up->ops = &univ8250_driver_ops;
serial8250_set_defaults(up);
return up;
}
void __init serial8250_register_ports(struct uart_driver *drv, struct device *dev)
{
int i;
for (i = 0; i < nr_uarts; i++) {
struct uart_8250_port *up = &serial8250_ports[i];
if (up->port.type == PORT_8250_CIR)
continue;
if (up->port.dev)
continue;
up->port.dev = dev;
if (uart_console_registered(&up->port))
pm_runtime_get_sync(up->port.dev);
serial8250_apply_quirks(up);
uart_add_one_port(drv, &up->port);
}
}
#ifdef CONFIG_SERIAL_8250_CONSOLE
static void univ8250_console_write(struct console *co, const char *s,
unsigned int count)
{
struct uart_8250_port *up = &serial8250_ports[co->index];
serial8250_console_write(up, s, count);
}
static int univ8250_console_setup(struct console *co, char *options)
{
struct uart_8250_port *up;
struct uart_port *port;
int retval, i;
/*
* Check whether an invalid uart number has been specified, and
* if so, search for the first available port that does have
* console support.
*/
if (co->index < 0 || co->index >= UART_NR)
co->index = 0;
/*
* If the console is past the initial isa ports, init more ports up to
* co->index as needed and increment nr_uarts accordingly.
*/
for (i = nr_uarts; i <= co->index; i++) {
up = serial8250_setup_port(i);
if (!up)
return -ENODEV;
nr_uarts++;
}
port = &serial8250_ports[co->index].port;
/* link port to console */
uart_port_set_cons(port, co);
retval = serial8250_console_setup(port, options, false);
if (retval != 0)
uart_port_set_cons(port, NULL);
return retval;
}
static int univ8250_console_exit(struct console *co)
{
struct uart_port *port;
port = &serial8250_ports[co->index].port;
return serial8250_console_exit(port);
}
/**
* univ8250_console_match - non-standard console matching
* @co: registering console
* @name: name from console command line
* @idx: index from console command line
* @options: ptr to option string from console command line
*
* Only attempts to match console command lines of the form:
* console=uart[8250],io|mmio|mmio16|mmio32,<addr>[,<options>]
* console=uart[8250],0x<addr>[,<options>]
* This form is used to register an initial earlycon boot console and
* replace it with the serial8250_console at 8250 driver init.
*
* Performs console setup for a match (as required by interface)
* If no <options> are specified, then assume the h/w is already setup.
*
* Returns 0 if console matches; otherwise non-zero to use default matching
*/
static int univ8250_console_match(struct console *co, char *name, int idx,
char *options)
{
char match[] = "uart"; /* 8250-specific earlycon name */
enum uart_iotype iotype;
resource_size_t addr;
int i;
if (strncmp(name, match, 4) != 0)
return -ENODEV;
if (uart_parse_earlycon(options, &iotype, &addr, &options))
return -ENODEV;
/* try to match the port specified on the command line */
for (i = 0; i < nr_uarts; i++) {
struct uart_port *port = &serial8250_ports[i].port;
if (port->iotype != iotype)
continue;
if ((iotype == UPIO_MEM || iotype == UPIO_MEM16 ||
iotype == UPIO_MEM32 || iotype == UPIO_MEM32BE)
&& (port->mapbase != addr))
continue;
if (iotype == UPIO_PORT && port->iobase != addr)
continue;
co->index = i;
uart_port_set_cons(port, co);
return serial8250_console_setup(port, options, true);
}
return -ENODEV;
}
static struct console univ8250_console = {
.name = "ttyS",
.write = univ8250_console_write,
.device = uart_console_device,
.setup = univ8250_console_setup,
.exit = univ8250_console_exit,
.match = univ8250_console_match,
.flags = CON_PRINTBUFFER | CON_ANYTIME,
.index = -1,
.data = &serial8250_reg,
};
static int __init univ8250_console_init(void)
{
if (nr_uarts == 0)
return -ENODEV;
serial8250_isa_init_ports();
register_console(&univ8250_console);
return 0;
}
console_initcall(univ8250_console_init);
#define SERIAL8250_CONSOLE (&univ8250_console)
#else
#define SERIAL8250_CONSOLE NULL
#endif
struct uart_driver serial8250_reg = {
.owner = THIS_MODULE,
.driver_name = "serial",
.dev_name = "ttyS",
.major = TTY_MAJOR,
.minor = 64,
.cons = SERIAL8250_CONSOLE,
};
/*
* early_serial_setup - early registration for 8250 ports
*
* Setup an 8250 port structure prior to console initialisation. Use
* after console initialisation will cause undefined behaviour.
*/
int __init early_serial_setup(struct uart_port *port)
{
struct uart_port *p;
if (port->line >= ARRAY_SIZE(serial8250_ports) || nr_uarts == 0)
return -ENODEV;
serial8250_isa_init_ports();
p = &serial8250_ports[port->line].port;
p->iobase = port->iobase;
p->membase = port->membase;
p->irq = port->irq;
p->irqflags = port->irqflags;
p->uartclk = port->uartclk;
p->fifosize = port->fifosize;
p->regshift = port->regshift;
p->iotype = port->iotype;
p->flags = port->flags;
p->mapbase = port->mapbase;
p->mapsize = port->mapsize;
p->private_data = port->private_data;
p->type = port->type;
p->line = port->line;
serial8250_set_defaults(up_to_u8250p(p));
if (port->serial_in)
p->serial_in = port->serial_in;
if (port->serial_out)
p->serial_out = port->serial_out;
if (port->handle_irq)
p->handle_irq = port->handle_irq;
return 0;
}
/**
* serial8250_suspend_port - suspend one serial port
* @line: serial line number
*
* Suspend one serial port.
*/
void serial8250_suspend_port(int line)
{
struct uart_8250_port *up = &serial8250_ports[line];
struct uart_port *port = &up->port;
if (!console_suspend_enabled && uart_console(port) &&
port->type != PORT_8250) {
unsigned char canary = 0xa5;
serial_out(up, UART_SCR, canary);
if (serial_in(up, UART_SCR) == canary)
up->canary = canary;
}
uart_suspend_port(&serial8250_reg, port);
}
EXPORT_SYMBOL(serial8250_suspend_port);
/**
* serial8250_resume_port - resume one serial port
* @line: serial line number
*
* Resume one serial port.
*/
void serial8250_resume_port(int line)
{
struct uart_8250_port *up = &serial8250_ports[line];
struct uart_port *port = &up->port;
up->canary = 0;
if (up->capabilities & UART_NATSEMI) {
/* Ensure it's still in high speed mode */
serial_port_out(port, UART_LCR, 0xE0);
ns16550a_goto_highspeed(up);
serial_port_out(port, UART_LCR, 0);
port->uartclk = 921600*16;
}
uart_resume_port(&serial8250_reg, port);
}
EXPORT_SYMBOL(serial8250_resume_port);
/*
* serial8250_register_8250_port and serial8250_unregister_port allows for
* 16x50 serial ports to be configured at run-time, to support PCMCIA
* modems and PCI multiport cards.
*/
static DEFINE_MUTEX(serial_mutex);
static struct uart_8250_port *serial8250_find_match_or_unused(const struct uart_port *port)
{
int i;
/*
* First, find a port entry which matches.
*/
for (i = 0; i < nr_uarts; i++)
if (uart_match_port(&serial8250_ports[i].port, port))
return &serial8250_ports[i];
/* try line number first if still available */
i = port->line;
if (i < nr_uarts && serial8250_ports[i].port.type == PORT_UNKNOWN &&
serial8250_ports[i].port.iobase == 0)
return &serial8250_ports[i];
/*
* We didn't find a matching entry, so look for the first
* free entry. We look for one which hasn't been previously
* used (indicated by zero iobase).
*/
for (i = 0; i < nr_uarts; i++)
if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
serial8250_ports[i].port.iobase == 0)
return &serial8250_ports[i];
/*
* That also failed. Last resort is to find any entry which
* doesn't have a real port associated with it.
*/
for (i = 0; i < nr_uarts; i++)
if (serial8250_ports[i].port.type == PORT_UNKNOWN)
return &serial8250_ports[i];
return NULL;
}
static void serial_8250_overrun_backoff_work(struct work_struct *work)
{
struct uart_8250_port *up = container_of(to_delayed_work(work), struct uart_8250_port,
overrun_backoff);
guard(uart_port_lock_irqsave)(&up->port);
up->ier |= UART_IER_RLSI | UART_IER_RDI;
serial_out(up, UART_IER, up->ier);
}
/**
* serial8250_register_8250_port - register a serial port
* @up: serial port template
*
* Configure the serial port specified by the request. If the
* port exists and is in use, it is hung up and unregistered
* first.
*
* The port is then probed and if necessary the IRQ is autodetected
* If this fails an error is returned.
*
* On success the port is ready to use and the line number is returned.
*/
int serial8250_register_8250_port(const struct uart_8250_port *up)
{
struct uart_8250_port *uart;
int ret;
if (up->port.uartclk == 0)
return -EINVAL;
guard(mutex)(&serial_mutex);
uart = serial8250_find_match_or_unused(&up->port);
if (!uart) {
/*
* If the port is past the initial isa ports, initialize a new
* port and increment nr_uarts accordingly.
*/
uart = serial8250_setup_port(nr_uarts);
if (!uart)
return -ENOSPC;
nr_uarts++;
}
/* Check if it is CIR already. We check this below again, see there why. */
if (uart->port.type == PORT_8250_CIR)
return -ENODEV;
if (uart->port.dev)
uart_remove_one_port(&serial8250_reg, &uart->port);
uart->port.ctrl_id = up->port.ctrl_id;
uart->port.port_id = up->port.port_id;
uart->port.iobase = up->port.iobase;
uart->port.membase = up->port.membase;
uart->port.irq = up->port.irq;
uart->port.irqflags = up->port.irqflags;
uart->port.uartclk = up->port.uartclk;
uart->port.fifosize = up->port.fifosize;
uart->port.regshift = up->port.regshift;
uart->port.iotype = up->port.iotype;
uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
uart->bugs = up->bugs;
uart->port.mapbase = up->port.mapbase;
uart->port.mapsize = up->port.mapsize;
uart->port.private_data = up->port.private_data;
uart->tx_loadsz = up->tx_loadsz;
uart->capabilities = up->capabilities;
uart->port.throttle = up->port.throttle;
uart->port.unthrottle = up->port.unthrottle;
uart->port.rs485_config = up->port.rs485_config;
uart->port.rs485_supported = up->port.rs485_supported;
uart->port.rs485 = up->port.rs485;
uart->rs485_start_tx = up->rs485_start_tx;
uart->rs485_stop_tx = up->rs485_stop_tx;
uart->lsr_save_mask = up->lsr_save_mask;
uart->dma = up->dma;
/* Take tx_loadsz from fifosize if it wasn't set separately */
if (uart->port.fifosize && !uart->tx_loadsz)
uart->tx_loadsz = uart->port.fifosize;
if (up->port.dev) {
uart->port.dev = up->port.dev;
ret = uart_get_rs485_mode(&uart->port);
if (ret)
goto err;
}
if (up->port.flags & UPF_FIXED_TYPE)
uart->port.type = up->port.type;
/*
* Only call mctrl_gpio_init(), if the device has no ACPI
* companion device
*/
if (!has_acpi_companion(uart->port.dev)) {
struct mctrl_gpios *gpios = mctrl_gpio_init(&uart->port, 0);
if (IS_ERR(gpios)) {
ret = PTR_ERR(gpios);
goto err;
} else {
uart->gpios = gpios;
}
}
serial8250_set_defaults(uart);
/* Possibly override default I/O functions. */
if (up->port.serial_in)
uart->port.serial_in = up->port.serial_in;
if (up->port.serial_out)
uart->port.serial_out = up->port.serial_out;
if (up->port.handle_irq)
uart->port.handle_irq = up->port.handle_irq;
/* Possibly override set_termios call */
if (up->port.set_termios)
uart->port.set_termios = up->port.set_termios;
if (up->port.set_ldisc)
uart->port.set_ldisc = up->port.set_ldisc;
if (up->port.get_mctrl)
uart->port.get_mctrl = up->port.get_mctrl;
if (up->port.set_mctrl)
uart->port.set_mctrl = up->port.set_mctrl;
if (up->port.get_divisor)
uart->port.get_divisor = up->port.get_divisor;
if (up->port.set_divisor)
uart->port.set_divisor = up->port.set_divisor;
if (up->port.startup)
uart->port.startup = up->port.startup;
if (up->port.shutdown)
uart->port.shutdown = up->port.shutdown;
if (up->port.pm)
uart->port.pm = up->port.pm;
if (up->port.handle_break)
uart->port.handle_break = up->port.handle_break;
if (up->dl_read)
uart->dl_read = up->dl_read;
if (up->dl_write)
uart->dl_write = up->dl_write;
/* Check the type (again)! It might have changed by the port.type assignment above. */
if (uart->port.type != PORT_8250_CIR) {
if (uart_console_registered(&uart->port))
pm_runtime_get_sync(uart->port.dev);
if (serial8250_isa_config != NULL)
serial8250_isa_config(0, &uart->port,
&uart->capabilities);
serial8250_apply_quirks(uart);
ret = uart_add_one_port(&serial8250_reg,
&uart->port);
if (ret)
goto err;
ret = uart->port.line;
} else {
dev_info(uart->port.dev,
"skipping CIR port at 0x%lx / 0x%llx, IRQ %d\n",
uart->port.iobase,
(unsigned long long)uart->port.mapbase,
uart->port.irq);
ret = 0;
}
if (!uart->lsr_save_mask)
uart->lsr_save_mask = LSR_SAVE_FLAGS; /* Use default LSR mask */
/* Initialise interrupt backoff work if required */
if (up->overrun_backoff_time_ms > 0) {
uart->overrun_backoff_time_ms =
up->overrun_backoff_time_ms;
INIT_DELAYED_WORK(&uart->overrun_backoff,
serial_8250_overrun_backoff_work);
} else {
uart->overrun_backoff_time_ms = 0;
}
return ret;
err:
uart->port.dev = NULL;
return ret;
}
EXPORT_SYMBOL(serial8250_register_8250_port);
/**
* serial8250_unregister_port - remove a 16x50 serial port at runtime
* @line: serial line number
*
* Remove one serial port. This may not be called from interrupt
* context. We hand the port back to the our control.
*/
void serial8250_unregister_port(int line)
{
struct uart_8250_port *uart = &serial8250_ports[line];
guard(mutex)(&serial_mutex);
if (uart->em485) {
guard(uart_port_lock_irqsave)(&uart->port);
serial8250_em485_destroy(uart);
}
uart_remove_one_port(&serial8250_reg, &uart->port);
if (serial8250_isa_devs) {
uart->port.flags &= ~UPF_BOOT_AUTOCONF;
uart->port.type = PORT_UNKNOWN;
uart->port.dev = &serial8250_isa_devs->dev;
uart->port.port_id = line;
uart->capabilities = 0;
serial8250_init_port(uart);
serial8250_apply_quirks(uart);
uart_add_one_port(&serial8250_reg, &uart->port);
} else {
uart->port.dev = NULL;
}
}
EXPORT_SYMBOL(serial8250_unregister_port);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
] |
| 15/2 | 2026/04/07 13:36 | llm | expert |
0mModel:gemini-3-flash-preview Tokens: input: 75725 output: 57 thoughts: 941 Thoughts: **Analyzing a Potential Race Condition in the 8250 Serial Driver** Alright, let's break this down. I'm looking at a possible race condition within the 8250 serial driver, specifically around interrupt handling during device startup. The interrupt handler, `serial8250_interrupt`, is the entry point. It eventually calls `serial8250_handle_irq_locked` after traversing through `port->handle_irq` and `serial8250_handle_irq`. The crux is the interaction between `serial8250_do_startup` and `serial8250_handle_irq_locked`. `serial8250_do_startup` is called indirectly via the `uart_port_activate` function, which in turn is called by `tty_port_open`. The critical point is where `serial8250_do_startup` enables the interrupt, and when the interrupt handler *could* potentially run. The interrupt is requested via `up->ops->setup_irq(up)`, which for the universal driver boils down to `request_irq`. This function, crucially, happens *before* the IER is fully configured to be non-zero. The specific line in `8250_core.c` is 2307, the call to `setup_irq`. The IER is then written to a few lines later (line 2334) with `UART_IER_RLSI | UART_IER_RDI`. This indicates an interrupt is enabled for receive data available and receiver line status interrupts. The potential race is that the interrupt handler can execute after `request_irq` is called but *before* the IER is fully configured. This is a window where the handler might run, see an IER value of 0, and perhaps skip some interrupt processing. Now, the question is, is this a real problem? If it's a *shared* interrupt, the handler should return `handled = 0` if it finds nothing to do. But it first reads the IIR (Interrupt Identification Register), so if the IIR indicates a pending interrupt, it will try to handle it. If it's *not* a shared interrupt and the UART *did* generate an interrupt while the IER was 0, then the IIR will indicate it. The UART shouldn't generate an interrupt if the IER is 0, right? The driver calls `serial8250_clear_interrupts` and `serial8250_clear_fifos` before `setup_irq`. But, there's `serial8250_THRE_test` that enables `UART_IER_THRI` in the hardware *before* calling `setup_irq`. It enables it, then clears it. Okay, let's step through `serial8250_do_startup` again. It calls `serial8250_THRE_test`, then `up->ops->setup_timer(up)`, and then `serial8250_initialize(port)`. It then clears interrupts, and finally *then* it calls `setup_irq`. It's still `setup_irq` that gets called first, before the IER is configured. |
| 16/2 | 2026/04/07 13:36 | tool | codesearch-definition-source |
0mArgs:map[ContextFile:drivers/tty/serial/8250/8250_port.c IncludeLines:true Name:serial8250_do_startup] Results: map[SourceCode:2249: int serial8250_do_startup(struct uart_port *port)
2250: {
2251: struct uart_8250_port *up = up_to_u8250p(port);
2252: int retval;
2253:
2254: if (!port->fifosize)
2255: port->fifosize = uart_config[port->type].fifo_size;
2256: if (!up->tx_loadsz)
2257: up->tx_loadsz = uart_config[port->type].tx_loadsz;
2258: if (!up->capabilities)
2259: up->capabilities = uart_config[port->type].flags;
2260: up->mcr = 0;
2261:
2262: if (port->iotype != up->cur_iotype)
2263: set_io_from_upio(port);
2264:
2265: guard(serial8250_rpm)(up);
2266:
2267: serial8250_startup_special(port);
2268:
2269: /*
2270: * Clear the FIFO buffers and disable them.
2271: * (they will be reenabled in set_termios())
2272: */
2273: serial8250_clear_fifos(up);
2274:
2275: serial8250_clear_interrupts(port);
2276:
2277: /*
2278: * At this point, there's no way the LSR could still be 0xff;
2279: * if it is, then bail out, because there's likely no UART
2280: * here.
2281: */
2282: if (!(port->flags & UPF_BUGGY_UART) &&
2283: (serial_port_in(port, UART_LSR) == 0xff)) {
2284: dev_info_ratelimited(port->dev, "LSR safety check engaged!\n");
2285: return -ENODEV;
2286: }
2287:
2288: serial8250_set_TRG_levels(port);
2289:
2290: /* Check if we need to have shared IRQs */
2291: if (port->irq && (up->port.flags & UPF_SHARE_IRQ))
2292: up->port.irqflags |= IRQF_SHARED;
2293:
2294: retval = up->ops->setup_irq(up);
2295: if (retval)
2296: return retval;
2297:
2298: serial8250_THRE_test(port);
2299:
2300: up->ops->setup_timer(up);
2301:
2302: serial8250_initialize(port);
2303:
2304: /*
2305: * Clear the interrupt registers again for luck, and clear the
2306: * saved flags to avoid getting false values from polling
2307: * routines or the previous session.
2308: */
2309: serial8250_clear_interrupts(port);
2310: up->lsr_saved_flags = 0;
2311: up->msr_saved_flags = 0;
2312:
2313: /*
2314: * Request DMA channels for both RX and TX.
2315: */
2316: if (up->dma) {
2317: const char *msg = NULL;
2318:
2319: if (uart_console(port))
2320: msg = "forbid DMA for kernel console";
2321: else if (serial8250_request_dma(up))
2322: msg = "failed to request DMA";
2323: if (msg) {
2324: dev_warn_ratelimited(port->dev, "%s\n", msg);
2325: up->dma = NULL;
2326: }
2327: }
2328:
2329: /*
2330: * Set the IER shadow for rx interrupts but defer actual interrupt
2331: * enable until after the FIFOs are enabled; otherwise, an already-
2332: * active sender can swamp the interrupt handler with "too much work".
2333: */
2334: up->ier = UART_IER_RLSI | UART_IER_RDI;
2335:
2336: if (port->flags & UPF_FOURPORT) {
2337: unsigned int icp;
2338: /*
2339: * Enable interrupts on the AST Fourport board
2340: */
2341: icp = (port->iobase & 0xfe0) | 0x01f;
2342: outb_p(0x80, icp);
2343: inb_p(icp);
2344: }
2345:
2346: return 0;
2347: }
SourceFile:drivers/tty/serial/8250/8250_port.c] |
| 17/2 | 2026/04/07 13:36 | llm | expert |
0mModel:gemini-3-flash-preview Tokens: input: 78926 output: 17 thoughts: 3200 Thoughts: **Analyzing a Potential Data Race in Serial Driver Initialization** Okay, so I'm digging into a KCSAN report flagged in the serial8250 driver. The report highlights a potential data race involving `up->ier` – the interrupt enable register – during the `serial8250_do_startup` function. The key is that `up->ier` is read by the interrupt handler before it's fully initialized in startup, which, according to the report, happens at line 2334. My initial thought was that the line number indicated a potential problem, since the `setup_irq` call and various initialization routines (`serial8250_THRE_test`, `serial8250_initialize`) seemed to be happening before the crucial `up->ier` assignment. But, as I trace the code, I find that both `serial8250_THRE_test` and `serial8250_initialize` *do* manipulate the hardware IER. Specifically, they temporarily enable and then *clear* the hardware IER. So by the time we *should* hit line 2334, the IER register should be cleared. But, the interrupt handler can still get called, because it might be a shared interrupt. The interrupt handler reads `up->ier`. If the register reads as `0`, the interrupt handler should not do any processing, which seems correct, because we cleared IER. However, this is where the race condition might be. The 8250 has 4 interrupt sources. 1. Receiver Line Status (RLS) 2. Received Data Ready (RDR) 3. Transmitter Holding Register Empty (THRE) 4. Modem Status (MS) *All* of them are enabled by bits in the IER, if the IER is 0, nothing should trigger. Then I realized that I missed the `UART_IIR_BUSY` (0x07) flag, or other vendor-specific interrupts that might be active, and why it is that the interrupt handler is called. The question then becomes: if the interrupt handler *does* run before line 2334, what happens? If it sees `up->ier` as 0, and skips processing, is that a problem? No, because `set_termios` will eventually re-enable the interrupts, which means the interrupt will be handled eventually. So the race is functionally benign. It's a race, but a benign one! Then I start thinking about the potential for tearing – is `up->ier` an atomic read/write? Yes, it's an `unsigned char`, so single-byte access is atomic on any platform. Compiler optimizations were something I thought about as well. Is the compiler re-ordering or caching the read/writes to `up->ier`? That isn't likely because the write is a single constant assignment and the read is an interrupt handler. Then I checked whether or not `up->ier` is updated with `WRITE_ONCE`. It's not. It is guarded by `port->lock`, which means that `serial8250_do_startup` at line 2334 does NOT hold the port lock. While `serial8250_initialize` and `serial8250_THRE_test` take the lock. It looks like the 2334 assignment is naked, which is not ideal, since it doesn't hold the lock. I start to dig into the interrupt handler calls – `serial8250_handle_irq_locked` reads `up->ier` multiple times. Is there a case that the compiler might read a different value for `up->ier`? The race is unlikely to be a problem, since the race is a constant value being written. I realized that `serial8250_do_startup` is called when the port is opened. Is the interrupt handler running from an old open that wasn't shutdown? But a `shutdown` would have disabled interrupts and freed the IRQ. If another port is using the same IRQ, it should call `serial8250_interrupt`, and call the `handle_irq`. Then `handle_irq_locked` calls `serial8250_handle_irq_locked` and reads `up->ier`. `serial8250_THRE_test` and `serial8250_iir_txen_test` are the only functions that enable the interrupts. But, it does so with the lock held! So the interrupt handler spins on the lock, then, once it gets the lock, the IER is zero. Because the interrupt handler *itself* takes the lock, if the interrupt handler |
| 18/2 | 2026/04/07 13:36 | tool | grepper |
0mArgs:map[Expression:up->ier] Results: map[Output:
Full output is too long, showing 500 out of 533 lines.
Use more precise expression if possible.
[drivers/tty/serial/8250/8250.h=197=static inline bool serial8250_set_THRI(struct uart_8250_port *up)
--
drivers/tty/serial/8250/8250.h-201-
drivers/tty/serial/8250/8250.h:202: if (up->ier & UART_IER_THRI)
drivers/tty/serial/8250/8250.h-203- return false;
drivers/tty/serial/8250/8250.h:204: up->ier |= UART_IER_THRI;
drivers/tty/serial/8250/8250.h:205: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/8250/8250.h-206- return true;
--
drivers/tty/serial/8250/8250.h=209=static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
--
drivers/tty/serial/8250/8250.h-213-
drivers/tty/serial/8250/8250.h:214: if (!(up->ier & UART_IER_THRI))
drivers/tty/serial/8250/8250.h-215- return false;
drivers/tty/serial/8250/8250.h:216: up->ier &= ~UART_IER_THRI;
drivers/tty/serial/8250/8250.h:217: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/8250/8250.h-218- return true;
--
drivers/tty/serial/8250/8250_aspeed_vuart.c=272=static void __aspeed_vuart_set_throttle(struct uart_8250_port *up,
--
drivers/tty/serial/8250/8250_aspeed_vuart.c-279-
drivers/tty/serial/8250/8250_aspeed_vuart.c:280: up->ier &= ~irqs;
drivers/tty/serial/8250/8250_aspeed_vuart.c-281- if (!throttle)
drivers/tty/serial/8250/8250_aspeed_vuart.c:282: up->ier |= irqs;
drivers/tty/serial/8250/8250_aspeed_vuart.c:283: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/8250/8250_aspeed_vuart.c-284-}
--
drivers/tty/serial/8250/8250_bcm7271.c=585=static int brcmuart_startup(struct uart_port *port)
--
drivers/tty/serial/8250/8250_bcm7271.c-608- uart_port_lock_irq(port);
drivers/tty/serial/8250/8250_bcm7271.c:609: up->ier &= ~UART_IER_RDI;
drivers/tty/serial/8250/8250_bcm7271.c:610: serial_port_out(port, UART_IER, up->ier);
drivers/tty/serial/8250/8250_bcm7271.c-611- uart_port_unlock_irq(port);
--
drivers/tty/serial/8250/8250_bcm7271.c=839=static enum hrtimer_restart brcmuart_hrtimer_func(struct hrtimer *t)
--
drivers/tty/serial/8250/8250_bcm7271.c-864- /* re-enable receive unless upper layer has disabled it */
drivers/tty/serial/8250/8250_bcm7271.c:865: if ((up->ier & (UART_IER_RLSI | UART_IER_RDI)) ==
drivers/tty/serial/8250/8250_bcm7271.c-866- (UART_IER_RLSI | UART_IER_RDI)) {
--
drivers/tty/serial/8250/8250_core.c=217=static void serial8250_backup_timeout(struct timer_list *t)
--
drivers/tty/serial/8250/8250_core.c-242- lsr = serial_lsr_in(up);
drivers/tty/serial/8250/8250_core.c:243: if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
drivers/tty/serial/8250/8250_core.c-244- (!kfifo_is_empty(&up->port.state->port.xmit_fifo) ||
--
drivers/tty/serial/8250/8250_core.c=670=static void serial_8250_overrun_backoff_work(struct work_struct *work)
--
drivers/tty/serial/8250/8250_core.c-675- guard(uart_port_lock_irqsave)(&up->port);
drivers/tty/serial/8250/8250_core.c:676: up->ier |= UART_IER_RLSI | UART_IER_RDI;
drivers/tty/serial/8250/8250_core.c:677: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/8250/8250_core.c-678-}
--
drivers/tty/serial/8250/8250_dw.c=128=static void dw8250_idle_exit(struct uart_port *p)
--
drivers/tty/serial/8250/8250_dw.c-138- serial_port_out(p, UART_MCR, up->mcr);
drivers/tty/serial/8250/8250_dw.c:139: serial_port_out(p, UART_IER, up->ier);
drivers/tty/serial/8250/8250_dw.c-140-
--
drivers/tty/serial/8250/8250_dw.c=404=static void dw8250_quirk_ier_kick(struct uart_port *p)
--
drivers/tty/serial/8250/8250_dw.c-408-
drivers/tty/serial/8250/8250_dw.c:409: if (up->ier & UART_IER_THRI)
drivers/tty/serial/8250/8250_dw.c-410- return;
--
drivers/tty/serial/8250/8250_dw.c-415-
drivers/tty/serial/8250/8250_dw.c:416: serial_port_out(p, UART_IER, up->ier | UART_IER_THRI);
drivers/tty/serial/8250/8250_dw.c-417- serial_port_in(p, UART_LCR); /* safe, no side-effects */
drivers/tty/serial/8250/8250_dw.c:418: serial_port_out(p, UART_IER, up->ier);
drivers/tty/serial/8250/8250_dw.c-419-}
--
drivers/tty/serial/8250/8250_fsl.c=26=int fsl8250_handle_irq(struct uart_port *port)
--
drivers/tty/serial/8250/8250_fsl.c-65- if ((lsr & (UART_LSR_DR | UART_LSR_BI)) &&
drivers/tty/serial/8250/8250_fsl.c:66: (up->ier & (UART_IER_RLSI | UART_IER_RDI))) {
drivers/tty/serial/8250/8250_fsl.c-67- lsr = serial8250_rx_chars(up, lsr);
--
drivers/tty/serial/8250/8250_fsl.c-73-
drivers/tty/serial/8250/8250_fsl.c:74: up->ier = serial_port_in(port, UART_IER);
drivers/tty/serial/8250/8250_fsl.c:75: if (up->ier & (UART_IER_RLSI | UART_IER_RDI)) {
drivers/tty/serial/8250/8250_fsl.c-76- port->ops->stop_rx(port);
--
drivers/tty/serial/8250/8250_fsl.c-89-
drivers/tty/serial/8250/8250_fsl.c:90: if ((lsr & UART_LSR_THRE) && (up->ier & UART_IER_THRI))
drivers/tty/serial/8250/8250_fsl.c-91- serial8250_tx_chars(up);
--
drivers/tty/serial/8250/8250_omap.c=295=static void omap8250_restore_regs(struct uart_8250_port *up)
--
drivers/tty/serial/8250/8250_omap.c-337-
drivers/tty/serial/8250/8250_omap.c:338: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/8250/8250_omap.c-339-
--
drivers/tty/serial/8250/8250_omap.c=363=static void omap_8250_set_termios_atomic(struct uart_port *port, struct ktermios *termios,
--
drivers/tty/serial/8250/8250_omap.c-431- */
drivers/tty/serial/8250/8250_omap.c:432: up->ier &= ~UART_IER_MSI;
drivers/tty/serial/8250/8250_omap.c-433- if (UART_ENABLE_MS(port, termios->c_cflag))
drivers/tty/serial/8250/8250_omap.c:434: up->ier |= UART_IER_MSI;
drivers/tty/serial/8250/8250_omap.c-435-
--
drivers/tty/serial/8250/8250_omap.c=628=static irqreturn_t omap8250_irq(int irq, void *dev_id)
--
drivers/tty/serial/8250/8250_omap.c-685- uart_port_lock(port);
drivers/tty/serial/8250/8250_omap.c:686: up->ier = serial_port_in(port, UART_IER);
drivers/tty/serial/8250/8250_omap.c:687: if (up->ier & (UART_IER_RLSI | UART_IER_RDI)) {
drivers/tty/serial/8250/8250_omap.c-688- port->ops->stop_rx(port);
--
drivers/tty/serial/8250/8250_omap.c=707=static int omap_8250_startup(struct uart_port *port)
--
drivers/tty/serial/8250/8250_omap.c-747- scoped_guard(uart_port_lock_irq, port) {
drivers/tty/serial/8250/8250_omap.c:748: up->ier = UART_IER_RLSI | UART_IER_RDI;
drivers/tty/serial/8250/8250_omap.c:749: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/8250/8250_omap.c-750- }
--
drivers/tty/serial/8250/8250_omap.c=768=static void omap_8250_shutdown(struct uart_port *port)
--
drivers/tty/serial/8250/8250_omap.c-784- scoped_guard(uart_port_lock_irq, port) {
drivers/tty/serial/8250/8250_omap.c:785: up->ier = 0;
drivers/tty/serial/8250/8250_omap.c-786- serial_out(up, UART_IER, 0);
--
drivers/tty/serial/8250/8250_omap.c=814=static void omap_8250_unthrottle(struct uart_port *port)
--
drivers/tty/serial/8250/8250_omap.c-825- up->dma->rx_dma(up);
drivers/tty/serial/8250/8250_omap.c:826: up->ier |= UART_IER_RLSI | UART_IER_RDI;
drivers/tty/serial/8250/8250_omap.c:827: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/8250/8250_omap.c-828-}
--
drivers/tty/serial/8250/8250_omap.c=1259=static void am654_8250_handle_rx_dma(struct uart_8250_port *up, u8 iir,
--
drivers/tty/serial/8250/8250_omap.c-1268- if ((status & (UART_LSR_DR | UART_LSR_BI)) &&
drivers/tty/serial/8250/8250_omap.c:1269: (up->ier & UART_IER_RDI) && !(status & UART_LSR_OE)) {
drivers/tty/serial/8250/8250_omap.c-1270- am654_8250_handle_uart_errors(up, iir, status);
--
drivers/tty/serial/8250/8250_omap.c-1278- */
drivers/tty/serial/8250/8250_omap.c:1279: up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
drivers/tty/serial/8250/8250_omap.c:1280: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/8250/8250_omap.c-1281- omap_8250_rx_dma_flush(up);
--
drivers/tty/serial/8250/8250_omap.c-1283- serial_out(up, UART_OMAP_EFR2, 0x0);
drivers/tty/serial/8250/8250_omap.c:1284: up->ier |= UART_IER_RLSI | UART_IER_RDI;
drivers/tty/serial/8250/8250_omap.c:1285: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/8250/8250_omap.c-1286- } else {
--
drivers/tty/serial/8250/8250_pci.c=1856=static u32 kt_serial_in(struct uart_port *p, unsigned int offset)
--
drivers/tty/serial/8250/8250_pci.c-1867- * is 0, double check with ier value in uart_8250_port and use
drivers/tty/serial/8250/8250_pci.c:1868: * that instead. up->ier should be the same value as what is
drivers/tty/serial/8250/8250_pci.c-1869- * currently configured.
--
drivers/tty/serial/8250/8250_pci.c-1873- if (val == 0)
drivers/tty/serial/8250/8250_pci.c:1874: val = up->ier;
drivers/tty/serial/8250/8250_pci.c-1875- }
--
drivers/tty/serial/8250/8250_port.c=1267=static void serial8250_stop_rx(struct uart_port *port)
--
drivers/tty/serial/8250/8250_port.c-1275-
drivers/tty/serial/8250/8250_port.c:1276: up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
drivers/tty/serial/8250/8250_port.c:1277: serial_port_out(port, UART_IER, up->ier);
drivers/tty/serial/8250/8250_port.c-1278-}
--
drivers/tty/serial/8250/8250_port.c=1550=static void serial8250_disable_ms(struct uart_port *port)
--
drivers/tty/serial/8250/8250_port.c-1562-
drivers/tty/serial/8250/8250_port.c:1563: up->ier &= ~UART_IER_MSI;
drivers/tty/serial/8250/8250_port.c:1564: serial_port_out(port, UART_IER, up->ier);
drivers/tty/serial/8250/8250_port.c-1565-}
--
drivers/tty/serial/8250/8250_port.c=1567=static void serial8250_enable_ms(struct uart_port *port)
--
drivers/tty/serial/8250/8250_port.c-1579-
drivers/tty/serial/8250/8250_port.c:1580: up->ier |= UART_IER_MSI;
drivers/tty/serial/8250/8250_port.c-1581-
drivers/tty/serial/8250/8250_port.c-1582- guard(serial8250_rpm)(up);
drivers/tty/serial/8250/8250_port.c:1583: serial_port_out(port, UART_IER, up->ier);
drivers/tty/serial/8250/8250_port.c-1584-}
--
drivers/tty/serial/8250/8250_port.c=1735=unsigned int serial8250_modem_status(struct uart_8250_port *up)
--
drivers/tty/serial/8250/8250_port.c-1741- up->msr_saved_flags = 0;
drivers/tty/serial/8250/8250_port.c:1742: if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
drivers/tty/serial/8250/8250_port.c-1743- port->state != NULL) {
--
drivers/tty/serial/8250/8250_port.c=1789=void serial8250_handle_irq_locked(struct uart_port *port, unsigned int iir)
--
drivers/tty/serial/8250/8250_port.c-1809- (port->status & (UPSTAT_AUTOCTS | UPSTAT_AUTORTS)) &&
drivers/tty/serial/8250/8250_port.c:1810: !(up->ier & (UART_IER_RLSI | UART_IER_RDI)))
drivers/tty/serial/8250/8250_port.c-1811- skip_rx = true;
--
drivers/tty/serial/8250/8250_port.c-1822- serial8250_modem_status(up);
drivers/tty/serial/8250/8250_port.c:1823: if ((status & UART_LSR_THRE) && (up->ier & UART_IER_THRI)) {
drivers/tty/serial/8250/8250_port.c-1824- if (!up->dma || up->dma->tx_err)
--
drivers/tty/serial/8250/8250_port.c=2249=int serial8250_do_startup(struct uart_port *port)
--
drivers/tty/serial/8250/8250_port.c-2333- */
drivers/tty/serial/8250/8250_port.c:2334: up->ier = UART_IER_RLSI | UART_IER_RDI;
drivers/tty/serial/8250/8250_port.c-2335-
--
drivers/tty/serial/8250/8250_port.c=2357=void serial8250_do_shutdown(struct uart_port *port)
--
drivers/tty/serial/8250/8250_port.c-2368- scoped_guard(uart_port_lock_irqsave, port) {
drivers/tty/serial/8250/8250_port.c:2369: up->ier = 0;
drivers/tty/serial/8250/8250_port.c-2370- serial_port_out(port, UART_IER, 0);
--
drivers/tty/serial/8250/8250_port.c=2691=static void serial8250_set_ier(struct uart_port *port, struct ktermios *termios)
--
drivers/tty/serial/8250/8250_port.c-2695- /* CTS flow control flag and modem status interrupts */
drivers/tty/serial/8250/8250_port.c:2696: up->ier &= ~UART_IER_MSI;
drivers/tty/serial/8250/8250_port.c-2697- if (!(up->bugs & UART_BUG_NOMSR) && UART_ENABLE_MS(&up->port, termios->c_cflag))
drivers/tty/serial/8250/8250_port.c:2698: up->ier |= UART_IER_MSI;
drivers/tty/serial/8250/8250_port.c-2699- if (up->capabilities & UART_CAP_UUE)
drivers/tty/serial/8250/8250_port.c:2700: up->ier |= UART_IER_UUE;
drivers/tty/serial/8250/8250_port.c-2701- if (up->capabilities & UART_CAP_RTOIE)
drivers/tty/serial/8250/8250_port.c:2702: up->ier |= UART_IER_RTOIE;
drivers/tty/serial/8250/8250_port.c-2703-
drivers/tty/serial/8250/8250_port.c:2704: serial_port_out(port, UART_IER, up->ier);
drivers/tty/serial/8250/8250_port.c-2705-}
--
drivers/tty/serial/ar933x_uart.c=96=static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
drivers/tty/serial/ar933x_uart.c-97-{
drivers/tty/serial/ar933x_uart.c:98: up->ier |= AR933X_UART_INT_TX_EMPTY;
drivers/tty/serial/ar933x_uart.c:99: ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
drivers/tty/serial/ar933x_uart.c-100-}
--
drivers/tty/serial/ar933x_uart.c=102=static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
drivers/tty/serial/ar933x_uart.c-103-{
drivers/tty/serial/ar933x_uart.c:104: up->ier &= ~AR933X_UART_INT_TX_EMPTY;
drivers/tty/serial/ar933x_uart.c:105: ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
drivers/tty/serial/ar933x_uart.c-106-}
--
drivers/tty/serial/ar933x_uart.c=108=static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up)
drivers/tty/serial/ar933x_uart.c-109-{
drivers/tty/serial/ar933x_uart.c:110: up->ier |= AR933X_UART_INT_RX_VALID;
drivers/tty/serial/ar933x_uart.c:111: ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
drivers/tty/serial/ar933x_uart.c-112-}
--
drivers/tty/serial/ar933x_uart.c=114=static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up)
drivers/tty/serial/ar933x_uart.c-115-{
drivers/tty/serial/ar933x_uart.c:116: up->ier &= ~AR933X_UART_INT_RX_VALID;
drivers/tty/serial/ar933x_uart.c:117: ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
drivers/tty/serial/ar933x_uart.c-118-}
--
drivers/tty/serial/ar933x_uart.c=505=static void ar933x_uart_shutdown(struct uart_port *port)
--
drivers/tty/serial/ar933x_uart.c-510- /* Disable all interrupts */
drivers/tty/serial/ar933x_uart.c:511: up->ier = 0;
drivers/tty/serial/ar933x_uart.c:512: ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
drivers/tty/serial/ar933x_uart.c-513-
--
drivers/tty/serial/omap-serial.c=269=static void serial_omap_enable_ms(struct uart_port *port)
--
drivers/tty/serial/omap-serial.c-274-
drivers/tty/serial/omap-serial.c:275: up->ier |= UART_IER_MSI;
drivers/tty/serial/omap-serial.c:276: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-277-}
--
drivers/tty/serial/omap-serial.c=279=static void serial_omap_stop_tx(struct uart_port *port)
--
drivers/tty/serial/omap-serial.c-318-
drivers/tty/serial/omap-serial.c:319: if (up->ier & UART_IER_THRI) {
drivers/tty/serial/omap-serial.c:320: up->ier &= ~UART_IER_THRI;
drivers/tty/serial/omap-serial.c:321: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-322- }
--
drivers/tty/serial/omap-serial.c=325=static void serial_omap_stop_rx(struct uart_port *port)
--
drivers/tty/serial/omap-serial.c-328-
drivers/tty/serial/omap-serial.c:329: up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
drivers/tty/serial/omap-serial.c-330- up->port.read_status_mask &= ~UART_LSR_DR;
drivers/tty/serial/omap-serial.c:331: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-332-}
--
drivers/tty/serial/omap-serial.c=353=static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
drivers/tty/serial/omap-serial.c-354-{
drivers/tty/serial/omap-serial.c:355: if (!(up->ier & UART_IER_THRI)) {
drivers/tty/serial/omap-serial.c:356: up->ier |= UART_IER_THRI;
drivers/tty/serial/omap-serial.c:357: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-358- }
--
drivers/tty/serial/omap-serial.c=388=static void serial_omap_throttle(struct uart_port *port)
--
drivers/tty/serial/omap-serial.c-393- uart_port_lock_irqsave(&up->port, &flags);
drivers/tty/serial/omap-serial.c:394: up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
drivers/tty/serial/omap-serial.c:395: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-396- uart_port_unlock_irqrestore(&up->port, flags);
--
drivers/tty/serial/omap-serial.c=399=static void serial_omap_unthrottle(struct uart_port *port)
--
drivers/tty/serial/omap-serial.c-404- uart_port_lock_irqsave(&up->port, &flags);
drivers/tty/serial/omap-serial.c:405: up->ier |= UART_IER_RLSI | UART_IER_RDI;
drivers/tty/serial/omap-serial.c:406: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-407- uart_port_unlock_irqrestore(&up->port, flags);
--
drivers/tty/serial/omap-serial.c=410=static unsigned int check_modem_status(struct uart_omap_port *up)
--
drivers/tty/serial/omap-serial.c-419-
drivers/tty/serial/omap-serial.c:420: if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
drivers/tty/serial/omap-serial.c-421- up->port.state != NULL) {
--
drivers/tty/serial/omap-serial.c=659=static int serial_omap_startup(struct uart_port *port)
--
drivers/tty/serial/omap-serial.c-717- */
drivers/tty/serial/omap-serial.c:718: up->ier = UART_IER_RLSI | UART_IER_RDI;
drivers/tty/serial/omap-serial.c:719: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-720-
--
drivers/tty/serial/omap-serial.c=732=static void serial_omap_shutdown(struct uart_port *port)
--
drivers/tty/serial/omap-serial.c-741- */
drivers/tty/serial/omap-serial.c:742: up->ier = 0;
drivers/tty/serial/omap-serial.c-743- serial_out(up, UART_IER, 0);
--
drivers/tty/serial/omap-serial.c=776=serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
--
drivers/tty/serial/omap-serial.c-855- */
drivers/tty/serial/omap-serial.c:856: up->ier &= ~UART_IER_MSI;
drivers/tty/serial/omap-serial.c-857- if (UART_ENABLE_MS(&up->port, termios->c_cflag))
drivers/tty/serial/omap-serial.c:858: up->ier |= UART_IER_MSI;
drivers/tty/serial/omap-serial.c:859: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-860- serial_out(up, UART_LCR, cval); /* reset DLAB */
--
drivers/tty/serial/omap-serial.c-934- serial_out(up, UART_LCR, 0);
drivers/tty/serial/omap-serial.c:935: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-936- serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
--
drivers/tty/serial/omap-serial.c=1294=serial_omap_config_rs485(struct uart_port *port, struct ktermios *termios,
--
drivers/tty/serial/omap-serial.c-1301- /* Disable interrupts from this port */
drivers/tty/serial/omap-serial.c:1302: mode = up->ier;
drivers/tty/serial/omap-serial.c:1303: up->ier = 0;
drivers/tty/serial/omap-serial.c-1304- serial_out(up, UART_IER, 0);
--
drivers/tty/serial/omap-serial.c-1312- /* Enable interrupts */
drivers/tty/serial/omap-serial.c:1313: up->ier = mode;
drivers/tty/serial/omap-serial.c:1314: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-1315-
--
drivers/tty/serial/omap-serial.c=1706=static void serial_omap_restore_context(struct uart_omap_port *up)
--
drivers/tty/serial/omap-serial.c-1720- serial_out(up, UART_LCR, 0x0); /* Operational mode */
drivers/tty/serial/omap-serial.c:1721: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/omap-serial.c-1722- serial_out(up, UART_FCR, up->fcr);
--
drivers/tty/serial/pxa.c=64=static void serial_pxa_enable_ms(struct uart_port *port)
--
drivers/tty/serial/pxa.c-67-
drivers/tty/serial/pxa.c:68: up->ier |= UART_IER_MSI;
drivers/tty/serial/pxa.c:69: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/pxa.c-70-}
--
drivers/tty/serial/pxa.c=72=static void serial_pxa_stop_tx(struct uart_port *port)
--
drivers/tty/serial/pxa.c-75-
drivers/tty/serial/pxa.c:76: if (up->ier & UART_IER_THRI) {
drivers/tty/serial/pxa.c:77: up->ier &= ~UART_IER_THRI;
drivers/tty/serial/pxa.c:78: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/pxa.c-79- }
--
drivers/tty/serial/pxa.c=82=static void serial_pxa_stop_rx(struct uart_port *port)
--
drivers/tty/serial/pxa.c-85-
drivers/tty/serial/pxa.c:86: up->ier &= ~UART_IER_RLSI;
drivers/tty/serial/pxa.c-87- up->port.read_status_mask &= ~UART_LSR_DR;
drivers/tty/serial/pxa.c:88: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/pxa.c-89-}
--
drivers/tty/serial/pxa.c=91=static inline void receive_chars(struct uart_pxa_port *up, int *status)
--
drivers/tty/serial/pxa.c-103- */
drivers/tty/serial/pxa.c:104: up->ier &= ~UART_IER_RTOIE;
drivers/tty/serial/pxa.c:105: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/pxa.c-106-
--
drivers/tty/serial/pxa.c-170- */
drivers/tty/serial/pxa.c:171: up->ier |= UART_IER_RTOIE;
drivers/tty/serial/pxa.c:172: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/pxa.c-173-}
--
drivers/tty/serial/pxa.c=185=static void serial_pxa_start_tx(struct uart_port *port)
--
drivers/tty/serial/pxa.c-188-
drivers/tty/serial/pxa.c:189: if (!(up->ier & UART_IER_THRI)) {
drivers/tty/serial/pxa.c:190: up->ier |= UART_IER_THRI;
drivers/tty/serial/pxa.c:191: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/pxa.c-192- }
--
drivers/tty/serial/pxa.c=307=static int serial_pxa_startup(struct uart_port *port)
--
drivers/tty/serial/pxa.c-358- */
drivers/tty/serial/pxa.c:359: up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
drivers/tty/serial/pxa.c:360: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/pxa.c-361-
--
drivers/tty/serial/pxa.c=373=static void serial_pxa_shutdown(struct uart_port *port)
--
drivers/tty/serial/pxa.c-382- */
drivers/tty/serial/pxa.c:383: up->ier = 0;
drivers/tty/serial/pxa.c-384- serial_out(up, UART_IER, 0);
--
drivers/tty/serial/pxa.c=402=serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
--
drivers/tty/serial/pxa.c-442- */
drivers/tty/serial/pxa.c:443: up->ier |= UART_IER_UUE;
drivers/tty/serial/pxa.c-444-
--
drivers/tty/serial/pxa.c-480- */
drivers/tty/serial/pxa.c:481: up->ier &= ~UART_IER_MSI;
drivers/tty/serial/pxa.c-482- if (UART_ENABLE_MS(&up->port, termios->c_cflag))
drivers/tty/serial/pxa.c:483: up->ier |= UART_IER_MSI;
drivers/tty/serial/pxa.c-484-
drivers/tty/serial/pxa.c:485: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/pxa.c-486-
--
drivers/tty/serial/serial-tegra.c=502=static void tegra_uart_start_pio_tx(struct tegra_uart_port *tup,
--
drivers/tty/serial/serial-tegra.c-509- tup->tx_bytes = bytes;
drivers/tty/serial/serial-tegra.c:510: tup->ier_shadow |= UART_IER_THRI;
drivers/tty/serial/serial-tegra.c:511: tegra_uart_write(tup, tup->ier_shadow, UART_IER);
drivers/tty/serial/serial-tegra.c-512-}
--
drivers/tty/serial/serial-tegra.c=835=static irqreturn_t tegra_uart_isr(int irq, void *data)
--
drivers/tty/serial/serial-tegra.c-851- if (tup->rx_in_progress) {
drivers/tty/serial/serial-tegra.c:852: ier = tup->ier_shadow;
drivers/tty/serial/serial-tegra.c-853- ier |= (UART_IER_RLSI | UART_IER_RTOIE |
drivers/tty/serial/serial-tegra.c-854- TEGRA_UART_IER_EORD | UART_IER_RDI);
drivers/tty/serial/serial-tegra.c:855: tup->ier_shadow = ier;
drivers/tty/serial/serial-tegra.c-856- tegra_uart_write(tup, ier, UART_IER);
--
drivers/tty/serial/serial-tegra.c-870- case 1: /* Transmit interrupt only triggered when using PIO */
drivers/tty/serial/serial-tegra.c:871: tup->ier_shadow &= ~UART_IER_THRI;
drivers/tty/serial/serial-tegra.c:872: tegra_uart_write(tup, tup->ier_shadow, UART_IER);
drivers/tty/serial/serial-tegra.c-873- tegra_uart_handle_tx_pio(tup);
--
drivers/tty/serial/serial-tegra.c-880- /* Disable Rx interrupts */
drivers/tty/serial/serial-tegra.c:881: ier = tup->ier_shadow;
drivers/tty/serial/serial-tegra.c-882- ier &= ~(UART_IER_RDI | UART_IER_RLSI |
drivers/tty/serial/serial-tegra.c-883- UART_IER_RTOIE | TEGRA_UART_IER_EORD);
drivers/tty/serial/serial-tegra.c:884: tup->ier_shadow = ier;
drivers/tty/serial/serial-tegra.c-885- tegra_uart_write(tup, ier, UART_IER);
--
drivers/tty/serial/serial-tegra.c-891- is_rx_start = tup->rx_in_progress;
drivers/tty/serial/serial-tegra.c:892: tup->ier_shadow &= ~UART_IER_RDI;
drivers/tty/serial/serial-tegra.c:893: tegra_uart_write(tup, tup->ier_shadow,
drivers/tty/serial/serial-tegra.c-894- UART_IER);
--
drivers/tty/serial/serial-tegra.c=912=static void tegra_uart_stop_rx(struct uart_port *u)
--
drivers/tty/serial/serial-tegra.c-925-
drivers/tty/serial/serial-tegra.c:926: ier = tup->ier_shadow;
drivers/tty/serial/serial-tegra.c-927- ier &= ~(UART_IER_RDI | UART_IER_RLSI | UART_IER_RTOIE |
drivers/tty/serial/serial-tegra.c-928- TEGRA_UART_IER_EORD);
drivers/tty/serial/serial-tegra.c:929: tup->ier_shadow = ier;
drivers/tty/serial/serial-tegra.c-930- tegra_uart_write(tup, ier, UART_IER);
--
drivers/tty/serial/serial-tegra.c=995=static int tegra_uart_hw_init(struct tegra_uart_port *tup)
--
drivers/tty/serial/serial-tegra.c-1001- tup->lcr_shadow = 0;
drivers/tty/serial/serial-tegra.c:1002: tup->ier_shadow = 0;
drivers/tty/serial/serial-tegra.c-1003- tup->current_baud = 0;
--
drivers/tty/serial/serial-tegra.c-1105- */
drivers/tty/serial/serial-tegra.c:1106: tup->ier_shadow = UART_IER_RLSI | UART_IER_RTOIE | UART_IER_RDI;
drivers/tty/serial/serial-tegra.c-1107-
--
drivers/tty/serial/serial-tegra.c-1112- if (!tup->use_rx_pio)
drivers/tty/serial/serial-tegra.c:1113: tup->ier_shadow |= TEGRA_UART_IER_EORD;
drivers/tty/serial/serial-tegra.c-1114-
drivers/tty/serial/serial-tegra.c:1115: tegra_uart_write(tup, tup->ier_shadow, UART_IER);
drivers/tty/serial/serial-tegra.c-1116- return 0;
--
drivers/tty/serial/serial-tegra.c=1275=static void tegra_uart_enable_ms(struct uart_port *u)
--
drivers/tty/serial/serial-tegra.c-1279- if (tup->enable_modem_interrupt) {
drivers/tty/serial/serial-tegra.c:1280: tup->ier_shadow |= UART_IER_MSI;
drivers/tty/serial/serial-tegra.c:1281: tegra_uart_write(tup, tup->ier_shadow, UART_IER);
drivers/tty/serial/serial-tegra.c-1282- }
--
drivers/tty/serial/serial-tegra.c=1285=static void tegra_uart_set_termios(struct uart_port *u,
--
drivers/tty/serial/serial-tegra.c-1306- /* Clear all interrupts as configuration is going to be changed */
drivers/tty/serial/serial-tegra.c:1307: tegra_uart_write(tup, tup->ier_shadow | UART_IER_RDI, UART_IER);
drivers/tty/serial/serial-tegra.c-1308- tegra_uart_read(tup, UART_IER);
--
drivers/tty/serial/serial-tegra.c-1379- /* Re-enable interrupt */
drivers/tty/serial/serial-tegra.c:1380: tegra_uart_write(tup, tup->ier_shadow, UART_IER);
drivers/tty/serial/serial-tegra.c-1381- tegra_uart_read(tup, UART_IER);
--
drivers/tty/serial/sunsu.c=255=static void sunsu_start_tx(struct uart_port *port)
--
drivers/tty/serial/sunsu.c-259-
drivers/tty/serial/sunsu.c:260: if (!(up->ier & UART_IER_THRI)) {
drivers/tty/serial/sunsu.c:261: up->ier |= UART_IER_THRI;
drivers/tty/serial/sunsu.c:262: serial_out(up, UART_IER, up->ier);
drivers/tty/serial/sunsu.c-263- }
--
drivers/tty/serial/sunsu.c=274=static void sunsu_stop_rx(struct uart_port *port)
--
drivers/tty/serial/sunsu.c-278-
drivers/tty/serial/sunsu.c:279: up->ier &= ~UART_IER_RLSI;
]
] |
| 19/2 | 2026/04/07 13:37 | llm | expert |
0mModel:gemini-3-flash-preview Tokens: input: 96277 output: 19 thoughts: 3789 Thoughts: **Analysis of Potential Data Race in 8250 Serial Driver** Okay, so I've dug into this KCSAN report. The crux of the matter seems to be a potential race condition involving the `up->ier` (Interrupt Enable Register) in the 8250 serial driver, specifically during the port startup sequence. Here's what I've pieced together: * The `grep` output flags multiple updates to `up->ier`. Most of these updates are protected by locks, which is good practice. However, `serial8250_do_startup` – which handles port initialization – stands out because it modifies `up->ier` *without* explicit locking. * This lockless modification occurs early in port initialization. The sequence goes like this: `serial8250_do_startup` sets up the port when it's being opened. Even though `setup_irq` has run, meaning the interrupt handler *could* be active, the port hardware hasn't fully enabled interrupts yet. * The interrupt handler might see `up->ier` in a transient state. Specifically, it could be either `0` or `0x05`. Both of these values, as I analyzed, are safe, because they don't enable interrupts like `serial8250_tx_chars` or `serial8250_modem_status`. * Let's consider `serial8250_rx_chars`. It's only called if the interrupt handler sees data is ready (`UART_LSR_DR`) AND `skip_rx` is false. If `up->ier` is `0`, `skip_rx` becomes true, and `serial8250_rx_chars` is skipped. If it's `0x05`, `skip_rx` is false, and RX happens. * The question now is, does it matter if RX is skipped? Initially, probably not. Interrupts aren't enabled in the hardware. However, it's possible the interrupt handler is triggered by a shared interrupt. In that case, skipping our part of RX is fine because the interrupt wasn't for us anyway, or we'll retry when interrupts *are* fully enabled. * Then I checked `serial8250_clear_interrupts` to see what registers were being cleared. It does not affect IER. However, `serial8250_do_startup` also calls `serial8250_initialize(port)` which in turn, *does* clear the IER. Therefore, `up->ier` starts at zero. * Now, look at the code: during `serial8250_do_startup`, `up->ier` is set to `UART_IER_RLSI | UART_IER_RDI`. The comment specifically says that this "defers actual interrupt enable until after the FIFOs are enabled". The actual enablement happens later in `set_termios`. * So, we've got a race between early initialization of a *shadow* register and a (likely shared) interrupt handler reading the *shadow* register. * Since `up->ier` is initialized to a state that doesn't trigger any real action in the handler (neither THRI nor MSI set), AND hardware interrupts are disabled, this race is pretty benign. The stale read, if it happens, just results in skipping some checks. Those checks wouldn't have been triggered because of the hardware being disabled. * To avoid any potential issues, I will check and see if there are other writers to `up->ier`. * The `startup` function sets `up->ier` to `0x05`. Later, `set_termios` will update it, which should be fine because it will run after `startup` returns, and there are no concurrent writers. * The interrupt handler, is the only concurrent reader. * I can conclude: the race is harmless. Initialization of a shadow register while the hardware interrupts are disabled. A stale read by the interrupt handler in a shared IRQ will skip some checks. After more digging, the final analysis is: * The initialization of `up->ier` to `0x05` is likely the "write" causing the race. * The "read" is the interrupt handler checking `up->ier` to see if it should handle the interrupt. * The value goes from `0x00` to `0x05`. * `up->ier` is explicitly set to 0 in `serial8250_do_shutdown` which should be safe. * The hardware will have a later update using `set_termios`. * The race occurs |
| 20/2 | 2026/04/07 13:37 | tool | set-results |
0mArgs:map[Benign:true Confident:true] Results: map[Benign:true Confident:true] |
| 21/2 | 2026/04/07 13:37 | llm | expert |
0mModel:gemini-3-flash-preview Tokens: input: 101127 output: 815 thoughts: 359 Thoughts: **Benign Race Condition Analysis** Okay, the analysis is done. It looks like the core issue boils down to a potential race between `serial8250_do_startup`, specifically the initialization of `up->ier`, and `serial8250_handle_irq_locked` reading that same register. But, after looking at the code, I think it's ultimately benign, and here's why: First, `up->ier` is just a shadow register of the actual hardware IER. That's key. Second, and maybe most importantly, hardware interrupts are disabled when this race *could* occur. The hardware IER is essentially zero at this point. Given those two facts, it seems like any interrupt being handled is probably due to a shared IRQ or some hardware quirk. A stale read of `up->ier`, let's say reading 0x00 instead of the intended 0x05, isn't going to cause any serious problems. It'll just mean that certain checks, like RX processing or modem status, will be skipped. And at this early stage of port initialization, that's not critical. Considering that the write sets `up->ier` to 0x05, that value also doesn't enable TX interrupts (`UART_IER_THRI`) or modem status interrupts (`UART_IER_MSI`). So, those checks would fail anyway, even with the intended value. Finally, the architecture here is x86, and the write is a single byte. It's atomic, so there's no risk of a partial write. I think a decent fix is to use `WRITE_ONCE()` around the assignment in `serial8250_do_startup` and `READ_ONCE()` around the read in `serial8250_handle_irq_locked`. Alternatively, we could just hold the `port->lock` during the assignment for a more traditional synchronization. Hold on, I should quickly verify if `up->ier` is even used in `serial8250_rx_chars`. Okay, I checked, and it's not. No problem there. Alright, I'm confident in my assessment. I'm ready to write up the final recommendation. |
| 22/1 | 2026/04/07 13:37 | action | format-explanation |
0mResults:map[Explanation:The Kernel Concurrency Sanitizer (KCSAN) reported a data race between
`serial8250_do_startup()` and `serial8250_handle_irq_locked()` on the `up->ier`
field of `struct uart_8250_port`.
### Race Summary
- **Function A:** `serial8250_do_startup()` (Writer)
- **Function B:** `serial8250_handle_irq_locked()` (Reader)
- **Variable:** `up->ier` (Shadow Interrupt Enable Register)
- **Context:** `serial8250_do_startup()` is called during port opening to
initialize the UART. `serial8250_handle_irq_locked()` is called from the
interrupt handler (possibly due to a shared IRQ or a hardware quirk).
### Synchronization Context
`serial8250_do_startup()` performs a plain write to `up->ier` at line 2334
without holding the `port->lock`. Meanwhile, the interrupt handler (Thread B)
reads `up->ier` while holding the `port->lock`. Since the writer does not
acquire the lock, a concurrent read can see a stale or partially updated value.
### Final Classification: **BENIGN**
#### Reasoning:
1. **Shadow Register Initialization:** `up->ier` is a shadow register used to
track which interrupts are enabled in the hardware. In
`serial8250_do_startup()`, it is initialized to `UART_IER_RLSI | UART_IER_RDI`
(0x05).
2. **Hardware State:** At this point in `startup`, hardware interrupts are
still disabled (the hardware IER was cleared earlier in the function). The
actual hardware interrupt enablement happens later in `set_termios()`, which is
called after `startup` returns.
3. **Interrupt Source:** If the interrupt handler runs during `startup`, it is
likely due to a shared IRQ line being triggered by another device. The handler
reads `up->ier` to decide whether to process RX, TX, or modem status events for
this specific UART.
4. **Tolerant Logic:**
- If the reader sees the stale value (`0x00`), it will skip RX/TX/Modem
processing for this port. This is correct because the port is not yet fully
active and hardware interrupts are off.
- If the reader sees the new value (`0x05`), it might attempt to read
characters if the Line Status Register (LSR) indicates data is ready.
Reading data during startup is safe and often desirable to clear the FIFO.
- The bits for TX interrupts (`UART_IER_THRI`) and Modem Status interrupts
(`UART_IER_MSI`) are not set in either the old (0x00) or the new (0x05)
value at this stage, so those code paths are not affected by the race.
5. **Atomicity:** `up->ier` is an `unsigned char`. On x86 (and most
architectures), a 1-byte write is atomic, preventing "torn" reads.
### Recommended Annotations
To silence the KCSAN report and ensure compiler consistency, the access should
be marked:
- In `serial8250_do_startup()`: `WRITE_ONCE(up->ier, UART_IER_RLSI |
UART_IER_RDI);`
- In `serial8250_handle_irq_locked()`: Use `READ_ONCE(up->ier)` when checking
interrupt bits.
- Alternatively, wrap the assignment in `serial8250_do_startup()` with
`uart_port_lock_irqsave(port, &flags)`.] |
| Total Calls | Total Tokens | Avg Tokens | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|
| Total Calls | Total Duration (Seconds) | Avg Duration (Seconds) |
|---|